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authorZhou Jingyu <b02241@freescale.com>2011-01-13 21:50:55 +0800
committerZhou Jingyu <b02241@freescale.com>2011-01-16 18:06:26 +0800
commit4c5783ca2c2048db7f877a467117ada0a462ab0d (patch)
tree9d579747bc838700fb9d79b478ad4ca858549f91 /arch/arm/mach-mx5/mx53_smd_pmic_da9053.c
parent9e9bbeddbf92b6ba2215c366d245340bf0ca76ae (diff)
ENGR00137958-2 Add mx53 smd&loco suspend via i2c command
Add mx53 smd&loco suspend via i2c command Only a maximu 30ms delay before da9053 enter suspend, thus the command is sent out at the latest stage of system suspend operation when all other drivers already suspended and irq disabled. A standalone polling-mode i2c interface is therefor deployed for the suspend command operations. In current solution, mx53 fails to resume from 1GHZ working poing when reduce VDD &VCC to stop mode level. Thus a workaround is added to set mx53 working point to 400MHZ before suspend and restore to previous working point after it resume back. Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx5/mx53_smd_pmic_da9053.c')
-rw-r--r--arch/arm/mach-mx5/mx53_smd_pmic_da9053.c30
1 files changed, 16 insertions, 14 deletions
diff --git a/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c b/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c
index 2f0436d147f7..6179e8e1e9ce 100644
--- a/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c
+++ b/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c
@@ -48,46 +48,48 @@
|REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE,\
.valid_modes_mask = REGULATOR_MODE_NORMAL,\
.state_mem = { \
- .uV = suspend_mv, \
+ .uV = suspend_mv * 1000, \
.mode = REGULATOR_MODE_NORMAL, \
.enabled = (0 == suspend_mv) ? 0 : 1, \
+ .disabled = 0, \
}, \
},\
}
static struct regulator_init_data da9052_regulators_init[] = {
DA9052_LDO(DA9052_LDO1_VOLT_UPPER,
- DA9052_LDO1_VOLT_LOWER, "DA9052_LDO1", 0),
+ DA9052_LDO1_VOLT_LOWER, "DA9052_LDO1", 1300),
DA9052_LDO(DA9052_LDO2_VOLT_UPPER,
- DA9052_LDO2_VOLT_LOWER, "DA9052_LDO2", 0),
+ DA9052_LDO2_VOLT_LOWER, "DA9052_LDO2", 1300),
DA9052_LDO(DA9052_LDO34_VOLT_UPPER,
- DA9052_LDO34_VOLT_LOWER, "DA9052_LDO3", 0),
+ DA9052_LDO34_VOLT_LOWER, "DA9052_LDO3", 3300),
DA9052_LDO(DA9052_LDO34_VOLT_UPPER,
- DA9052_LDO34_VOLT_LOWER, "DA9052_LDO4", 0),
+ DA9052_LDO34_VOLT_LOWER, "DA9052_LDO4", 2775),
DA9052_LDO(DA9052_LDO567810_VOLT_UPPER,
- DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO5", 0),
+ DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO5", 1300),
DA9052_LDO(DA9052_LDO567810_VOLT_UPPER,
- DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO6", 0),
+ DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO6", 1200),
DA9052_LDO(DA9052_LDO567810_VOLT_UPPER,
- DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO7", 0),
+ DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO7", 2750),
DA9052_LDO(DA9052_LDO567810_VOLT_UPPER,
- DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO8", 0),
+ DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO8", 1800),
DA9052_LDO(DA9052_LDO9_VOLT_UPPER,
- DA9052_LDO9_VOLT_LOWER, "DA9052_LDO9", 0),
+ DA9052_LDO9_VOLT_LOWER, "DA9052_LDO9", 2500),
DA9052_LDO(DA9052_LDO567810_VOLT_UPPER,
- DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO10", 950),
+ DA9052_LDO567810_VOLT_LOWER, "DA9052_LDO10", 1200),
/* BUCKS */
DA9052_LDO(DA9052_BUCK_CORE_PRO_VOLT_UPPER,
DA9052_BUCK_CORE_PRO_VOLT_LOWER, "DA9052_BUCK_CORE", 850),
DA9052_LDO(DA9052_BUCK_CORE_PRO_VOLT_UPPER,
- DA9052_BUCK_CORE_PRO_VOLT_LOWER, "DA9052_BUCK_PRO", 1175),
+ DA9052_BUCK_CORE_PRO_VOLT_LOWER, "DA9052_BUCK_PRO", 950),
DA9052_LDO(DA9052_BUCK_MEM_VOLT_UPPER,
- DA9052_BUCK_MEM_VOLT_LOWER, "DA9052_BUCK_MEM", 0),
+ DA9052_BUCK_MEM_VOLT_LOWER, "DA9052_BUCK_MEM", 1500),
DA9052_LDO(DA9052_BUCK_PERI_VOLT_UPPER,
- DA9052_BUCK_PERI_VOLT_LOWER, "DA9052_BUCK_PERI", 0)
+ DA9052_BUCK_PERI_VOLT_LOWER, "DA9052_BUCK_PERI", 2500)
};
+
#define MX53_SMD_WiFi_BT_PWR_EN (2*32 + 10) /*GPIO_3_10 */
struct regulator_init_data wifi_bt_reg_initdata = {
.constraints = {