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authorSammy He <r62914@freescale.com>2011-06-22 00:08:22 +0800
committerEric Miao <eric.miao@linaro.org>2011-07-18 19:43:56 +0800
commit7f018e92b6a77802b3571af5eb44cb092a7a02b3 (patch)
treeead1cbaba2a4509b4ed1c0c1f95e4db35a44495f
parentab95942c2329a9544a5b928030854dcd7f3545bd (diff)
ENGR00151762 vpu: Fix system hang due to long time video playback on mx51
Fix system hang due to long time video playback. This issue is only on i.MX51 platfrom due to changing vpu clock parent in vpu_enable/ disable. Set vpu clock parent to axi_a forever to fix it. Signed-off-by: Sammy He <r62914@freescale.com> Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Eric Miao <eric.miao@linaro.org>
-rw-r--r--arch/arm/mach-mx5/clock.c34
1 files changed, 4 insertions, 30 deletions
diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c
index cae020e4c6a7..0a5e1e9a04cf 100644
--- a/arch/arm/mach-mx5/clock.c
+++ b/arch/arm/mach-mx5/clock.c
@@ -3985,32 +3985,6 @@ static int _clk_vpu_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static int _clk_vpu_enable(struct clk *clk)
-{
- /* Set VPU's parent to be axi_a or ahb when its enabled. */
- if (cpu_is_mx51() && (mx51_revision() < IMX_CHIP_REVISION_2_0)) {
- clk_set_parent(&vpu_clk[0], &ahb_clk);
- clk_set_parent(&vpu_clk[1], &ahb_clk);
- } else if (cpu_is_mx51()) {
- clk_set_parent(&vpu_clk[0], &axi_a_clk);
- clk_set_parent(&vpu_clk[1], &axi_a_clk);
- }
-
- return _clk_enable(clk);
-
-}
-
-static void _clk_vpu_disable(struct clk *clk)
-{
- _clk_disable(clk);
-
- /* Set VPU's parent to be axi_b when its disabled. */
- if (cpu_is_mx51()) {
- clk_set_parent(&vpu_clk[0], &axi_b_clk);
- clk_set_parent(&vpu_clk[1], &axi_b_clk);
- }
-}
-
static struct clk vpu_clk[] = {
{
__INIT_CLK_DEBUG(vpu_clk_0)
@@ -4025,10 +3999,10 @@ static struct clk vpu_clk[] = {
{
__INIT_CLK_DEBUG(vpu_clk_1)
.set_parent = _clk_vpu_set_parent,
- .enable = _clk_vpu_enable,
+ .enable = _clk_enable,
.enable_reg = MXC_CCM_CCGR5,
.enable_shift = MXC_CCM_CCGRx_CG3_OFFSET,
- .disable = _clk_vpu_disable,
+ .disable = _clk_disable,
.secondary = &vpu_clk[2],
},
{
@@ -4741,8 +4715,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long
/* Initialise the parents to be axi_b, parents are set to
* axi_a when the clocks are enabled.
*/
- clk_set_parent(&vpu_clk[0], &axi_b_clk);
- clk_set_parent(&vpu_clk[1], &axi_b_clk);
+ clk_set_parent(&vpu_clk[0], &axi_a_clk);
+ clk_set_parent(&vpu_clk[1], &axi_a_clk);
clk_set_parent(&gpu3d_clk, &axi_a_clk);
clk_set_parent(&gpu2d_clk, &axi_a_clk);