path: root/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
diff options
authorMathieu Desnoyers <mathieu.desnoyers@efficios.com>2011-03-16 19:05:10 -0400
committerMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>2011-03-16 19:05:10 -0400
commit5e3cff8f463ea93d6fdb9ffa97ad3390299232cf (patch)
tree14601b4814a39124d237e60b0933f0b3c27060ec /arch/arm/mach-omap2/clkt34xx_dpll3m2.c
parentf30af286881ca5c31eacdea49602200b45577bc4 (diff)
omap trace clock Implement LTTng trace clock for omap. Should eventually make it so it can be compiled-out, but that would imply fixing other architecture's trace clocks too. It only supports uniprocessor for now. IPIs would be needed to restore each CPU's ccnt register in sync with the 32k clock upon resync_trace_clock to support SMP. Eventually, looking at how much time is lost lost when clearing the top ccnt bit should be done, so we can compensate for the cycles lost. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Diffstat (limited to 'arch/arm/mach-omap2/clkt34xx_dpll3m2.c')
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index b2b1e37bb6b..0f5ac66ec11 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -79,6 +79,8 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
unlock_dll = 1;
+ cpu_hz = arm_fck_p->rate;
* XXX This only needs to be done when the CPU frequency changes