1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
|
/*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* This file contains the configuration parameters for the dbau1x00 board.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
#define CONFIG_DBAU1X00 1
#define CONFIG_AU1X00 1 /* alchemy series cpu */
#ifdef CONFIG_DBAU1000
/* Also known as Merlot */
#define CONFIG_AU1000 1
#else
#ifdef CONFIG_DBAU1100
#define CONFIG_AU1100 1
#else
#ifdef CONFIG_DBAU1500
#define CONFIG_AU1500 1
#else
#error "No valid board set"
#endif
#endif
#endif
#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
#define CONFIG_BAUDRATE 115200
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs $(bootargs) " \
"console=ttyS0,$(baudrate) " \
"panic=1\0" \
"bootfile=/tftpboot/vmlinux.srec\0" \
"load=tftp 80500000 $(u-boot)\0" \
""
/* Boot from Compact flash partition 2 as default */
#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm"
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
CFG_CMD_IDE | \
CFG_CMD_DHCP | \
CFG_CMD_ELF ) & \
~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | CFG_CMD_ELF | \
CFG_CMD_BDI | CFG_CMD_BEDBUG))
#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "DbAu1x00 # " /* Monitor Command Prompt */
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args*/
#define CFG_MALLOC_LEN 128*1024
#define CFG_BOOTPARAMS_LEN 128*1024
#define CFG_HZ 396000000 /* FIXME causes overflow in net.c */
#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */
#define CFG_LOAD_ADDR 0x81000000 /* default load address */
#define CFG_MEMTEST_START 0x80100000
#define CFG_MEMTEST_END 0x80800000
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
/* The following #defines are needed to get flash environment right */
#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MONITOR_LEN (192 << 10)
#define CFG_INIT_SP_OFFSET 0x400000
/* We boot from this flash, selected with dip switch */
#define CFG_FLASH_BASE PHYS_FLASH_2
/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
#define CFG_ENV_IS_NOWHERE 1
/* Address and size of Primary Environment Sector */
#define CFG_ENV_ADDR 0xB0030000
#define CFG_ENV_SIZE 0x10000
#define CONFIG_FLASH_16BIT
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_NET_MULTI
#define CONFIG_MEMSIZE_IN_BYTES
/*---ATA PCMCIA ------------------------------------*/
#define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
#define CFG_PCMCIA_MEM_ADDR 0x20000000
#define CONFIG_PCMCIA_SLOT_A
#define CONFIG_ATAPI 1
#define CONFIG_MAC_PARTITION 1
/* We run CF in "true ide" mode or a harddrive via pcmcia */
#define CONFIG_IDE_PCMCIA 1
/* We only support one slot for now */
#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
#undef CONFIG_IDE_LED /* LED for ide not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */
#define CFG_ATA_IDE0_OFFSET 0x0000
#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
/* Offset for data I/O */
#define CFG_ATA_DATA_OFFSET 8
/* Offset for normal register accesses */
#define CFG_ATA_REG_OFFSET 0
/* Offset for alternate registers */
#define CFG_ATA_ALT_OFFSET 0x0100
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_DCACHE_SIZE 16384
#define CFG_ICACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
#define DB1000_BCSR_ADDR 0xAE000000
#endif /* __CONFIG_H */
|
