From 1db7377a70a8d931c32648e717695133120d5456 Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 13 Sep 2012 22:22:04 +0000 Subject: mmc: at91: add multi block read/write support. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it. Signed-off-by: Josh Wu Signed-off-by: Andreas Bießmann --- include/atmel_mci.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/atmel_mci.h b/include/atmel_mci.h index 3dd5d67be..c71188127 100644 --- a/include/atmel_mci.h +++ b/include/atmel_mci.h @@ -38,7 +38,7 @@ typedef struct atmel_mci { u32 sdcr; /* 0x0c */ u32 argr; /* 0x10 */ u32 cmdr; /* 0x14 */ - u32 _18; /* 0x18 */ + u32 blkr; /* 0x18 */ u32 _1c; /* 0x1c */ u32 rspr; /* 0x20 */ u32 rspr1; /* 0x24 */ @@ -118,6 +118,11 @@ typedef struct atmel_mci { #define MMCI_TRTYP_OFFSET 19 #define MMCI_TRTYP_SIZE 2 +/* Bitfields in BLKR */ +/* MMCI_BLKLEN_OFFSET/SIZE already defined in MR */ +#define MMCI_BCNT_OFFSET 0 +#define MMCI_BCNT_SIZE 16 + /* Bitfields in RSPRx */ #define MMCI_RSP_OFFSET 0 #define MMCI_RSP_SIZE 32 -- cgit v1.2.3 From 3a49cd7e1a26af6708b05d4877bb0254a08dded3 Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 13 Sep 2012 22:22:05 +0000 Subject: ARM: at91sam9x5: enable MCI0 support for 9x5ek board. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Josh Wu Signed-off-by: Andreas Bießmann --- include/configs/at91sam9x5ek.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index cbdc3e93c..71f765b49 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -89,6 +89,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND #define CONFIG_CMD_SF +#define CONFIG_CMD_MMC /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -138,6 +139,15 @@ #define CONFIG_CMD_UBIFS #endif +/* MMC */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_CMD_FAT +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define CONFIG_DOS_PARTITION +#endif + /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -- cgit v1.2.3 From 669681104daac2bfbdc733d7426b19e358eced8a Mon Sep 17 00:00:00 2001 From: Andrew Bradford Date: Mon, 1 Oct 2012 05:06:52 +0000 Subject: configs: Fix usage of mmc rescan Fix usage of 'mmc rescan' by many configs. Proper use is 'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan the device. 'mmc rescan' itself does not take any arguments. Signed-off-by: Andrew Bradford --- include/configs/am335x_evm.h | 2 +- include/configs/am3517_crane.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/cm_t35.h | 2 +- include/configs/devkit8000.h | 2 +- include/configs/igep00x0.h | 2 +- include/configs/mx28evk.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53ard.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/mx53smd.h | 2 +- include/configs/mx6qarm2.h | 2 +- include/configs/mx6qsabrelite.h | 2 +- include/configs/omap3_beagle.h | 2 +- include/configs/omap3_evm.h | 2 +- include/configs/omap3_logic.h | 2 +- include/configs/omap3_overo.h | 2 +- include/configs/omap3_zoom1.h | 2 +- include/configs/omap4_common.h | 2 +- include/configs/omap5_evm.h | 2 +- include/configs/tricorder.h | 2 +- 22 files changed, 22 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 339d4bdb6..9d807391b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -81,7 +81,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ "if run loadbootenv; then " \ "echo Loaded environment from ${bootenv};" \ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 8ddeff46f..20a3df5db 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -209,7 +209,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 698081100..ce71d1335 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -206,7 +206,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 46c556ddc..6f355c7af 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -231,7 +231,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 1e658067e..da3263f4f 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -233,7 +233,7 @@ "dhcp ${loadaddr}; " \ "run netargs; " \ "bootm ${loadaddr}\0" \ - "autoboot=if mmc rescan ${mmcdev}; then " \ + "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index b1071e892..c81ab7622 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -180,7 +180,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ "if run loadbootenv; then " \ "run importbootenv;" \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 7cdbec68d..e188f029c 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -313,7 +313,7 @@ "dhcp ${uimage}; bootm\0" #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 34b07831c..dcae53786 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -182,7 +182,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index fea93b4dc..62cb42bc4 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -119,7 +119,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 832050ea9..69937d834 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -132,7 +132,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 6a6aaa192..55efeb741 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -140,7 +140,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index ff2a290d7..9e8331970 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -118,7 +118,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea37c..fbc51625b 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -106,7 +106,7 @@ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index e7bf6582c..ec9ab2649 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -164,7 +164,7 @@ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index f79f99645..7a3cc16a0 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -289,7 +289,7 @@ "userbutton_nonxm=gpio input 7;\0" /* "run userbutton" will return 1 (false) if is pressed and 0 (false) if not */ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run userbutton; then " \ "setenv bootenv uEnv.txt;" \ "else " \ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 632a13fa9..f6e423699 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -162,7 +162,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index b975a6c9a..b2457d0bc 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -202,7 +202,7 @@ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ - "autoboot=if mmc rescan ${mmcdev}; then " \ + "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index f6d6f75fc..626cf7afd 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -188,7 +188,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 891e6f436..e152055a6 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -198,7 +198,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index cbc9bdb40..a32369af3 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -165,7 +165,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index 743edfdcc..623da777f 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -167,7 +167,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 00d02e8ca..5859a7337 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -201,7 +201,7 @@ "run nandargs; " \ "run loaduimage_ubi; " \ "bootm ${loadaddr}\0" \ - "autoboot=if mmc rescan ${mmcdev}; then " \ + "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ -- cgit v1.2.3 From 3530a35d747508e98976a1d86a6d3f9b31cb3fd2 Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Sun, 7 Oct 2012 01:17:34 +0000 Subject: cm-t35: clean unused defines from config Neither cm-t35, nor cm-t3730 is using OneNAND or flash. Remove the related defines from config file. Signed-off-by: Igor Grinberg --- include/configs/cm_t35.h | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 6f355c7af..568ae8e09 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -289,25 +289,15 @@ */ /* **** PISMO SUPPORT *** */ - /* Configure the PISMO */ #define PISMO1_NAND_SIZE GPMC_SIZE_128M -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE -#endif /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_ENV_IS_IN_NAND -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ - #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -- cgit v1.2.3 From e47c9e8608df6c95b6a324925573bac12045e059 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 16 Oct 2012 04:07:03 +0000 Subject: OMAP3: updated pinmux and environment for new revision of mcx board The mcx board was slightly modified and the pinmux must be updated. There is no need to support the old board, that becomes obsolete. Signed-off-by: Stefano Babic --- include/configs/mcx.h | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 359522a64..d3061a294 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -256,22 +256,24 @@ "run nandargs; " \ "ubi part nand0,4;" \ "ubi readvol ${loadaddr} kernel;" \ - "run addip addtty addmtd addfb addeth addmisc;" \ + "run addtty addmtd addfb addeth addmisc;" \ "bootm ${loadaddr}\0" \ - "swupdate_args=setenv bootargs ubi.mtd=6 root=ubi0:fs_recovery "\ - "rootfstype=ubifs quiet loglevel=1 " \ - "consoleblank=0 ${swupdate_misc}\0" \ + "swupdate_args=setenv bootargs root=/dev/ram " \ + "quiet loglevel=1 " \ + "consoleblank=0 ${swupdate_misc}\0" \ "swupdate=echo Running Sw-Update...;" \ "if printenv mtdparts;then echo Starting SwUpdate...; " \ "else mtdparts default;fi; " \ "ubi part nand0,5;" \ "ubi readvol 0x82000000 kernel_recovery;" \ + "ubi part nand0,6;" \ + "ubi readvol 0x84000000 fs_recovery;" \ "run swupdate_args; " \ "setenv bootargs ${bootargs} " \ "${mtdparts} " \ "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ "omapdss.def_disp=lcd;" \ - "bootm ${loadaddr}\0" + "bootm 0x82000000 0x84000000\0" #define CONFIG_BOOTCOMMAND \ "run nandboot" -- cgit v1.2.3 From 8c735b990989bcd3909081aff7e6913222ac38e9 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 16 Oct 2012 04:07:04 +0000 Subject: OMAP3: mcx: updated to new hardware revision Some GPIOs differ in the new revision board. Previous revision are considered obsolete and they will not anymore supported. Signed-off-by: Stefano Babic --- include/configs/mcx.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/mcx.h b/include/configs/mcx.h index d3061a294..96e105996 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -115,8 +115,7 @@ #define CONFIG_USB_ULPI #define CONFIG_USB_ULPI_VIEWPORT_OMAP /*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 154 -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 152 +#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 /* commands to include */ -- cgit v1.2.3 From 8f1fae26a7fb4c0c2897f2f086fe8a3e1da58a9a Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 20 Oct 2012 23:56:07 +0000 Subject: OMAP3: add video support to the mcx board Add video support to the board with the display focaltech etm070003dh6. Signed-off-by: Stefano Babic --- include/configs/mcx.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 96e105996..bf49cc138 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -181,7 +181,7 @@ #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ /* Environment information */ -#define CONFIG_BOOTDELAY 10 +#define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "uImage" @@ -257,6 +257,10 @@ "ubi readvol ${loadaddr} kernel;" \ "run addtty addmtd addfb addeth addmisc;" \ "bootm ${loadaddr}\0" \ + "preboot=ubi part nand0,7;" \ + "ubi readvol ${loadaddr} splash;" \ + "bmp display ${loadaddr};" \ + "gpio set 55\0" \ "swupdate_args=setenv bootargs root=/dev/ram " \ "quiet loglevel=1 " \ "consoleblank=0 ${swupdate_misc}\0" \ @@ -303,6 +307,7 @@ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ +#define CONFIG_PREBOOT /* * AM3517 has 12 GP timers, they can be driven by the system clock @@ -422,4 +427,13 @@ #define CONFIG_NET_RETRY_COUNT 10 #endif +#define CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_CMD_BMP +#define CONFIG_VIDEO_OMAP3 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + #endif /* __CONFIG_H */ -- cgit v1.2.3 From 69916bcf71766d85cc6a7131a1d5716a724a8475 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 16 Oct 2012 13:06:07 +0000 Subject: am33xx: Add SPI SPL as an option Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm. Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9d807391b..58d62d0c7 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -218,6 +218,13 @@ #define CONFIG_SPL_NET_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" #define CONFIG_SPL_ETH_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" /* -- cgit v1.2.3 From 6f62f4207112013852be87dc2b9c7c570eba11c9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Oct 2012 08:54:08 +0000 Subject: arm: Remove support for lpc2292 This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut --- include/flash.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/flash.h b/include/flash.h index 6d70bdd81..7db599e78 100644 --- a/include/flash.h +++ b/include/flash.h @@ -348,7 +348,6 @@ extern flash_info_t *flash_get_info(ulong base); #define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */ #define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */ -#define PHILIPS_LPC2292 0x0401FF13 /* LPC2292 internal FLASH */ #define NUMONYX_256MBIT 0x8922 /* Numonyx P33/30 256MBit 65nm */ /*----------------------------------------------------------------------- -- cgit v1.2.3 From f2e0801565b7106da0f96784389c397794ce3906 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Oct 2012 08:54:11 +0000 Subject: stdio: Remove the CLPS7111 serial driver This driver is no longer used, remove it. Signed-off-by: Marek Vasut --- include/clps7111.h | 276 ----------------------------------------------------- 1 file changed, 276 deletions(-) delete mode 100644 include/clps7111.h (limited to 'include') diff --git a/include/clps7111.h b/include/clps7111.h deleted file mode 100644 index baf600773..000000000 --- a/include/clps7111.h +++ /dev/null @@ -1,276 +0,0 @@ -/* - * linux/include/asm-arm/hardware/clps7111.h - * - * This file contains the hardware definitions of the CLPS7111 internal - * registers. - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_HARDWARE_CLPS7111_H -#define __ASM_HARDWARE_CLPS7111_H - -#define CLPS7111_PHYS_BASE (0x80000000) - -#ifndef __ASSEMBLY__ -#define clps_readb(off) __raw_readb(CLPS7111_BASE + (off)) -#define clps_readl(off) __raw_readl(CLPS7111_BASE + (off)) -#define clps_writeb(val,off) __raw_writeb(val, CLPS7111_BASE + (off)) -#define clps_writel(val,off) __raw_writel(val, CLPS7111_BASE + (off)) -#endif - -#define PADR (0x0000) -#define PBDR (0x0001) -#define PDDR (0x0003) -#define PADDR (0x0040) -#define PBDDR (0x0041) -#define PDDDR (0x0043) -#define PEDR (0x0080) -#define PEDDR (0x00c0) -#define SYSCON1 (0x0100) -#define SYSFLG1 (0x0140) -#define MEMCFG1 (0x0180) -#define MEMCFG2 (0x01c0) -#define DRFPR (0x0200) -#define INTSR1 (0x0240) -#define INTMR1 (0x0280) -#define LCDCON (0x02c0) -#define TC1D (0x0300) -#define TC2D (0x0340) -#define RTCDR (0x0380) -#define RTCMR (0x03c0) -#define PMPCON (0x0400) -#define CODR (0x0440) -#define UARTDR1 (0x0480) -#define UBRLCR1 (0x04c0) -#define SYNCIO (0x0500) -#define PALLSW (0x0540) -#define PALMSW (0x0580) -#define STFCLR (0x05c0) -#define BLEOI (0x0600) -#define MCEOI (0x0640) -#define TEOI (0x0680) -#define TC1EOI (0x06c0) -#define TC2EOI (0x0700) -#define RTCEOI (0x0740) -#define UMSEOI (0x0780) -#define COEOI (0x07c0) -#define HALT (0x0800) -#define STDBY (0x0840) - -#define FBADDR (0x1000) -#define SYSCON2 (0x1100) -#define SYSFLG2 (0x1140) -#define INTSR2 (0x1240) -#define INTMR2 (0x1280) -#define UARTDR2 (0x1480) -#define UBRLCR2 (0x14c0) -#define SS2DR (0x1500) -#define SRXEOF (0x1600) -#define SS2POP (0x16c0) -#define KBDEOI (0x1700) - -/* common bits: SYSCON1 / SYSCON2 */ -#define SYSCON_UARTEN (1 << 8) - -#define SYSCON1_KBDSCAN(x) ((x) & 15) -#define SYSCON1_KBDSCANMASK (15) -#define SYSCON1_TC1M (1 << 4) -#define SYSCON1_TC1S (1 << 5) -#define SYSCON1_TC2M (1 << 6) -#define SYSCON1_TC2S (1 << 7) -#define SYSCON1_UART1EN SYSCON_UARTEN -#define SYSCON1_BZTOG (1 << 9) -#define SYSCON1_BZMOD (1 << 10) -#define SYSCON1_DBGEN (1 << 11) -#define SYSCON1_LCDEN (1 << 12) -#define SYSCON1_CDENTX (1 << 13) -#define SYSCON1_CDENRX (1 << 14) -#define SYSCON1_SIREN (1 << 15) -#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16) -#define SYSCON1_ADCKSEL_MASK (3 << 16) -#define SYSCON1_EXCKEN (1 << 18) -#define SYSCON1_WAKEDIS (1 << 19) -#define SYSCON1_IRTXM (1 << 20) - -/* common bits: SYSFLG1 / SYSFLG2 */ -#define SYSFLG_UBUSY (1 << 11) -#define SYSFLG_URXFE (1 << 22) -#define SYSFLG_UTXFF (1 << 23) - -#define SYSFLG1_MCDR (1 << 0) -#define SYSFLG1_DCDET (1 << 1) -#define SYSFLG1_WUDR (1 << 2) -#define SYSFLG1_WUON (1 << 3) -#define SYSFLG1_CTS (1 << 8) -#define SYSFLG1_DSR (1 << 9) -#define SYSFLG1_DCD (1 << 10) -#define SYSFLG1_UBUSY SYSFLG_UBUSY -#define SYSFLG1_NBFLG (1 << 12) -#define SYSFLG1_RSTFLG (1 << 13) -#define SYSFLG1_PFFLG (1 << 14) -#define SYSFLG1_CLDFLG (1 << 15) -#define SYSFLG1_URXFE SYSFLG_URXFE -#define SYSFLG1_UTXFF SYSFLG_UTXFF -#define SYSFLG1_CRXFE (1 << 24) -#define SYSFLG1_CTXFF (1 << 25) -#define SYSFLG1_SSIBUSY (1 << 26) -#define SYSFLG1_ID (1 << 29) - -#define SYSFLG2_SSRXOF (1 << 0) -#define SYSFLG2_RESVAL (1 << 1) -#define SYSFLG2_RESFRM (1 << 2) -#define SYSFLG2_SS2RXFE (1 << 3) -#define SYSFLG2_SS2TXFF (1 << 4) -#define SYSFLG2_SS2TXUF (1 << 5) -#define SYSFLG2_CKMODE (1 << 6) -#define SYSFLG2_UBUSY SYSFLG_UBUSY -#define SYSFLG2_URXFE SYSFLG_URXFE -#define SYSFLG2_UTXFF SYSFLG_UTXFF - -#define LCDCON_GSEN (1 << 30) -#define LCDCON_GSMD (1 << 31) - -#define SYSCON2_SERSEL (1 << 0) -#define SYSCON2_KBD6 (1 << 1) -#define SYSCON2_DRAMZ (1 << 2) -#define SYSCON2_KBWEN (1 << 3) -#define SYSCON2_SS2TXEN (1 << 4) -#define SYSCON2_PCCARD1 (1 << 5) -#define SYSCON2_PCCARD2 (1 << 6) -#define SYSCON2_SS2RXEN (1 << 7) -#define SYSCON2_UART2EN SYSCON_UARTEN -#define SYSCON2_SS2MAEN (1 << 9) -#define SYSCON2_OSTB (1 << 12) -#define SYSCON2_CLKENSL (1 << 13) -#define SYSCON2_BUZFREQ (1 << 14) - -/* common bits: UARTDR1 / UARTDR2 */ -#define UARTDR_FRMERR (1 << 8) -#define UARTDR_PARERR (1 << 9) -#define UARTDR_OVERR (1 << 10) - -/* common bits: UBRLCR1 / UBRLCR2 */ -#define UBRLCR_BAUD_MASK ((1 << 12) - 1) -#define UBRLCR_BREAK (1 << 12) -#define UBRLCR_PRTEN (1 << 13) -#define UBRLCR_EVENPRT (1 << 14) -#define UBRLCR_XSTOP (1 << 15) -#define UBRLCR_FIFOEN (1 << 16) -#define UBRLCR_WRDLEN5 (0 << 17) -#define UBRLCR_WRDLEN6 (1 << 17) -#define UBRLCR_WRDLEN7 (2 << 17) -#define UBRLCR_WRDLEN8 (3 << 17) -#define UBRLCR_WRDLEN_MASK (3 << 17) - -#define SYNCIO_SMCKEN (1 << 13) -#define SYNCIO_TXFRMEN (1 << 14) - -#define SYSCON3 0x2200 /* System Control register 3 ----------------------- */ -#define ADCCON 0x00000001 /* ADC configuration */ -#define CLKCTL 0x00000006 /* processor clock control */ -#define CLKCTL_18 0x0 /* 18.432 MHz */ -#define CLKCTL_36 0x2 /* 36.864 MHz */ -#define CLKCTL_49 0x4 /* 49.152 MHz */ -#define CLKCTL_73 0x6 /* 73.728 MHz */ -#define MCPSEL 0x00000008 /* MCP select */ -#define ADCCKNSEN 0x000010 /* ADC clock sense */ -#define VERSN 0x000000e0 /* additional version bits */ -#define VERSN_SHIFT 5 -#define FASTWAKE 0x0000100 /* Wakeup clock select: 0=8Hz, 1=4kHz */ - -#define INTSR3 0x2240 /* Interrupt Status register 3 --------------------- */ -#define MCPINT 0x00000001 /* MCP interface interrupt (FIQ) */ - -#define INTMR3 0x2280 /* Interrupt Mask register 3 ----------------------- */ -#define LEDFLSH 0x22C0 /* LED Flash control register ---------------------- */ -#define LEDFLSH_RATE 0x03 /* flash rate */ -#define LEDFLSH_RATE_SHIFT 0 -#define LEDFLSH_DUTY 0x3c /* duty ratio */ -#define LEDFLSH_DUTY_SHIFT 2 -#define LEDFLSH_ENABLE 0x40 /* enable */ - -#define IO_START CLPS7111_PHYS_BASE - -#define IO(offset) (IO_START + (offset)) - -#define IO_BYTE(offset) (*(volatile unsigned char *)(IO_START + (offset))) -#define IO_WORD(offset) (*(volatile unsigned long *)(IO_START + (offset))) - -#define IO_PADR IO_BYTE(PADR) -#define IO_PBDR IO_BYTE(PBDR) -#define IO_PDDR IO_BYTE(PDDR) -#define IO_PADDR IO_BYTE(PADDR) -#define IO_PBDDR IO_BYTE(PBDDR) -#define IO_PDDDR IO_BYTE(PDDDR) -#define IO_PEDR IO_BYTE(PEDR) -#define IO_PEDDR IO_BYTE(PEDDR) -#define IO_SYSCON IO_WORD(SYSCON) -#define IO_SYSFLG IO_WORD(SYSFLG) -#define IO_MEMCFG1 IO_WORD(MEMCFG1) -#define IO_MEMCFG2 IO_WORD(MEMCFG2) -#define IO_DRFPR IO_WORD(DRFPR) -#define IO_INTSR IO_WORD(INTSR) -#define IO_INTMR IO_WORD(INTMR) -#define IO_LCDCON IO_WORD(LCDCON) -#define IO_TC1D IO_WORD(TC1D) -#define IO_TC2D IO_WORD(TC2D) -#define IO_RTCDR IO_WORD(RTCDR) -#define IO_RTCMR IO_WORD(RTCMR) -#define IO_PMPCON IO_WORD(PMPCON) -#define IO_CODR IO_BYTE(CODR) -#define IO_UARTDR IO_WORD(UARTDR) -#define IO_UBRLCR IO_WORD(UBRLCR) -#define IO_SYNCIO IO_WORD(SYNCIO) -#define IO_PALLSW IO_WORD(PALLSW) -#define IO_PALMSW IO_WORD(PALMSW) -#define IO_STFCLR IO_WORD(STFCLR) -#define IO_BLEOI IO_WORD(BLEOI) -#define IO_MCEOI IO_WORD(MCEOI) -#define IO_TEOI IO_WORD(TEOI) -#define IO_TC1EOI IO_WORD(TC1EOI) -#define IO_TC2EOI IO_WORD(TC2EOI) -#define IO_RTCEOI IO_WORD(RTCEOI) -#define IO_UMSEOI IO_WORD(UMSEOI) -#define IO_COEOI IO_WORD(COEOI) -#define IO_HALT IO_WORD(HALT) -#define IO_STDBY IO_WORD(STDBY) -#define IO_SYSCON1 IO_WORD(SYSCON1) -#define IO_SYSFLG1 IO_WORD(SYSFLG1) -#define IO_INTSR1 IO_WORD(INTSR1) -#define IO_INTMR1 IO_WORD(INTMR1) -#define IO_UARTDR1 IO_WORD(UARTDR1) -#define IO_UBRLCR1 IO_WORD(UBRLCR1) -#define IO_FRBADDR IO_WORD(FRBADDR) -#define IO_SYSCON2 IO_WORD(SYSCON2) -#define IO_SYSFLG2 IO_WORD(SYSFLG2) -#define IO_INTSR2 IO_WORD(INTSR2) -#define IO_INTMR2 IO_WORD(INTMR2) -#define IO_UARTDR2 IO_WORD(UARTDR2) -#define IO_UBRLCR2 IO_WORD(UBRLCR2) -#define IO_KBDEOI IO_WORD(KBDEOI) - -#define IO_MCCR IO_WORD(MCCR) -#define IO_MCDR0 IO_WORD(MCDR0) -#define IO_MCDR1 IO_WORD(MCDR1) -#define IO_MCDR2 IO_WORD(MCDR2) -#define IO_MCSR IO_WORD(MCSR) -#define IO_SYSCON3 IO_WORD(SYSCON3) -#define IO_INTSR3 IO_WORD(INTSR3) -#define IO_INTMR3 IO_WORD(INTMR3) -#define IO_LEDFLSH IO_WORD(LEDFLSH) - -#endif /* __ASM_HARDWARE_CLPS7111_H */ -- cgit v1.2.3 From 53c41548a9fd7f0595c81c47e1ac3d9671d753e4 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Thu, 18 Oct 2012 10:15:45 +0000 Subject: arm: arm925t: remove SX1 board SX1 does not build properly by itself, is not built as part of MAKEALL arm or MAKEALL -a arm, and is only present in Makefile, not boards.cfg. As it also has no entry in MAINTAINERS, it is orphan and non-functional. Remove it. Signed-off-by: Albert ARIBAUD --- include/configs/SX1.h | 189 -------------------------------------------------- 1 file changed, 189 deletions(-) delete mode 100644 include/configs/SX1.h (limited to 'include') diff --git a/include/configs/SX1.h b/include/configs/SX1.h deleted file mode 100644 index 93d031ca8..000000000 --- a/include/configs/SX1.h +++ /dev/null @@ -1,189 +0,0 @@ -/* - * (C) Copyright 2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM925T 1 /* This is an arm925t CPU */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */ -#define CONFIG_OMAP_SX1 1 /* a SX1 Board */ - -/* input clock of PLL */ -#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */ - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */ -#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */ - -/* - * select serial console configuration - */ -#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */ - -/* - * USB device configuration - */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 - -#define CONFIG_USBD_VENDORID 0x1234 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Siemens" -#define CONFIG_USBD_PRODUCT_NAME "SX1" - -/* - * I2C configuration - */ -#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP1510_I2C - -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_I2C - -#undef CONFIG_CMD_NET - - -#include - -#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw" -#ifdef CONFIG_STDOUT_USBTTY -#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty" -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ - -/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. - * This time is further subdivided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - * V1 - * PHYS_FLASH_SIZE_1 (16 << 10) 16 MB - * PHYS_FLASH_SIZE_2 (8 << 10) 8 MB - * V2 only 1 flash - * PHYS_FLASH_SIZE_1 (32 << 10) 32 MB - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */ -#define CONFIG_SYS_MAX_FLASH_SECT (256) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ -#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, PHYS_FLASH_2 } - -/*----------------------------------------------------------------------- - * FLASH driver setup - */ -#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */ -#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_SIZE_REDUND 0x20000 -#define CONFIG_ENV_OFFSET_REDUND 0x40000 - -#endif /* __CONFIG_H */ -- cgit v1.2.3