From 4f355d3406e7e422e277586de15fb85d39ce34b3 Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Fri, 2 Mar 2012 14:20:31 -0800 Subject: overo: support 200Mhz memory on 37XX Signed-off-by: Steve Sakoman --- board/overo/overo.c | 30 ++++++++++++++++++++++-------- 1 file changed, 22 insertions(+), 8 deletions(-) (limited to 'board') diff --git a/board/overo/overo.c b/board/overo/overo.c index c6d50a07a..a94b85bf1 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -159,16 +159,30 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */ - *mcfg = MICRON_V_MCFG_165(256 << 20); - *ctrla = MICRON_V_ACTIMA_165; - *ctrlb = MICRON_V_ACTIMB_165; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + if (get_cpu_family() != CPU_OMAP36XX) { + *mcfg = MICRON_V_MCFG_165(256 << 20); + *ctrla = MICRON_V_ACTIMA_165; + *ctrlb = MICRON_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + } else { + *mcfg = MICRON_V_MCFG_200(256 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } break; case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */ - *mcfg = HYNIX_V_MCFG_165(256 << 20); - *ctrla = HYNIX_V_ACTIMA_165; - *ctrlb = HYNIX_V_ACTIMB_165; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + if (get_cpu_family() != CPU_OMAP36XX) { + *mcfg = HYNIX_V_MCFG_165(256 << 20); + *ctrla = HYNIX_V_ACTIMA_165; + *ctrlb = HYNIX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + } else { + *mcfg = HYNIX_V_MCFG_200(256 << 20); + *ctrla = HYNIX_V_ACTIMA_200; + *ctrlb = HYNIX_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } break; default: *mcfg = MICRON_V_MCFG_165(128 << 20); -- cgit v1.2.3