From 2e0c1c7d5cafb92f7bee9c8ac4b69f5bed075c67 Mon Sep 17 00:00:00 2001 From: Jason Cooper <[u-boot@lakedaemon.net]> Date: Mon, 3 Oct 2011 13:49:53 +0530 Subject: dreamplug: initial board support. Copied wholeheartedly from board/Marvell/guruplug and modified to add support for SPI NOR flash. CONFIG_MACH_DREAMPLUG defined in include/configs/dreamplug.h until Linus's kernel.org tree adds it to mach-types.h. Once it trickles down, the definition can be removed from include/configs/dreamplug.h. Signed-off-by: Jason Cooper --- board/Marvell/dreamplug/Makefile | 54 ++++++++++++ board/Marvell/dreamplug/dreamplug.c | 151 ++++++++++++++++++++++++++++++++ board/Marvell/dreamplug/dreamplug.h | 42 +++++++++ board/Marvell/dreamplug/kwbimage.cfg | 163 +++++++++++++++++++++++++++++++++++ 4 files changed, 410 insertions(+) create mode 100644 board/Marvell/dreamplug/Makefile create mode 100644 board/Marvell/dreamplug/dreamplug.c create mode 100644 board/Marvell/dreamplug/dreamplug.h create mode 100644 board/Marvell/dreamplug/kwbimage.cfg (limited to 'board/Marvell') diff --git a/board/Marvell/dreamplug/Makefile b/board/Marvell/dreamplug/Makefile new file mode 100644 index 000000000..9ee5406a3 --- /dev/null +++ b/board/Marvell/dreamplug/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2011 +# Jason Cooper +# +# Based on work by: +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := dreamplug.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c new file mode 100644 index 000000000..13b401361 --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.c @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2011 + * Jason Cooper + * + * Based on work by: + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include "dreamplug.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(DREAMPLUG_OE_VAL_LOW, + DREAMPLUG_OE_VAL_HIGH, + DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, /* SPI Flash */ + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, /* Serial */ + MPP11_UART0_RXD, + MPP12_SD_CLK, /* SDIO Slot */ + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, /* Gigabit Ethernet */ + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, /* 7 external GPIO pins (36 - 45) */ + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_TDM_SPI_SCK, + MPP41_TDM_SPI_MISO, + MPP42_TDM_SPI_MOSI, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, /* Bluetooth LED */ + MPP48_GPIO, /* Wifi LED */ + MPP49_GPIO, /* Wifi AP LED */ + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1116_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1116 Initialized on %s\n", name); +} + +void reset_phy(void) +{ + /* configure and initialize both PHY's */ + mv_phy_88e1116_init("egiga0"); + mv_phy_88e1116_init("egiga1"); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h new file mode 100644 index 000000000..ad5ffcf7b --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2011 + * Jason Cooper + * + * Based on work by: + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __DREAMPLUG_H +#define __DREAMPLUG_H + +#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + +/* PHY related */ +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __DREAMPLUG_H */ diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg new file mode 100644 index 000000000..ca9cd744f --- /dev/null +++ b/board/Marvell/dreamplug/kwbimage.cfg @@ -0,0 +1,163 @@ +# +# (C) Copyright 2011 +# Jason Cooper +# +# Based on work by: +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b9b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 01, Cs0width=x8 +# bit3-2: 10, Cs0size=1Gb +# bit5-4: 01, Cs1width=x8 +# bit7-6: 10, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 -- cgit v1.2.3 From daa4b2f7f5e023dffa272e86b0f271b07f9813b8 Mon Sep 17 00:00:00 2001 From: Ajay Bhargav <[ajay.bhargav@einfochips.com]> Date: Mon, 3 Oct 2011 14:00:57 +0530 Subject: Armada100: Add SPI support for Marvell gplugD This patch add SPI driver support for Marvell gplugD Signed-off-by: Ajay Bhargav --- board/Marvell/gplugd/gplugd.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'board/Marvell') diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c index b4f7f8158..42c838955 100644 --- a/board/Marvell/gplugd/gplugd.c +++ b/board/Marvell/gplugd/gplugd.c @@ -72,6 +72,12 @@ int board_early_init_f(void) MFP101_ETH_MDIO, MFP103_ETH_RXDV, + /* SSP2 */ + MFP107_SSP2_RXD, + MFP108_SSP2_TXD, + MFP110_SSP2_CS, + MFP111_SSP2_CLK, + MFP_EOC /*End of configuration*/ }; /* configure MFP's */ @@ -81,6 +87,9 @@ int board_early_init_f(void) int board_init(void) { + struct armd1apb2_registers *apb2_regs = + (struct armd1apb2_registers *)ARMD1_APBC2_BASE; + /* arch number of Board */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD; /* adress of boot parameters */ @@ -90,6 +99,9 @@ int board_init(void) udelay(10); /* Deassert PHY_RST# */ gpio_set_value(CONFIG_SYS_GPIO_PHY_RST, GPIO_HIGH); + + /* Enable SSP2 clock */ + writel(SSP2_APBCLK | SSP2_FNCLK, &apb2_regs->ssp2_clkrst); return 0; } -- cgit v1.2.3 From ab1b95521174e6705abec72c5f1756e8cdb22016 Mon Sep 17 00:00:00 2001 From: Lei Wen <[leiwen@marvell.com]> Date: Tue, 18 Oct 2011 19:50:48 +0530 Subject: ARM: armada100: reduce dependence of including platform file For files like the drivers/serial/serial.c, it must include the platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in the platform definition files. Include the platform definition file in the config file, so that it would decouple the dependence for the driver files. Updated cpu.h to remove build errors for gplugd board (by prafulla) Signed-off-by: Lei Wen Signed-off-by: Prafulla Wadaskar --- board/Marvell/aspenite/aspenite.c | 1 + 1 file changed, 1 insertion(+) (limited to 'board/Marvell') diff --git a/board/Marvell/aspenite/aspenite.c b/board/Marvell/aspenite/aspenite.c index 34ac7aa55..3be33bf77 100644 --- a/board/Marvell/aspenite/aspenite.c +++ b/board/Marvell/aspenite/aspenite.c @@ -25,6 +25,7 @@ #include #include +#include #include #include -- cgit v1.2.3 From a7efd719f415833a833d6a8e46bcd470a0847ecc Mon Sep 17 00:00:00 2001 From: Lei Wen <[leiwen@marvell.com]> Date: Tue, 18 Oct 2011 20:11:42 +0530 Subject: ARM: kirkwood: reduce dependence of including platform file For files like the drivers/serial/serial.c, it must include the platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in the platform definition files. Include the platform definition file in the config file, so that it would decouple the dependence for the driver files. Signed-off-by: Lei Wen --- board/Marvell/guruplug/guruplug.c | 1 + board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 1 + board/Marvell/openrd/openrd.c | 1 + board/Marvell/rd6281a/rd6281a.c | 1 + board/Marvell/sheevaplug/sheevaplug.c | 1 + 5 files changed, 5 insertions(+) (limited to 'board/Marvell') diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c index 1f0e67a7f..057c55868 100644 --- a/board/Marvell/guruplug/guruplug.c +++ b/board/Marvell/guruplug/guruplug.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include "guruplug.h" diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c index 80fd20b7f..4c41f3b2e 100644 --- a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c @@ -26,6 +26,7 @@ #include #include +#include #include #include #include "mv88f6281gtw_ge.h" diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c index 87939decf..2a10e69fa 100644 --- a/board/Marvell/openrd/openrd.c +++ b/board/Marvell/openrd/openrd.c @@ -29,6 +29,7 @@ #include #include +#include #include #include #include "openrd.h" diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c index ecdea82d9..9c768bf59 100644 --- a/board/Marvell/rd6281a/rd6281a.c +++ b/board/Marvell/rd6281a/rd6281a.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include "rd6281a.h" diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index d7dc80c1b..71e679309 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include "sheevaplug.h" -- cgit v1.2.3 From cebad16461dc5f1849bd0c9e8353a0e7af1a119b Mon Sep 17 00:00:00 2001 From: Prafulla Wadaskar Date: Tue, 18 Oct 2011 20:05:47 +0530 Subject: gplug: fixed build error as a result of code cleanup patch Signed-off-by: Prafulla Wadaskar --- board/Marvell/gplugd/gplugd.c | 1 + 1 file changed, 1 insertion(+) (limited to 'board/Marvell') diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c index 42c838955..a697c19de 100644 --- a/board/Marvell/gplugd/gplugd.c +++ b/board/Marvell/gplugd/gplugd.c @@ -30,6 +30,7 @@ #include #include +#include #include #include #include -- cgit v1.2.3 From 19d3dbe2440d7efdf0e7c1d7c489cccbbdb44171 Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Mon, 3 Oct 2011 20:33:42 +0000 Subject: Marvell: dkb: add mmc support Signed-off-by: Lei Wen --- board/Marvell/dkb/dkb.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'board/Marvell') diff --git a/board/Marvell/dkb/dkb.c b/board/Marvell/dkb/dkb.c index 00f73e79f..4a9abee0f 100644 --- a/board/Marvell/dkb/dkb.c +++ b/board/Marvell/dkb/dkb.c @@ -24,8 +24,12 @@ #include #include +#include #include #include +#ifdef CONFIG_GENERIC_MMC +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -40,6 +44,20 @@ int board_early_init_f(void) MFP53_CI2C_SCL, MFP54_CI2C_SDA, + /* MMC1 */ + MFP_MMC1_DAT7, + MFP_MMC1_DAT6, + MFP_MMC1_DAT5, + MFP_MMC1_DAT4, + MFP_MMC1_DAT3, + MFP_MMC1_DAT2, + MFP_MMC1_DAT1, + MFP_MMC1_DAT0, + MFP_MMC1_CMD, + MFP_MMC1_CLK, + MFP_MMC1_CD, + MFP_MMC1_WP, + MFP_EOC /*End of configureation*/ }; /* configure MFP's */ @@ -56,3 +74,28 @@ int board_init(void) gd->bd->bi_boot_params = panth_sdram_base(0) + 0x100; return 0; } + +#ifdef CONFIG_GENERIC_MMC +#define I2C_SLAVE_ADDR 0x34 +#define LDO13_REG 0x28 +#define LDO_V30 0x6 +#define LDO_VOLTAGE(x) ((x & 0x7) << 1) +#define LDO_EN 0x1 +int board_mmc_init(bd_t *bd) +{ + ulong mmc_base_address[CONFIG_SYS_MMC_NUM] = CONFIG_SYS_MMC_BASE; + u8 i, data; + + /* set LDO 13 to 3.0v */ + data = LDO_VOLTAGE(LDO_V30) | LDO_EN; + i2c_write(I2C_SLAVE_ADDR, LDO13_REG, 1, &data, 1); + + for (i = 0; i < CONFIG_SYS_MMC_NUM; i++) { + if (mv_sdh_init(mmc_base_address[i], 0, 0, + SDHCI_QUIRK_32BIT_DMA_ADDR)) + return 1; + } + + return 0; +} +#endif -- cgit v1.2.3