From c56f84ca9c86d7b9ac4a79ce6c9569aa8b851833 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 23 Nov 2010 14:32:06 +0100 Subject: ppc4xx: Fix build problems of IBM DDR2 NAND booting targets This change is needed to compile the PPC4xx NAND booting targets equipped with the IBM DDR2 SDRAM controller. Signed-off-by: Stefan Roese Cc: Wolfgang Denk Acked-by: Stefan Roese --- board/amcc/canyonlands/canyonlands.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index faa3720df..80e2739fe 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -363,18 +363,6 @@ int checkboard(void) } #endif /* !defined(CONFIG_ARCHES) */ -#if defined(CONFIG_NAND_U_BOOT) -/* - * NAND booting U-Boot version uses a fixed initialization, since the whole - * I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot - * code. - */ -phys_size_t initdram(int board_type) -{ - return CONFIG_SYS_MBYTES_SDRAM << 20; -} -#endif - #if defined(CONFIG_PCI) int board_pcie_first(void) { -- cgit v1.2.3