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The current ca9x4_ct_vxp platform contains support for a Versatile Express
motherboard with a quad core A9 core tile.
This patch is the first stage of making separating the Versatile Express
motherboard code and the A9 specific code, before adding support for the
dual core A5 core tile.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2. As such, card configuration specifics need
to reside in the board file rather than the driver.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
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commit f31a911fe (arm, post: add missing post_time_ms for arm)
enables get_ticks and get_tbclk for all arm based boards,
arm/vexpress also needs these functions to work.
Signed-off-by: Liming Wang <walimisdev@gmail.com>
Acked-by: Matt.Waddel@linaro.org
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Add a header file with the missing function prototype to fix
ca9x4_ct_vxp.c: In function 'cpu_mmc_init':
ca9x4_ct_vxp.c:93: warning: implicit declaration of function 'arm_pl180_mmci_init'
introduced by commit "ARMV7: Vexpress: Add MMC support"
(f0c64526b7e51ba997a0f1baf9e74e6d497b957e)
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Matt Waddel <matt.waddel@linaro.org>
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Added the board specific definitions to use the MMCI device.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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Fix ca9x4_ct_vxp build error
Configuring for ca9x4_ct_vxp board...
board/armltd/vexpress/libvexpress.o: In function `udelay':
u-boot.git/board/armltd/vexpress/ca9x4_ct_vxp.c:161: multiple
definition of `udelay'
lib/libgeneric.o:u-boot.git/lib/time.c:34: first defined here
lib/libgeneric.o: In function `udelay':
zlib.c:(.text+0x1ee8): undefined reference to `__udelay'
Signed-of-by: Dirk Behme <dirk.behme@googlemail.com>
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Fixed "pointer from integer without a cast" warnings in Vexpress.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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Adds support for the ARM quad-core Cortex-A9 processor
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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