path: root/arch/powerpc/cpu/mpc8xxx/ddr/main.c
AgeCommit message (Expand)Author
2012-10-22powerpc/mpc8xxx: Fix DDR SPD failed messageYork Sun
2012-10-22powerpc/mpc8xxx: Fix DDR initialization waiting for D_INITYork Sun
2012-08-23powerpc/mpc8xxx DDR: Fall back to raw timing for first controller onlyYork Sun
2012-08-23powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleavingYork Sun
2012-08-08powerpc/ddr: fix fsl_ddr_get_dimm_params compile errorShaohui Xie
2011-10-09powerpc/8xxx: Add support for interactive DDR programming interfaceYork Sun
2011-09-29powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slotsYork Sun
2011-07-11powerpc/mpc8xxx: Adding fallback to raw timing on supported boardsYork Sun
2011-07-11powerpc/mpc8xxx: Enable calculation for fixed DDR chipsYork Sun
2011-07-11powerpc/mpc8xxx: Add 16-bit support for DDR3York Sun
2011-04-04powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from boardKumar Gala
2011-01-198xxx/ddr: add support to only compute the ddr sdram sizeHaiying Wang
2011-01-14MPC8xxx DDR: align informational printsBecky Bruce
2010-07-26powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4york
2010-04-21Move arch/ppc to arch/powerpcStefan Roese