Age | Commit message (Collapse) | Author |
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Signed-off-by: John Rigby <john.rigby@linaro.org>
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Now that timers are fixed, set bootdelay to a reasonable value.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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udelay calls were off due to failing to convert us to ns. Fix this and drop
the unnecessary shifts since NS_PER_TICK is only 7ns.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Make some space at the beginning of RAM so the FDT can be loaded to a
fixed address.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Add support to read the boot src register and set bootcmd env from the
selected bootcmdX env setting.
Based on Linkstation boot choice selection.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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its name didn't match what cmd_pxe wanted, still.
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Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
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Implement reset for highbank platform. Reset is triggered via a wfi
instruction, so enabling armv7 for the compiler is necessary.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Add boot counter support using an sysreg which is persistent across reset.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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This enables the XGMAC ethernet driver and networking related config
options.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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This adds ethernet driver for Calxeda xgmac found on Highbank SOC.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-Convert register base plus offset to struct
-drop ethaddr env setting
-drop valid mac address check
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If the net driver has setup a valid ethernet address and an ethernet
address is not set in the environment already, then set the environment
variables from the net driver setting
This enables pxe booting on boards which don't set ethaddr env variable.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Signed-off-by: John Rigby <john.rigby@linaro.org>
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The early init does not take for some reason or is not called at all?
This works around the problem while search for what is really going on.
Signed-off-by: John Rigby <john.rigby@linaro.org>
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Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Fabio Estevam <festevam@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
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The i.MX6 processor can boot from NOR flash and SATA disks,
additionally. Add the flash offsets for these additional
boot modes.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
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i.MX53 is supported, too. Add this to the introduction of the
documentation.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Fabio Estevam <festevam@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
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The commit message of a28afca (Add uboot "fdt_high" enviroment variable)
states that fdt_high behaves similarly to the existing initrd_high.
But fdt_high actually has an outstanding difference from initrd_high.
The former specifies the start address, while the later specifies the
end address.
As fdt_high and initrd_high will likely be used together, it'd be nice
to have them behave same. The patch changes the behavior of fdt_high
to have it aligned with initrd_high.
The document of fdt_high in README is updated with an example to
demonstrate the usage of this environment variable.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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To be able to load the device tree and initrd correctly, set
the fdt_high and initrd_high environment variables.
Using 0xffffffff implies that the device tree and the initrd
are initially copied to working addresses. This will avoid an
additional copy.
Loading the device tree to 0x30000000 and the initrd to 0x3c000000
should work for both boards, the ARM2 and SabreLite.
Example (SabreLite):
fatload mmc 0:2 0x10000000 uImage
fatload mmc 0:2 0x3c000000 uInitrd
fatload mmc 0:2 0x30000000 board.dtb
bootm 0x10000000 0x3c000000 0x30000000
Note: This requires that the kernel has CONFIG_HIGHMEM enabled.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
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The uart txd pad can also provide the rxd
function. But it does not stop its tx role.
This could be used for a half duplex serial port.
Change names to reduce confusion.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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This allows Linux kernel to use UART1 before pinmux
support is added for UART1
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Allow boards to change what is advertised before an autoneg
restart happens
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.
Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.
Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
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Register 0x106 is tx data delay register.
With this patch, gigabit mode still does not work reliably.
Ping shows about a 10% packet loss on large packets.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Previously, only GIGE phy was supported in this function.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Timeouts were happening to soon for some switches
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Also, print negotiated speed
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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For the i.mx6q, the burned-in MAC address will be the following odering,
fuse: 0x620[7:0] MAC_ADDR[7:0] ---> mac[5]
fuse: 0x620[15:8] MAC_ADDR[15:8] ---> mac[4]
fuse: 0x620[23:16] MAC_ADDR[23:16] ---> mac[3]
fuse: 0x620[31:24] MAC_ADDR[31:24] ---> mac[2]
fuse: 0x630[7:0] MAC_ADDR[39:32] ---> mac[1]
fuse: 0x630[15:8] MAC_ADDR[47:40] ---> mac[0]
This patch also fix the error caculation for the fuse bank[0] address
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
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Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Init peripheral access control register of AIPSTZ OPACRx:
Buffer Writes(BW): 0 -> not bufferable,
Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses.
Write Protect(WP): 0 -> allows write accesses.
Trusted Protect(TP): 0 -> allows unstrusted master
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
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init core regulator to 1.2V
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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Since commit 97039ab98 (env_mmc: Allow board code to override the environment address)
mmc_get_env_addr is a weak-aliased function in common/env_mmc.c
The mmc_get_env_addr implementation that exists at
board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards,
but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined.
Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use
the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate
this config option on their board file.
This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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Signed-off-by: Eric Miao <eric.miao@linaro.org>
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Add the initial support for Freescale i.MX6Q Sabre Lite board
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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The mmc host controller on the i.mx6q is called usdhc which
is redesigned based on the freescale esdhc controller.
The usdhc controller is almost compatible with esdhc except
it adds one mix register to support debug/SD3.0 and move
the low bit 0-6 of XFERTYP register to the mix control reg
low bit 0-6. Thus on i.mx6q, we have the following compared
with the previous soc: (can refer to RM of chapter 56.3.3)
i.mx6q:
mix control:
bit 31 - bit 7: Added for debug/SD3.0 support
bit 6 - bit 0: move in the XFERTYP register bit 6-0 on previous soc
XFERTYP register:
bit 31 - bit 7: the same as before,
bit 6 - bit 0: no-use
previous soc
mix control: no
XFERTYP register:
bit 31 - bit 0: xfertype information
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
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This patch adds support for mmc spl booting.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
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SMDK5250 board is based on Samsungs EXYNOS5250 SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
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Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of
SoCs. This patch adds the support for Exynos5.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
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