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Diffstat (limited to 'board/freescale/mx53loco/mx53loco.c')
-rw-r--r--board/freescale/mx53loco/mx53loco.c93
1 files changed, 93 insertions, 0 deletions
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index d736141e2..bf1c0a5ec 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -35,6 +35,7 @@
#include <mmc.h>
#include <fsl_esdhc.h>
#include <asm/gpio.h>
+#include <da9053.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -290,6 +291,93 @@ int board_mmc_init(bd_t *bis)
}
#endif
+static void setup_i2c(unsigned int port_number)
+{
+ switch (port_number) {
+ case 0:
+ /* i2c1 SDA */
+ mxc_request_iomux(MX53_PIN_CSI0_D8,
+ IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_input(MX53_I2C1_IPP_SDA_IN_SELECT_INPUT,
+ INPUT_CTL_PATH0);
+ mxc_iomux_set_pad(MX53_PIN_CSI0_D8,
+ PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+ PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL |
+ PAD_CTL_ODE_OPENDRAIN_ENABLE);
+ /* i2c1 SCL */
+ mxc_request_iomux(MX53_PIN_CSI0_D9,
+ IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_input(MX53_I2C1_IPP_SCL_IN_SELECT_INPUT,
+ INPUT_CTL_PATH0);
+ mxc_iomux_set_pad(MX53_PIN_CSI0_D9,
+ PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+ PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL |
+ PAD_CTL_ODE_OPENDRAIN_ENABLE);
+ break;
+ case 1:
+ /* i2c2 SDA */
+ mxc_request_iomux(MX53_PIN_KEY_ROW3,
+ IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_input(MX53_I2C2_IPP_SDA_IN_SELECT_INPUT,
+ INPUT_CTL_PATH0);
+ mxc_iomux_set_pad(MX53_PIN_KEY_ROW3,
+ PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+ PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE |
+ PAD_CTL_ODE_OPENDRAIN_ENABLE);
+
+ /* i2c2 SCL */
+ mxc_request_iomux(MX53_PIN_KEY_COL3,
+ IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_input(MX53_I2C2_IPP_SCL_IN_SELECT_INPUT,
+ INPUT_CTL_PATH0);
+ mxc_iomux_set_pad(MX53_PIN_KEY_COL3,
+ PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+ PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE |
+ PAD_CTL_ODE_OPENDRAIN_ENABLE);
+ break;
+ default:
+ printf("Warning: Wrong I2C port number\n");
+ break;
+ }
+}
+
+static void clock_init(void)
+{
+ int ret;
+ u32 ref_clk = CONFIG_SYS_MX5_HCLK;
+ /*
+ * After increase voltage to 1.25V, We can switch
+ * CPU clokc to 1Ghz and DDR to 400Mhz safely now
+ */
+ ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
+ if (!ret)
+ printf("CPU: Switch CPU clock to 1GHZ OK\n");
+ else
+ printf("CPU: Switch CPU clock to 1GHZ failed\n");
+
+ ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
+ ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
+ if (!ret)
+ printf("DDR: Switch DDR clock to 400MHz OK\n");
+ else
+ printf("CPU: Switch DDR clock to 1GHZ failed\n");
+}
+
+static void power_init(void)
+{
+ unsigned int val;
+
+ /* Set VDDA to 1.25V */
+ val = DA9052_BUCKCORE_BCOREEN;
+ val |= DA_BUCKCORE_VBCORE_1_250V;
+ pmic_reg_write(DA9053_BUCKCORE_REG, val);
+ val = pmic_reg_read(DA9053_SUPPLY_REG);
+ val |= DA9052_SUPPLY_VBCOREGO;
+ pmic_reg_write(DA9053_SUPPLY_REG, val);
+}
+
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -302,6 +390,11 @@ int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+#ifdef CONFIG_I2C_MXC
+ setup_i2c(0);
+ power_init();
+ clock_init();
+#endif
return 0;
}