diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/main.c | 12 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/util.c | 4 |
2 files changed, 13 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c index b47268c20..2885906e8 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c @@ -526,6 +526,17 @@ phys_size_t fsl_ddr_sdram(void) #endif total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0); + /* setup 3-way interleaving before enabling DDRC */ + switch (info.memctl_opts[0].memctl_interleaving_mode) { + case FSL_DDR_3WAY_1KB_INTERLEAVING: + case FSL_DDR_3WAY_4KB_INTERLEAVING: + case FSL_DDR_3WAY_8KB_INTERLEAVING: + fsl_ddr_set_intl3r(info.memctl_opts[0].memctl_interleaving_mode); + break; + default: + break; + } + /* Program configuration registers. */ for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { debug("Programming controller %u\n", i); @@ -561,7 +572,6 @@ phys_size_t fsl_ddr_sdram(void) case FSL_DDR_3WAY_8KB_INTERLEAVING: law_memctl = LAW_TRGT_IF_DDR_INTLV_123; if (i == 0) { - fsl_ddr_set_intl3r(info.memctl_opts[i].memctl_interleaving_mode); fsl_ddr_set_lawbar(&info.common_timing_params[i], law_memctl, i); } diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c index b439cc975..afc5fae49 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c @@ -142,13 +142,13 @@ void board_add_ram_info(int use_default) #if CONFIG_NUM_DDR_CONTROLLERS >= 2 if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { - ddr = (void *)CONFIG_SYS_MPC85xx_DDR2_ADDR; + ddr = (void __iomem *)CONFIG_SYS_MPC85xx_DDR2_ADDR; sdram_cfg = in_be32(&ddr->sdram_cfg); } #endif #if CONFIG_NUM_DDR_CONTROLLERS >= 3 if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { - ddr = (void *)CONFIG_SYS_MPC85xx_DDR3_ADDR; + ddr = (void __iomem *)CONFIG_SYS_MPC85xx_DDR3_ADDR; sdram_cfg = in_be32(&ddr->sdram_cfg); } #endif |