diff options
| -rw-r--r-- | board/freescale/common/sgmii_riser.c | 3 | ||||
| -rw-r--r-- | cpu/mpc85xx/ddr-gen3.c | 4 | ||||
| -rw-r--r-- | drivers/net/tsec.c | 7 | ||||
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 2 |
4 files changed, 6 insertions, 10 deletions
diff --git a/board/freescale/common/sgmii_riser.c b/board/freescale/common/sgmii_riser.c index aeacb91bc..4f40a1d6d 100644 --- a/board/freescale/common/sgmii_riser.c +++ b/board/freescale/common/sgmii_riser.c @@ -47,7 +47,6 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt) const char *model; const char *path; - printf("Updating PHY address for %s\n", dev->name); if (!strstr(dev->name, "eTSEC")) continue; @@ -64,7 +63,6 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt) model = fdt_getprop(fdt, enet_node, "model", NULL); - printf("%s's model is %s\n", enet, model); /* * We only want to do this to eTSECs. On some platforms * there are more than one type of gianfar-style ethernet @@ -84,7 +82,6 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt) priv = dev->priv; - printf("Device flags are %x\n", priv->flags); if (priv->flags & TSEC_SGMII) fdt_setprop_cell(fdt, phynode, "reg", priv->phyaddr); } diff --git a/cpu/mpc85xx/ddr-gen3.c b/cpu/mpc85xx/ddr-gen3.c index 8dc2b3ac5..99c325a4f 100644 --- a/cpu/mpc85xx/ddr-gen3.c +++ b/cpu/mpc85xx/ddr-gen3.c @@ -79,8 +79,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, out_be32(&ddr->ddr_sdram_rcw_1, regs->ddr_sdram_rcw_1); out_be32(&ddr->ddr_sdram_rcw_2, regs->ddr_sdram_rcw_2); - /* Do not enable the memory */ - temp_sdram_cfg = in_be32(&ddr->sdram_cfg); + /* Set, but do not enable the memory */ + temp_sdram_cfg = regs->ddr_sdram_cfg; temp_sdram_cfg &= ~(SDRAM_CFG_MEM_EN); out_be32(&ddr->sdram_cfg, temp_sdram_cfg); /* diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 1f5d1b44a..399116f3a 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -1624,7 +1624,7 @@ struct phy_info *phy_info[] = { &phy_info_VSC8601, &phy_info_dp83865, &phy_info_rtl8211b, - &phy_info_generic, + &phy_info_generic, /* must be last; has ID 0 and 32 bit mask */ NULL }; @@ -1656,9 +1656,8 @@ struct phy_info *get_phy_info(struct eth_device *dev) } } - if (theInfo == NULL) { - printf("%s: PHY id %x is not supported!\n", dev->name, phy_ID); - return NULL; + if (theInfo == &phy_info_generic) { + printf("%s: No support for PHY id %x; assuming generic\n", dev->name, phy_ID); } else { debug("%s: PHY is %s (%x)\n", dev->name, theInfo->name, phy_ID); } diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 7b97fe0bd..094fb9c5d 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1667,7 +1667,7 @@ typedef struct ccsr_gur { uint lbiuiplldcr0; /* 0xe0f1c -- LBIU PLL Debug Reg 0 */ uint lbiuiplldcr1; /* 0xe0f20 -- LBIU PLL Debug Reg 1 */ uint ddrioovcr; /* 0xe0f24 - DDR IO Override Control */ - uint res14; /* 0xe0f28 */ + uint tsec12ioovcr; /* 0xe0f28 - eTSEC 1/2 IO override control */ uint tsec34ioovcr; /* 0xe0f2c - eTSEC 3/4 IO override control */ char res15[61648]; /* 0xe0f30 to 0xefffff */ } ccsr_gur_t; |