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authorYuri Tikhonov <yur@pollux.denx.de>2008-03-18 13:33:30 +0100
committerWolfgang Denk <wd@denx.de>2008-03-18 22:05:37 +0100
commit3a5d1e7f1309998791702b2a559e3126781746b9 (patch)
tree67cf794bd12ecd4ef8609387c3aef9578db3a6f5 /post/board
parent0f855a1f056a8c22116a2103a3900cbfb669df0b (diff)
downloadu-boot-linaro-stable-3a5d1e7f1309998791702b2a559e3126781746b9.tar.gz
lwmon5: Fix register test logic to match the specific GDC h/w.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Diffstat (limited to 'post/board')
-rw-r--r--post/board/lwmon5/gdc.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/post/board/lwmon5/gdc.c b/post/board/lwmon5/gdc.c
index 0e4f0fd33..aa1eee05f 100644
--- a/post/board/lwmon5/gdc.c
+++ b/post/board/lwmon5/gdc.c
@@ -35,7 +35,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#define GDC_SCRATCH_REG 0xC1FF8008
+#define GDC_SCRATCH_REG 0xC1FF8044
#define GDC_VERSION_REG 0xC1FF8084
#define GDC_RAM_START 0xC0000000
#define GDC_RAM_END 0xC2000000
@@ -44,7 +44,7 @@ DECLARE_GLOBAL_DATA_PTR;
static int gdc_test_reg_one(uint value)
{
- int ret = 0;
+ int ret;
uint read_value;
/* write test pattern */
@@ -56,10 +56,9 @@ static int gdc_test_reg_one(uint value)
if (read_value != value) {
post_log("GDC SCRATCH test failed write %08X, read %08X\n",
value, read_value);
- ret = 1;
}
- return ret;
+ return (read_value != value);
}
/* Verify GDC, get memory size */
@@ -71,9 +70,16 @@ int gdc_post_test(int flags)
post_log("\n");
old_value = in_be32((void *)GDC_SCRATCH_REG);
- if (gdc_test_reg_one(0x55555555))
+ /*
+ * GPIOC2 register behaviour: the LIME graphics processor has a
+ * maximum of 5 GPIO ports that can be used in this hardware
+ * configuration. Thus only the bits for these 5 GPIOs can be
+ * activated in the GPIOC2 register. All other bits will always be
+ * read as zero.
+ */
+ if (gdc_test_reg_one(0x00150015))
ret = 1;
- if (gdc_test_reg_one(0xAAAAAAAA))
+ if (gdc_test_reg_one(0x000A000A))
ret = 1;
out_be32((void *)GDC_SCRATCH_REG, old_value);