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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /post/board/lwmon5/fpga.c
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
downloadu-boot-linaro-stable-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'post/board/lwmon5/fpga.c')
-rw-r--r--post/board/lwmon5/fpga.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/post/board/lwmon5/fpga.c b/post/board/lwmon5/fpga.c
index ef641d789..2b842908d 100644
--- a/post/board/lwmon5/fpga.c
+++ b/post/board/lwmon5/fpga.c
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_RAM_END 0xC4203FFF
#define FPGA_STAT 0xC400000C
-#if CONFIG_POST & CFG_POST_BSPEC3
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
/* Testpattern for fpga memorytest */
static uint pattern[] = {
@@ -127,7 +127,7 @@ int fpga_post_test(int flags)
/* Enable write to FPGA RAM */
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
- read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
+ read_value = get_ram_size((void *)CONFIG_SYS_FPGA_BASE_1, 0x4000);
post_log("FPGA RAM size: %d bytes\n", read_value);
for (address = 0; address < 0x1000; address++) {
@@ -141,4 +141,4 @@ out:
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC3 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC3 */