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authorYuri Tikhonov <yur@pollux.denx.de>2008-02-04 17:09:55 +0100
committerWolfgang Denk <wd@denx.de>2008-03-18 21:59:23 +0100
commit603f194e5ad81bb2ef42d6d8aaa74de175bcb411 (patch)
treee524111c49eddbab623c0fbe02a2b709ac99c8a0 /post/board/lwmon5/fpga.c
parente262efe35742c1ad4b0966ff501efc26f34a0aec (diff)
downloadu-boot-linaro-stable-603f194e5ad81bb2ef42d6d8aaa74de175bcb411.tar.gz
Some fixes to dspic, fpga, and gdc post tests for lwmon5.
Disable external watch-dog for now. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Diffstat (limited to 'post/board/lwmon5/fpga.c')
-rw-r--r--post/board/lwmon5/fpga.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/post/board/lwmon5/fpga.c b/post/board/lwmon5/fpga.c
index 4e3f1d5cd..b87fc52c6 100644
--- a/post/board/lwmon5/fpga.c
+++ b/post/board/lwmon5/fpga.c
@@ -39,6 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_VERSION_REG 0xC4000040
#define FPGA_RAM_START 0xC4200000
#define FPGA_RAM_END 0xC4203FFF
+#define FPGA_STAT 0xC400000C
#define FPGA_PWM_CTRL_REG 0xC4000020
#define FPGA_PWM_TV_REG 0xC4000024
@@ -93,6 +94,9 @@ int fpga_post_test(int flags)
post_log("FPGA : version %u.%u\n",
(version >> 8) & 0xFF, version & 0xFF);
+ /* Enable write to FPGA RAM */
+ out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
+
read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
post_log("FPGA RAM size: %d bytes\n", read_value);