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authorStefan Roese <sr@denx.de>2007-06-19 16:42:31 +0200
committerStefan Roese <sr@denx.de>2007-06-19 16:42:31 +0200
commitdf8a24cdd30151505cf57bbee5289e91bf53bd1b (patch)
treeff5305f90f000aead5a0cbf3a8e3501ea6102021 /nand_spl
parent86ba99e34194394052d24c04dc40d1263d29a26f (diff)
downloadu-boot-linaro-stable-df8a24cdd30151505cf57bbee5289e91bf53bd1b.tar.gz
[ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'nand_spl')
-rw-r--r--nand_spl/board/amcc/acadia/Makefile14
-rw-r--r--nand_spl/board/amcc/acadia/config.mk4
-rw-r--r--nand_spl/board/amcc/acadia/u-boot.lds2
3 files changed, 15 insertions, 5 deletions
diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile
index 0d6828a76..926476f91 100644
--- a/nand_spl/board/amcc/acadia/Makefile
+++ b/nand_spl/board/amcc/acadia/Makefile
@@ -30,7 +30,7 @@ AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
SOBJS = start.o resetvec.o
-COBJS = gpio.o nand_boot.o nand_ecc.o memory.o ndfc.o
+COBJS = gpio.o nand_boot.o nand_ecc.o memory.o ndfc.o pll.o
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -39,7 +39,8 @@ LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
nandobj := $(OBJTREE)/nand_spl/
-ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin \
+ $(nandobj)System.map
all: $(obj).depend $(ALL)
@@ -54,6 +55,11 @@ $(nandobj)u-boot-spl: $(OBJS)
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
+$(nandobj)System.map: $(nandobj)u-boot-spl
+ @$(NM) $< | \
+ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+ sort > $(nandobj)System.map
+
# create symbolic links for common files
# from cpu directory
@@ -78,6 +84,10 @@ $(obj)memory.c:
@rm -f $(obj)memory.c
ln -s $(SRCTREE)/board/amcc/acadia/memory.c $(obj)memory.c
+$(obj)pll.c:
+ @rm -f $(obj)pll.c
+ ln -s $(SRCTREE)/board/amcc/acadia/pll.c $(obj)pll.c
+
# from nand_spl directory
$(obj)nand_boot.c:
@rm -f $(obj)nand_boot.c
diff --git a/nand_spl/board/amcc/acadia/config.mk b/nand_spl/board/amcc/acadia/config.mk
index 55069b4df..3b140fa7e 100644
--- a/nand_spl/board/amcc/acadia/config.mk
+++ b/nand_spl/board/amcc/acadia/config.mk
@@ -32,11 +32,11 @@
# We will copy this SPL into internal SRAM in start.S. So we set
# TEXT_BASE to starting address in internal SRAM here.
#
-TEXT_BASE = 0xF8003000
+TEXT_BASE = 0xf8004000
# PAD_TO used to generate a 16kByte binary needed for the combined image
# -> PAD_TO = TEXT_BASE + 0x4000
-PAD_TO = 0xF8007000
+PAD_TO = 0xf8008000
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
diff --git a/nand_spl/board/amcc/acadia/u-boot.lds b/nand_spl/board/amcc/acadia/u-boot.lds
index 018def1fa..a07a773e0 100644
--- a/nand_spl/board/amcc/acadia/u-boot.lds
+++ b/nand_spl/board/amcc/acadia/u-boot.lds
@@ -24,7 +24,7 @@
OUTPUT_ARCH(powerpc:common)
SECTIONS
{
- .resetvec 0xF8003FFC :
+ .resetvec 0xf8004ffc :
{
*(.resetvec)
} = 0xffff