diff options
| author | Stefan Roese <sr@denx.de> | 2008-04-08 10:33:28 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-04-18 16:30:39 +0200 |
| commit | 5e182dce04d68cc94407a1b1fa09307f2bb96719 (patch) | |
| tree | 64c2bf861bb63fbe312ba83d1fb33db12175d88e /nand_spl | |
| parent | fe7c0db6b2a9004f96c2a2d4fff2849e19c2d825 (diff) | |
ppc4xx: Adjust Canyonlands fixed DDR2 setup (NAND booting) to 512MB SODIMM
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'nand_spl')
| -rw-r--r-- | nand_spl/board/amcc/canyonlands/ddr2_fixed.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c index 48708a8ee..79f3b0f42 100644 --- a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c +++ b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c @@ -49,11 +49,11 @@ long int initdram(int board_type) * enabled. This will only work for the same memory * configuration as used here: * - * Crucial CT3264AC53E.4FD - 256MB SO-DIMM + * Crucial CT6464AC53E.4FE - 512MB SO-DIMM * */ mtsdram(SDRAM_MCOPT2, 0x00000000); - mtsdram(SDRAM_MCOPT1, 0x05122000); + mtsdram(SDRAM_MCOPT1, 0x05322000); mtsdram(SDRAM_MODT0, 0x01000000); mtsdram(SDRAM_CODT, 0x00800021); mtsdram(SDRAM_WRDTR, 0x82000823); @@ -62,7 +62,7 @@ long int initdram(int board_type) mtsdram(SDRAM_RTR, 0x06180000); mtsdram(SDRAM_SDTR1, 0x80201000); mtsdram(SDRAM_SDTR2, 0x42103243); - mtsdram(SDRAM_SDTR3, 0x0A0D0D16); + mtsdram(SDRAM_SDTR3, 0x0A0D0D1A); mtsdram(SDRAM_MMODE, 0x00000632); mtsdram(SDRAM_MEMODE, 0x00000040); mtsdram(SDRAM_INITPLR0, 0xB5380000); @@ -86,7 +86,7 @@ long int initdram(int board_type) wait_init_complete(); - mtdcr(SDRAM_R0BAS, 0x0000F800); /* MQ0_B0BAS */ + mtdcr(SDRAM_R0BAS, 0x0000F000); /* MQ0_B0BAS */ mtsdram(SDRAM_RDCC, 0x40000000); mtsdram(SDRAM_RQDC, 0x80000038); |