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authorBill Richardson <wfrichar@chromium.org>2012-10-20 11:44:34 +0000
committerSimon Glass <sjg@chromium.org>2012-12-06 14:30:38 -0800
commit55ae10f8dbdf306e210240937ee4d558c8590447 (patch)
tree1ff8e33ea335da951a6e81d59518f71f27238d5b /include
parent468ebf190a737dd1021ca15ff350ceee2001372e (diff)
downloadu-boot-linaro-stable-55ae10f8dbdf306e210240937ee4d558c8590447.tar.gz
x86: gpio: Add GPIO driver for Intel ICH6 and later.
Implement <asm-generic/gpio.h> functions for Intel ICH6 and later. Only GPIOs 0-31 are handled by this code. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/pci.h123
1 files changed, 123 insertions, 0 deletions
diff --git a/include/pci.h b/include/pci.h
index eba122f8c..15f583f06 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -67,7 +67,130 @@
#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
#define PCI_CLASS_DEVICE 0x0a /* Device class */
#define PCI_CLASS_CODE 0x0b /* Device class code */
+#define PCI_CLASS_CODE_TOO_OLD 0x00
+#define PCI_CLASS_CODE_STORAGE 0x01
+#define PCI_CLASS_CODE_NETWORK 0x02
+#define PCI_CLASS_CODE_DISPLAY 0x03
+#define PCI_CLASS_CODE_MULTIMEDIA 0x04
+#define PCI_CLASS_CODE_MEMORY 0x05
+#define PCI_CLASS_CODE_BRIDGE 0x06
+#define PCI_CLASS_CODE_COMM 0x07
+#define PCI_CLASS_CODE_PERIPHERAL 0x08
+#define PCI_CLASS_CODE_INPUT 0x09
+#define PCI_CLASS_CODE_DOCKING 0x0A
+#define PCI_CLASS_CODE_PROCESSOR 0x0B
+#define PCI_CLASS_CODE_SERIAL 0x0C
+#define PCI_CLASS_CODE_WIRELESS 0x0D
+#define PCI_CLASS_CODE_I2O 0x0E
+#define PCI_CLASS_CODE_SATELLITE 0x0F
+#define PCI_CLASS_CODE_CRYPTO 0x10
+#define PCI_CLASS_CODE_DATA 0x11
+/* Base Class 0x12 - 0xFE is reserved */
+#define PCI_CLASS_CODE_OTHER 0xFF
+
#define PCI_CLASS_SUB_CODE 0x0a /* Device sub-class code */
+#define PCI_CLASS_SUB_CODE_TOO_OLD_NOTVGA 0x00
+#define PCI_CLASS_SUB_CODE_TOO_OLD_VGA 0x01
+#define PCI_CLASS_SUB_CODE_STORAGE_SCSI 0x00
+#define PCI_CLASS_SUB_CODE_STORAGE_IDE 0x01
+#define PCI_CLASS_SUB_CODE_STORAGE_FLOPPY 0x02
+#define PCI_CLASS_SUB_CODE_STORAGE_IPIBUS 0x03
+#define PCI_CLASS_SUB_CODE_STORAGE_RAID 0x04
+#define PCI_CLASS_SUB_CODE_STORAGE_ATA 0x05
+#define PCI_CLASS_SUB_CODE_STORAGE_SATA 0x06
+#define PCI_CLASS_SUB_CODE_STORAGE_SAS 0x07
+#define PCI_CLASS_SUB_CODE_STORAGE_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_NETWORK_ETHERNET 0x00
+#define PCI_CLASS_SUB_CODE_NETWORK_TOKENRING 0x01
+#define PCI_CLASS_SUB_CODE_NETWORK_FDDI 0x02
+#define PCI_CLASS_SUB_CODE_NETWORK_ATM 0x03
+#define PCI_CLASS_SUB_CODE_NETWORK_ISDN 0x04
+#define PCI_CLASS_SUB_CODE_NETWORK_WORLDFIP 0x05
+#define PCI_CLASS_SUB_CODE_NETWORK_PICMG 0x06
+#define PCI_CLASS_SUB_CODE_NETWORK_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_DISPLAY_VGA 0x00
+#define PCI_CLASS_SUB_CODE_DISPLAY_XGA 0x01
+#define PCI_CLASS_SUB_CODE_DISPLAY_3D 0x02
+#define PCI_CLASS_SUB_CODE_DISPLAY_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_VIDEO 0x00
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_AUDIO 0x01
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_PHONE 0x02
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_MEMORY_RAM 0x00
+#define PCI_CLASS_SUB_CODE_MEMORY_FLASH 0x01
+#define PCI_CLASS_SUB_CODE_MEMORY_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_BRIDGE_HOST 0x00
+#define PCI_CLASS_SUB_CODE_BRIDGE_ISA 0x01
+#define PCI_CLASS_SUB_CODE_BRIDGE_EISA 0x02
+#define PCI_CLASS_SUB_CODE_BRIDGE_MCA 0x03
+#define PCI_CLASS_SUB_CODE_BRIDGE_PCI 0x04
+#define PCI_CLASS_SUB_CODE_BRIDGE_PCMCIA 0x05
+#define PCI_CLASS_SUB_CODE_BRIDGE_NUBUS 0x06
+#define PCI_CLASS_SUB_CODE_BRIDGE_CARDBUS 0x07
+#define PCI_CLASS_SUB_CODE_BRIDGE_RACEWAY 0x08
+#define PCI_CLASS_SUB_CODE_BRIDGE_SEMI_PCI 0x09
+#define PCI_CLASS_SUB_CODE_BRIDGE_INFINIBAND 0x0A
+#define PCI_CLASS_SUB_CODE_BRIDGE_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_COMM_SERIAL 0x00
+#define PCI_CLASS_SUB_CODE_COMM_PARALLEL 0x01
+#define PCI_CLASS_SUB_CODE_COMM_MULTIPORT 0x02
+#define PCI_CLASS_SUB_CODE_COMM_MODEM 0x03
+#define PCI_CLASS_SUB_CODE_COMM_GPIB 0x04
+#define PCI_CLASS_SUB_CODE_COMM_SMARTCARD 0x05
+#define PCI_CLASS_SUB_CODE_COMM_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_PIC 0x00
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_DMA 0x01
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_TIMER 0x02
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_RTC 0x03
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_HOTPLUG 0x04
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_SD 0x05
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_INPUT_KEYBOARD 0x00
+#define PCI_CLASS_SUB_CODE_INPUT_DIGITIZER 0x01
+#define PCI_CLASS_SUB_CODE_INPUT_MOUSE 0x02
+#define PCI_CLASS_SUB_CODE_INPUT_SCANNER 0x03
+#define PCI_CLASS_SUB_CODE_INPUT_GAMEPORT 0x04
+#define PCI_CLASS_SUB_CODE_INPUT_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_DOCKING_GENERIC 0x00
+#define PCI_CLASS_SUB_CODE_DOCKING_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_PROCESSOR_386 0x00
+#define PCI_CLASS_SUB_CODE_PROCESSOR_486 0x01
+#define PCI_CLASS_SUB_CODE_PROCESSOR_PENTIUM 0x02
+#define PCI_CLASS_SUB_CODE_PROCESSOR_ALPHA 0x10
+#define PCI_CLASS_SUB_CODE_PROCESSOR_POWERPC 0x20
+#define PCI_CLASS_SUB_CODE_PROCESSOR_MIPS 0x30
+#define PCI_CLASS_SUB_CODE_PROCESSOR_COPROC 0x40
+#define PCI_CLASS_SUB_CODE_SERIAL_1394 0x00
+#define PCI_CLASS_SUB_CODE_SERIAL_ACCESSBUS 0x01
+#define PCI_CLASS_SUB_CODE_SERIAL_SSA 0x02
+#define PCI_CLASS_SUB_CODE_SERIAL_USB 0x03
+#define PCI_CLASS_SUB_CODE_SERIAL_FIBRECHAN 0x04
+#define PCI_CLASS_SUB_CODE_SERIAL_SMBUS 0x05
+#define PCI_CLASS_SUB_CODE_SERIAL_INFINIBAND 0x06
+#define PCI_CLASS_SUB_CODE_SERIAL_IPMI 0x07
+#define PCI_CLASS_SUB_CODE_SERIAL_SERCOS 0x08
+#define PCI_CLASS_SUB_CODE_SERIAL_CANBUS 0x09
+#define PCI_CLASS_SUB_CODE_WIRELESS_IRDA 0x00
+#define PCI_CLASS_SUB_CODE_WIRELESS_IR 0x01
+#define PCI_CLASS_SUB_CODE_WIRELESS_RF 0x10
+#define PCI_CLASS_SUB_CODE_WIRELESS_BLUETOOTH 0x11
+#define PCI_CLASS_SUB_CODE_WIRELESS_BROADBAND 0x12
+#define PCI_CLASS_SUB_CODE_WIRELESS_80211A 0x20
+#define PCI_CLASS_SUB_CODE_WIRELESS_80211B 0x21
+#define PCI_CLASS_SUB_CODE_WIRELESS_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_I2O_V1_0 0x00
+#define PCI_CLASS_SUB_CODE_SATELLITE_TV 0x01
+#define PCI_CLASS_SUB_CODE_SATELLITE_AUDIO 0x02
+#define PCI_CLASS_SUB_CODE_SATELLITE_VOICE 0x03
+#define PCI_CLASS_SUB_CODE_SATELLITE_DATA 0x04
+#define PCI_CLASS_SUB_CODE_CRYPTO_NETWORK 0x00
+#define PCI_CLASS_SUB_CODE_CRYPTO_ENTERTAINMENT 0x10
+#define PCI_CLASS_SUB_CODE_CRYPTO_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_DATA_DPIO 0x00
+#define PCI_CLASS_SUB_CODE_DATA_PERFCNTR 0x01
+#define PCI_CLASS_SUB_CODE_DATA_COMMSYNC 0x10
+#define PCI_CLASS_SUB_CODE_DATA_MGMT 0x20
+#define PCI_CLASS_SUB_CODE_DATA_OTHER 0x80
#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
#define PCI_LATENCY_TIMER 0x0d /* 8 bits */