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authorWolfgang Denk <wd@denx.de>2011-12-10 22:46:48 +0100
committerWolfgang Denk <wd@denx.de>2011-12-10 22:46:48 +0100
commitb96a661aeadb1b68d1b589b47f99ce9d6b2769df (patch)
tree4df62e827b8d33686bbd6da9d08e96fd7314eef2 /drivers
parent84d018268a8af1d9f271b398748652c5112e951a (diff)
parent8ba1604d342076c29e375fa3196106eed1f84b2a (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: M28: Cleanup memsize.o OOT build i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28 M28: Fix typo M28: Document that units has to be set to sectors on SD bootcard i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board i.mx: mxc_gpio: add the i.mx6q support i.mx: add the initial support for freescale i.MX6Q processor i.mx: introduce the armv7/imx-common folder S5PC2XX: Rename S5pc2XX to exynos tegra2: Don't use board pointer before it is set up tegra2: Remove unneeded 'dynamic ram size' message tegra2: Remove unused low-level Tegra2 UART code tegra2: Remove unneeded config option tegra2: Remove unneeded boot code tegra2: Enable instruction cache arm: Move CP15 init out of cpu_init_crit() tegra2: Simplify tegra_start() boot path tegra2: Add arch_cpu_init() to fire up Cortex-A9 tegra2: Use new GPIO APIs in gpio_config_uart() tegra2: Add support for Ventana tegra2: Modify MMC driver to handle power and cd GPIOs tegra2: Move board_mmc_init into board files
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/mxc_gpio.c4
-rw-r--r--drivers/gpio/tegra2_gpio.c6
-rw-r--r--drivers/mmc/tegra2_mmc.c42
-rw-r--r--drivers/mmc/tegra2_mmc.h4
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/serial_tegra2.c77
-rw-r--r--drivers/serial/serial_tegra2.h29
7 files changed, 45 insertions, 118 deletions
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index a7f36b293..908808d50 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -40,10 +40,10 @@ static unsigned long gpio_ports[] = {
[0] = GPIO1_BASE_ADDR,
[1] = GPIO2_BASE_ADDR,
[2] = GPIO3_BASE_ADDR,
-#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
[3] = GPIO4_BASE_ADDR,
#endif
-#if defined(CONFIG_MX53)
+#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
[4] = GPIO5_BASE_ADDR,
[5] = GPIO6_BASE_ADDR,
[6] = GPIO7_BASE_ADDR,
diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c
index f686e8063..22669b616 100644
--- a/drivers/gpio/tegra2_gpio.c
+++ b/drivers/gpio/tegra2_gpio.c
@@ -146,8 +146,10 @@ int gpio_request(int gp, const char *label)
if (gp >= MAX_NUM_GPIOS)
return -1;
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
- gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
+ if (label != NULL) {
+ strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
+ gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
+ }
/* Configure as a GPIO */
set_config(gp, 1);
diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index ccf48bbb1..035a8687d 100644
--- a/drivers/mmc/tegra2_mmc.c
+++ b/drivers/mmc/tegra2_mmc.c
@@ -21,6 +21,7 @@
#include <common.h>
#include <mmc.h>
+#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
@@ -473,20 +474,37 @@ static int mmc_core_init(struct mmc *mmc)
return 0;
}
-static int tegra2_mmc_initialize(int dev_index, int bus_width)
+int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
{
struct mmc_host *host;
+ char gpusage[12]; /* "SD/MMCn PWR" or "SD/MMCn CD" */
struct mmc *mmc;
- debug(" mmc_initialize called\n");
+ debug(" tegra2_mmc_init: index %d, bus width %d "
+ "pwr_gpio %d cd_gpio %d\n",
+ dev_index, bus_width, pwr_gpio, cd_gpio);
host = &mmc_host[dev_index];
host->clock = 0;
+ host->pwr_gpio = pwr_gpio;
+ host->cd_gpio = cd_gpio;
tegra2_get_setup(host, dev_index);
clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 20000000);
+ if (host->pwr_gpio >= 0) {
+ sprintf(gpusage, "SD/MMC%d PWR", dev_index);
+ gpio_request(host->pwr_gpio, gpusage);
+ gpio_direction_output(host->pwr_gpio, 1);
+ }
+
+ if (host->cd_gpio >= 0) {
+ sprintf(gpusage, "SD/MMC%d CD", dev_index);
+ gpio_request(host->cd_gpio, gpusage);
+ gpio_direction_input(host->cd_gpio);
+ }
+
mmc = &mmc_dev[dev_index];
sprintf(mmc->name, "Tegra2 SD/MMC");
@@ -518,9 +536,21 @@ static int tegra2_mmc_initialize(int dev_index, int bus_width)
return 0;
}
-int tegra2_mmc_init(int dev_index, int bus_width)
+/* this is a weak define that we are overriding */
+int board_mmc_getcd(u8 *cd, struct mmc *mmc)
{
- debug(" tegra2_mmc_init: index %d, bus width %d\n",
- dev_index, bus_width);
- return tegra2_mmc_initialize(dev_index, bus_width);
+ struct mmc_host *host = (struct mmc_host *)mmc->priv;
+
+ debug("board_mmc_getcd called\n");
+
+ *cd = 1; /* Assume card is inserted, or eMMC */
+
+ if (IS_SD(mmc)) {
+ if (host->cd_gpio >= 0) {
+ if (gpio_get_value(host->cd_gpio))
+ *cd = 0;
+ }
+ }
+
+ return 0;
}
diff --git a/drivers/mmc/tegra2_mmc.h b/drivers/mmc/tegra2_mmc.h
index 671583c42..b2f6c5baa 100644
--- a/drivers/mmc/tegra2_mmc.h
+++ b/drivers/mmc/tegra2_mmc.h
@@ -123,9 +123,11 @@ struct mmc_host {
unsigned int clock; /* Current clock (MHz) */
unsigned int base; /* Base address, SDMMC1/2/3/4 */
enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */
+ int pwr_gpio; /* Power GPIO */
+ int cd_gpio; /* Change Detect GPIO */
};
-int tegra2_mmc_init(int dev_index, int bus_width);
+int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);
#endif /* __ASSEMBLY__ */
#endif /* __TEGRA2_MMC_H_ */
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 6309549fc..616b85703 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -55,7 +55,6 @@ COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
-COBJS-$(CONFIG_TEGRA2) += serial_tegra2.o
ifndef CONFIG_SPL_BUILD
COBJS-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_tegra2.c b/drivers/serial/serial_tegra2.c
deleted file mode 100644
index 8ff34ea1b..000000000
--- a/drivers/serial/serial_tegra2.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ns16550.h>
-#include <asm/io.h>
-#include <asm/arch/tegra2.h>
-#include "serial_tegra2.h"
-
-static void setup_uart(struct uart_ctlr *u)
-{
- u32 reg;
-
- /* Prepare the divisor value */
- reg = NVRM_PLLP_FIXED_FREQ_KHZ * 1000 / NV_DEFAULT_DEBUG_BAUD / 16;
-
- /* Set up UART parameters */
- writel(UART_LCR_DLAB, &u->uart_lcr);
- writel(reg, &u->uart_thr_dlab_0);
- writel(0, &u->uart_ier_dlab_0);
- writel(0, &u->uart_lcr); /* clear DLAB */
- writel((UART_FCR_TRIGGER_3 | UART_FCR_FIFO_EN | \
- UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR), &u->uart_iir_fcr);
- writel(0, &u->uart_ier_dlab_0);
- writel(UART_LCR_WLS_8, &u->uart_lcr); /* 8N1 */
- writel(UART_MCR_RTS, &u->uart_mcr);
- writel(0, &u->uart_msr);
- writel(0, &u->uart_spr);
- writel(0, &u->uart_irda_csr);
- writel(0, &u->uart_asr);
- writel((UART_FCR_TRIGGER_3 | UART_FCR_FIFO_EN), &u->uart_iir_fcr);
-
- /* Flush any old characters out of the RX FIFO */
- reg = readl(&u->uart_lsr);
-
- while (reg & UART_LSR_DR) {
- reg = readl(&u->uart_thr_dlab_0);
- reg = readl(&u->uart_lsr);
- }
-}
-
-/*
- * Routine: uart_init
- * Description: init the UART clocks, muxes, and baudrate/parity/etc.
- */
-void uart_init(void)
-{
- struct uart_ctlr *uart = (struct uart_ctlr *)NV_PA_APB_UARTD_BASE;
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
- setup_uart(uart);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
- uart = (struct uart_ctlr *)NV_PA_APB_UARTA_BASE;
-
- setup_uart(uart);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
-}
diff --git a/drivers/serial/serial_tegra2.h b/drivers/serial/serial_tegra2.h
deleted file mode 100644
index 5704800e3..000000000
--- a/drivers/serial/serial_tegra2.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SERIAL_TEGRA_H_
-#define _SERIAL_TEGRA_H_
-
-#include <asm/arch/uart.h>
-
-#endif /* _SERIAL_TEGRA_H_ */