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authorYork Sun <yorksun@freescale.com>2011-01-10 12:02:57 +0000
committerKumar Gala <galak@kernel.crashing.org>2011-01-19 22:58:23 -0600
commit47df8f03f4cae5cec1f42856916a3dd0d0460dc1 (patch)
tree5c46a33980469680eeba453a2f18652495633b13 /doc
parentdd12768974358e9f03147c3bffc54b619308f318 (diff)
downloadu-boot-linaro-stable-47df8f03f4cae5cec1f42856916a3dd0d0460dc1.tar.gz
mpc8xxx: Enable ECC on/off control in hwconfig
Add fsl_ddr:ecc=on in hwconfig. If ECC is enabled in board configuration file, ECC can be turned on/off by this switch. If this switch is omitted, it is ON by default. Updated hwconfig calls to use local buffer. Syntax is hwconfig=fsl_ddr:ecc=on Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.fsl-ddr7
1 files changed, 7 insertions, 0 deletions
diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr
index 1657ef617..9e3c5390d 100644
--- a/doc/README.fsl-ddr
+++ b/doc/README.fsl-ddr
@@ -78,6 +78,13 @@ If the DDR controller supports address hashing, it can be enabled by hwconfig.
Syntax is:
hwconfig=fsl_ddr:addr_hash=true
+Memory controller ECC on/off
+============================
+If ECC is enabled in board configuratoin file, i.e. #define CONFIG_DDR_ECC,
+ECC can be turned on/off by hwconfig.
+
+Syntax is
+hwconfig=fsl_ddr:ecc=off
Memory testing options for mpc85xx
==================================