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authorStefano Babic <sbabic@denx.de>2011-10-04 23:43:30 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-03 22:56:25 +0100
commit17a8904b2791cdb495370c0e21c95f4ddd4fe877 (patch)
tree95655173b42fec07446f002d6fefcac13aaa12a3 /board
parentca1646b85d5d2be0ab524190875e6208f61ae8c6 (diff)
downloadu-boot-linaro-stable-17a8904b2791cdb495370c0e21c95f4ddd4fe877.tar.gz
Davinci: ea20: Add NAND support
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'board')
-rw-r--r--board/davinci/ea20/ea20.c35
1 files changed, 18 insertions, 17 deletions
diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index 3b636fffa..f9ad12182 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -74,20 +74,21 @@ static const struct pinmux_config emac_pins[] = {
#ifdef CONFIG_NAND_DAVINCI
const struct pinmux_config nand_pins[] = {
- { pinmux(7), 1, 1 },
- { pinmux(7), 1, 2 },
- { pinmux(7), 1, 4 },
- { pinmux(7), 1, 5 },
- { pinmux(9), 1, 0 },
- { pinmux(9), 1, 1 },
- { pinmux(9), 1, 2 },
- { pinmux(9), 1, 3 },
- { pinmux(9), 1, 4 },
- { pinmux(9), 1, 5 },
- { pinmux(9), 1, 6 },
- { pinmux(9), 1, 7 },
- { pinmux(12), 1, 5 },
- { pinmux(12), 1, 6 }
+ { pinmux(7), 1, 0}, /* CS2 */
+ { pinmux(7), 0, 1}, /* CS3 in three state*/
+ { pinmux(7), 1, 4 }, /* EMA_WE */
+ { pinmux(7), 1, 5 }, /* EMA_OE */
+ { pinmux(9), 1, 0 }, /* EMA_D[7] */
+ { pinmux(9), 1, 1 }, /* EMA_D[6] */
+ { pinmux(9), 1, 2 }, /* EMA_D[5] */
+ { pinmux(9), 1, 3 }, /* EMA_D[4] */
+ { pinmux(9), 1, 4 }, /* EMA_D[3] */
+ { pinmux(9), 1, 5 }, /* EMA_D[2] */
+ { pinmux(9), 1, 6 }, /* EMA_D[1] */
+ { pinmux(9), 1, 7 }, /* EMA_D[0] */
+ { pinmux(12), 1, 5 }, /* EMA_A[2] */
+ { pinmux(12), 1, 6 }, /* EMA_A[1] */
+ { pinmux(6), 1, 0 } /* EMA_CLK */
};
#endif
@@ -143,20 +144,20 @@ int board_init(void)
irq_init();
#endif
-#ifdef CONFIG_NAND_DAVINCI
/*
* NAND CS setup - cycle counts based on da850evm NAND timings in the
* Linux kernel @ 25MHz EMIFA
*/
+#ifdef CONFIG_NAND_DAVINCI
writel((DAVINCI_ABCR_WSETUP(0) |
- DAVINCI_ABCR_WSTROBE(0) |
+ DAVINCI_ABCR_WSTROBE(1) |
DAVINCI_ABCR_WHOLD(0) |
DAVINCI_ABCR_RSETUP(0) |
DAVINCI_ABCR_RSTROBE(1) |
DAVINCI_ABCR_RHOLD(0) |
DAVINCI_ABCR_TA(0) |
DAVINCI_ABCR_ASIZE_8BIT),
- &davinci_emif_regs->ab2cr); /* CS3 */
+ &davinci_emif_regs->ab1cr); /* CS2 */
#endif
/* arch number of the board */