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authorChander Kashyap <chander.kashyap@linaro.org>2011-12-06 23:34:12 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-09 17:30:09 +0100
commit393cb36199d337c8554cc8dfc853f5f405f4742b (patch)
tree2f33a5043d10915372d2ce3f0a76c1372d74a966 /board/samsung/origen/origen_setup.h
parent7f8c070ff99aadf153cd90cd0ec1987e8c2ebbe1 (diff)
downloadu-boot-linaro-stable-393cb36199d337c8554cc8dfc853f5f405f4742b.tar.gz
S5PC2XX: Rename S5pc2XX to exynos
As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/samsung/origen/origen_setup.h')
-rw-r--r--board/samsung/origen/origen_setup.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h
index 63d85d8a8..d949ad27b 100644
--- a/board/samsung/origen/origen_setup.h
+++ b/board/samsung/origen/origen_setup.h
@@ -98,8 +98,8 @@
#define INFORM1_OFFSET 0x804
/* GPIO Offsets for UART: GPIO Contol Register */
-#define S5PC210_GPIO_A0_CON_OFFSET 0x00
-#define S5PC210_GPIO_A1_CON_OFFSET 0x20
+#define EXYNOS4_GPIO_A0_CON_OFFSET 0x00
+#define EXYNOS4_GPIO_A1_CON_OFFSET 0x20
/* UART Register offsets */
#define ULCON_OFFSET 0x00
@@ -416,8 +416,8 @@
* UART GPIO_A0/GPIO_A1 Control Register Value
* 0x2: UART Function
*/
-#define S5PC210_GPIO_A0_CON_VAL 0x22222222
-#define S5PC210_GPIO_A1_CON_VAL 0x222222
+#define EXYNOS4_GPIO_A0_CON_VAL 0x22222222
+#define EXYNOS4_GPIO_A1_CON_VAL 0x222222
/* ULCON: UART Line Control Value 8N1 */
#define WORD_LEN_5_BIT 0x00