aboutsummaryrefslogtreecommitdiff
path: root/board/phytec
diff options
context:
space:
mode:
authorWolfgang Denk <wd@denx.de>2012-04-29 23:57:39 +0000
committerWolfgang Denk <wd@denx.de>2012-07-29 15:42:02 +0200
commit702e6014f15b307f144fa03ecaf83a8446c6802a (patch)
tree8c9360248c257f52c1487d9e6cbba3f2dc38e294 /board/phytec
parent631fea8f2d70aa5eb7c49b33039971dfc61bba88 (diff)
downloadu-boot-linaro-stable-702e6014f15b307f144fa03ecaf83a8446c6802a.tar.gz
doc: cleanup - move board READMEs into respective board directories
Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Jason Jin <jason.jin@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Diffstat (limited to 'board/phytec')
-rw-r--r--board/phytec/pcm030/README42
1 files changed, 42 insertions, 0 deletions
diff --git a/board/phytec/pcm030/README b/board/phytec/pcm030/README
new file mode 100644
index 000000000..05faab68c
--- /dev/null
+++ b/board/phytec/pcm030/README
@@ -0,0 +1,42 @@
+To build RAMBOOT, replace this section the main Makefile
+
+pcm030_config \
+pcm030_RAMBOOT_config \
+pcm030_LOWBOOT_config: unconfig
+ @ >include/config.h
+ @[ -z "$(findstring LOWBOOT_,$@)" ] || \
+ { echo "CONFIG_SYS_TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \
+ echo "... with LOWBOOT configuration" ; \
+ }
+ @[ -z "$(findstring RAMBOOT_,$@)" ] || \
+ { echo "CONFIG_SYS_TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\
+ config.tmp ; \
+ echo "... with RAMBOOT configuration" ; \
+ echo "... remember to make sure that MBAR is already \
+ switched to 0xF0000000 !!!" ; \
+ }
+ @$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec
+ @ echo "remember to set pcm030_REV to 0 for rev 1245.0 rev or to 1 for rev 1245.1"
+
+Alternative SDRAM settings:
+
+#define SDRAM_MODE 0x018D0000
+#define SDRAM_EMODE 0x40090000
+#define SDRAM_CONTROL 0x715f0f00
+#define SDRAM_CONFIG1 0x73722930
+#define SDRAM_CONFIG2 0x47770000
+
+/* Settings for XLB = 99 MHz */
+#define SDRAM_MODE 0x008D0000
+#define SDRAM_EMODE 0x40090000
+#define SDRAM_CONTROL 0x714b0f00
+#define SDRAM_CONFIG1 0x63611730
+#define SDRAM_CONFIG2 0x47670000
+
+The board ships default with the environment in EEPROM
+Moving the environment to flash can be more reliable
+
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xfe0000)
+#define CONFIG_ENV_SIZE 0x20000
+#define CONFIG_ENV_SECT_SIZE 0x20000