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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2010-08-12 13:52:53 +0700
committerReinhard Meyer <u-boot@emk-elektronik.de>2010-09-03 15:12:52 +0200
commit9cec2fc209a000655af77256a39ede7c7d441e56 (patch)
tree3474321f8af38d80a2416f61606e929dc45521af /board/mimc
parent8d1334a7877662c5b13205b399840196c7fa0aa4 (diff)
downloadu-boot-linaro-stable-9cec2fc209a000655af77256a39ede7c7d441e56.tar.gz
avr32: Use uncached() macro to get an address for SDRAM init
The paging system which is required to set up caching properties has not yet been initialized when the SDRAM is initialized. So when the map_physmem() function is converted to return the physical address unchanged, the SDRAM initialization will break on some boards. The avr32-specific uncached() macro will return an address which will always cause uncached accessed to be made. Since this happens in the board code, using avr32-specific features should be ok, and will allow the SDRAM initialization to keep working. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'board/mimc')
-rw-r--r--board/mimc/mimc200/mimc200.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index cc0f13712..994066943 100644
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -153,13 +153,11 @@ phys_size_t initdram(int board_type)
unsigned long actual_size;
void *sdram_base;
- sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
+ sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
- unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
-
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);