diff options
| author | Holger Brunck <holger.brunck@keymile.com> | 2012-05-25 01:57:17 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-07-07 14:07:30 +0200 |
| commit | e947cbc94e9f7e972e10c59eb87ed145d897f04d (patch) | |
| tree | 6799618daaf981457b91c668eec13b3a7673b0b0 /board/keymile | |
| parent | b732632389f09bed3418e270c50cfdaec08cc0b6 (diff) | |
arm/km: fix wrong comment in SDRAM config for mgcoge3un
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Diffstat (limited to 'board/keymile')
| -rw-r--r-- | board/keymile/km_arm/kwbimage-memphis.cfg | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg b/board/keymile/km_arm/kwbimage-memphis.cfg index 2faaf2b4c..6df2ad790 100644 --- a/board/keymile/km_arm/kwbimage-memphis.cfg +++ b/board/keymile/km_arm/kwbimage-memphis.cfg @@ -149,7 +149,7 @@ DATA 0xFFD01424 0x0000F17F # DDR Controller Control High DATA 0xFFD01428 0x00084520 # DDR2 SDRAM Timing Low # bit3-0 : 0000, required # bit7-4 : 0010, M_ODT assertion 2 cycles after read -# bit11-8 : 1001, M_ODT de-assertion 5 cycles after read +# bit11-8 : 0101, M_ODT de-assertion 5 cycles after read # bit15-12: 0100, internal ODT assertion 4 cycles after read # bit19-16: 1000, internal ODT de-assertion 8 cycles after read # bit31-20: 0 , required |