path: root/board/freescale/mpc8548cds/law.c
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authorHaiying Wang <Haiying.Wang@freescale.com>2011-09-28 10:51:15 -0400
committerKumar Gala <galak@kernel.crashing.org>2011-10-13 23:38:09 -0500
commit7c7bd635becc7d892e68c91173f7471d29f56abe (patch)
tree05de7d1a749bed979f1797258d20e7ed3c293c92 /board/freescale/mpc8548cds/law.c
parent56a69ff85553fab83c61d625695af3041628c8a3 (diff)
powerpc/p5020: fixup portal config info
P5020 has 10 qman portals, we need to configure all of them: * As there are only 2 physical cores sdest can only be 0 or 1 * We assign dqrr & frame data LIODNs for all portals so if they are utilized the proper mapping tables can be setup uniquely (PAMU stashing) * We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN assignments are tuned around an assumption of at most 5 partitions. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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