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authorWolfgang Denk <wd@denx.de>2010-10-11 10:19:04 +0200
committerWolfgang Denk <wd@denx.de>2010-10-11 10:19:04 +0200
commite67f46286440a53fb1d693152667ea3b1a6b3060 (patch)
tree3fdedda3a9122785e07e209ab6a5a0fc7fd65fd7 /board/davedenx
parentbfc7bea6adc46e1db2f5a5e3464d7652ed67c864 (diff)
parentf8f8acd7249d224ed5f9704a5738c469b137bc8e (diff)
downloadu-boot-linaro-stable-e67f46286440a53fb1d693152667ea3b1a6b3060.tar.gz
Merge branch 'master' of git://git.denx.de/u-boot-imx
Diffstat (limited to 'board/davedenx')
-rw-r--r--board/davedenx/qong/qong.c29
1 files changed, 15 insertions, 14 deletions
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index e509383e8..9abc29c5f 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -27,6 +27,7 @@
#include <asm/arch/mx31-regs.h>
#include <nand.h>
#include <fsl_pmic.h>
+#include <mxc_gpio.h>
#include "qong_fpga.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -41,9 +42,9 @@ int dram_init (void)
static void qong_fpga_reset(void)
{
- mx31_gpio_set(QONG_FPGA_RST_PIN, 0);
+ mxc_gpio_set(QONG_FPGA_RST_PIN, 0);
udelay(30);
- mx31_gpio_set(QONG_FPGA_RST_PIN, 1);
+ mxc_gpio_set(QONG_FPGA_RST_PIN, 1);
udelay(300);
}
@@ -66,11 +67,11 @@ int board_early_init_f (void)
/* FPGA reset Pin */
/* rstn = 0 */
- mx31_gpio_set(QONG_FPGA_RST_PIN, 0);
- mx31_gpio_direction(QONG_FPGA_RST_PIN, MX31_GPIO_DIRECTION_OUT);
+ mxc_gpio_set(QONG_FPGA_RST_PIN, 0);
+ mxc_gpio_direction(QONG_FPGA_RST_PIN, MXC_GPIO_DIRECTION_OUT);
/* set interrupt pin as input */
- mx31_gpio_direction(QONG_FPGA_IRQ_PIN, MX31_GPIO_DIRECTION_IN);
+ mxc_gpio_direction(QONG_FPGA_IRQ_PIN, MXC_GPIO_DIRECTION_IN);
#endif
@@ -206,27 +207,27 @@ static void board_nand_setup(void)
qong_fpga_reset();
/* Enable NAND flash */
- mx31_gpio_set(15, 1);
- mx31_gpio_set(14, 1);
- mx31_gpio_direction(15, MX31_GPIO_DIRECTION_OUT);
- mx31_gpio_direction(16, MX31_GPIO_DIRECTION_IN);
- mx31_gpio_direction(14, MX31_GPIO_DIRECTION_IN);
- mx31_gpio_set(15, 0);
+ mxc_gpio_set(15, 1);
+ mxc_gpio_set(14, 1);
+ mxc_gpio_direction(15, MXC_GPIO_DIRECTION_OUT);
+ mxc_gpio_direction(16, MXC_GPIO_DIRECTION_IN);
+ mxc_gpio_direction(14, MXC_GPIO_DIRECTION_IN);
+ mxc_gpio_set(15, 0);
}
int qong_nand_rdy(void *chip)
{
udelay(1);
- return mx31_gpio_get(16);
+ return mxc_gpio_get(16);
}
void qong_nand_select_chip(struct mtd_info *mtd, int chip)
{
if (chip >= 0)
- mx31_gpio_set(15, 0);
+ mxc_gpio_set(15, 0);
else
- mx31_gpio_set(15, 1);
+ mxc_gpio_set(15, 1);
}