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authorWolfgang Denk <wd@denx.de>2010-06-13 18:38:23 +0200
committerWolfgang Denk <wd@denx.de>2010-06-23 23:24:11 +0200
commitee80fa7b6e96a43d4270700cddc884e00cdd99fd (patch)
tree07cff0ade8bd9c595b4ed462a33a450083e81fc2 /board/Marvell/db64360
parentf35f3968c21bc8d01958ad1f92fe30e6ccc9c318 (diff)
downloadu-boot-linaro-stable-ee80fa7b6e96a43d4270700cddc884e00cdd99fd.tar.gz
Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK definitions
CONFIG_SYS_BUS_HZ has not really been used anywhere except to be redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the funtionality. Change all this to use CONFIG_SYS_BUS_CLK consistently. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Frank Gottschling <fgottschling@eltec.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Eran Man <eran@nbase.co.il> Cc: Stefan Roese <sr@denx.de> Cc: Nye Liu <nyet@zumanetworks.com> Cc: Roy Zang <tie-fei.zang@freescale.com>
Diffstat (limited to 'board/Marvell/db64360')
-rw-r--r--board/Marvell/db64360/sdram_init.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c
index d0817d7e2..d52d3f0e5 100644
--- a/board/Marvell/db64360/sdram_init.c
+++ b/board/Marvell/db64360/sdram_init.c
@@ -1290,37 +1290,37 @@ int setup_sdram (AUX_MEM_DIMM_INFO * info)
case 0x0:
case 0x80: /* refresh period is 15.625 usec */
sdram_config_reg =
- (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ)
+ (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK)
/ (float) 1000000.0);
break;
case 0x1:
case 0x81: /* refresh period is 3.9 usec */
sdram_config_reg =
- (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x2:
case 0x82: /* refresh period is 7.8 usec */
sdram_config_reg =
- (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x3:
case 0x83: /* refresh period is 31.3 usec */
sdram_config_reg =
- (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x4:
case 0x84: /* refresh period is 62.5 usec */
sdram_config_reg =
- (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x5:
case 0x85: /* refresh period is 125 usec */
sdram_config_reg =
- (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
default: /* refresh period undefined */