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authorTom Rini <trini@ti.com>2012-07-24 16:31:26 -0700
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-08-05 22:02:39 +0200
commit48d7a06ba1de9c4b7b2f6b90b8b89fd2179897bb (patch)
treeda7c4a5d79d7249cc9137294ce265eca06e36576 /arch
parent94fbd7342999ee28620919ebeee13087507060a4 (diff)
downloadu-boot-linaro-stable-48d7a06ba1de9c4b7b2f6b90b8b89fd2179897bb.tar.gz
am33xx: Rework config_io_ctrl slightly
This function sets a number of related registers to the same value (the registers in question all have the same field descriptions and are related in operation). Rather than defining a struct and setting the value repeatedly, just pass in the value. Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/am33xx/ddr.c12
-rw-r--r--arch/arm/cpu/armv7/am33xx/emif4.c10
-rw-r--r--arch/arm/include/asm/arch-am33xx/ddr_defs.h13
3 files changed, 8 insertions, 27 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index 993f3da00..597d62f61 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -120,11 +120,11 @@ void config_ddr_data(int macrono, const struct ddr_data *data)
writel(data->datadldiff0, &ddr_reg[macrono]->dt0dldiff0);
}
-void config_io_ctrl(struct ddr_ioctrl *ioctrl)
+void config_io_ctrl(unsigned long val)
{
- writel(ioctrl->cmd1ctl, &ioctrl_reg->cm0ioctl);
- writel(ioctrl->cmd2ctl, &ioctrl_reg->cm1ioctl);
- writel(ioctrl->cmd3ctl, &ioctrl_reg->cm2ioctl);
- writel(ioctrl->data1ctl, &ioctrl_reg->dt0ioctl);
- writel(ioctrl->data2ctl, &ioctrl_reg->dt1ioctl);
+ writel(val, &ioctrl_reg->cm0ioctl);
+ writel(val, &ioctrl_reg->cm1ioctl);
+ writel(val, &ioctrl_reg->cm2ioctl);
+ writel(val, &ioctrl_reg->dt0ioctl);
+ writel(val, &ioctrl_reg->dt1ioctl);
}
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 0190ec65e..321904544 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -116,8 +116,6 @@ static void config_vtp(void)
void config_ddr(short ddr_type)
{
- struct ddr_ioctrl ioctrl;
-
enable_emif_clocks();
if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) {
@@ -132,13 +130,7 @@ void config_ddr(short ddr_type)
writel(DDR2_PHY_RANK0_DELAY, &ddrregs->dt0rdelays0);
writel(DDR2_PHY_RANK0_DELAY, &ddrregs->dt1rdelays0);
- ioctrl.cmd1ctl = DDR2_IOCTRL_VALUE;
- ioctrl.cmd2ctl = DDR2_IOCTRL_VALUE;
- ioctrl.cmd3ctl = DDR2_IOCTRL_VALUE;
- ioctrl.data1ctl = DDR2_IOCTRL_VALUE;
- ioctrl.data2ctl = DDR2_IOCTRL_VALUE;
-
- config_io_ctrl(&ioctrl);
+ config_io_ctrl(DDR2_IOCTRL_VALUE);
/* Set CKE to be controlled by EMIF/DDR PHY */
writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 7806e1b92..ebd3077f7 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -174,20 +174,9 @@ struct ddr_cmdtctrl {
};
/**
- * Encapsulates DDR CMD & DATA io control registers.
- */
-struct ddr_ioctrl {
- unsigned long cmd1ctl;
- unsigned long cmd2ctl;
- unsigned long cmd3ctl;
- unsigned long data1ctl;
- unsigned long data2ctl;
-};
-
-/**
* Configure DDR io control registers
*/
-void config_io_ctrl(struct ddr_ioctrl *ioctrl);
+void config_io_ctrl(unsigned long val);
struct ddr_ctrl {
unsigned int ddrioctrl;