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authorTom Rini <trini@ti.com>2012-07-26 07:49:23 -0700
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-08-05 22:02:38 +0200
commit2cd37b98acededbbe274b80e1a4bc16489320b68 (patch)
treec45a0df6b19776e0e599aaf726db4c8280dfb427 /arch
parenta2e8ad95dabb08d899e84551c72a5a2798d74875 (diff)
downloadu-boot-linaro-stable-2cd37b98acededbbe274b80e1a4bc16489320b68.tar.gz
am33xx: Rework DDR2 EMIF initalization slightly
With the previous bugfix we now don't need to set two different REF_CTRL values and instead set the final value. Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/am33xx/emif4.c17
1 files changed, 2 insertions, 15 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 2f4164df8..8f7aadc60 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -117,7 +117,6 @@ static void config_vtp(void)
static void config_emif_ddr2(void)
{
- int i;
int ret;
struct sdram_config cfg;
struct sdram_timing tmg;
@@ -137,31 +136,19 @@ static void config_emif_ddr2(void)
cfg.sdrcr = EMIF_SDCFG;
cfg.sdrcr2 = EMIF_SDCFG;
- cfg.refresh = 0x00004650;
- cfg.refresh_sh = 0x00004650;
+ cfg.refresh = EMIF_SDREF;
+ cfg.refresh_sh = EMIF_SDREF;
/* Program EMIF instance */
ret = config_ddr_phy(&phyc);
if (ret < 0)
printf("Couldn't configure phyc\n");
- ret = config_sdram(&cfg);
- if (ret < 0)
- printf("Couldn't configure SDRAM\n");
ret = set_sdram_timings(&tmg);
if (ret < 0)
printf("Couldn't configure timings\n");
- /* Delay */
- for (i = 0; i < 5000; i++)
- ;
-
- cfg.refresh = EMIF_SDREF;
- cfg.refresh_sh = EMIF_SDREF;
- cfg.sdrcr = EMIF_SDCFG;
- cfg.sdrcr2 = EMIF_SDCFG;
-
ret = config_sdram(&cfg);
if (ret < 0)
printf("Couldn't configure SDRAM\n");