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authorMathieu J. Poirier <mathieu.poirier@linaro.org>2012-07-31 08:59:26 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-08-14 02:21:59 +0200
commit25f9270f04ae3e809566ee786ab4c2a2bba9ee34 (patch)
tree8b0c9f8899a3c9d6950be4b38837eedd279b283c /arch
parentf917361b988f69ddc0dbe2bd2beb93b296065b70 (diff)
downloadu-boot-linaro-stable-25f9270f04ae3e809566ee786ab4c2a2bba9ee34.tar.gz
snowball: Adding CPU clock initialisation
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/u8500/clock.c34
-rw-r--r--arch/arm/cpu/armv7/u8500/cpu.c2
-rw-r--r--arch/arm/include/asm/arch-u8500/clock.h5
3 files changed, 37 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
index 9e3b87394..fcfd61a1f 100644
--- a/arch/arm/cpu/armv7/u8500/clock.c
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -54,3 +54,37 @@ void u8500_clock_enable(int periph, int cluster, int kern)
if (cluster != -1)
writel(1 << cluster, &clkrst->pcken);
}
+
+void db8500_clocks_init(void)
+{
+ /*
+ * Enable all clocks. This is u-boot, we can enable it all. There is no
+ * powersave in u-boot.
+ */
+
+ u8500_clock_enable(1, 9, -1); /* GPIO0 */
+ u8500_clock_enable(2, 11, -1);/* GPIO1 */
+ u8500_clock_enable(3, 8, -1); /* GPIO2 */
+ u8500_clock_enable(5, 1, -1); /* GPIO3 */
+ u8500_clock_enable(3, 6, 6); /* UART2 */
+ u8500_clock_enable(3, 3, 3); /* I2C0 */
+ u8500_clock_enable(1, 5, 5); /* SDI0 */
+ u8500_clock_enable(2, 4, 2); /* SDI4 */
+ u8500_clock_enable(6, 6, -1); /* MTU0 */
+ u8500_clock_enable(3, 4, 4); /* SDI2 */
+
+ /*
+ * Enabling clocks for all devices which are AMBA devices in the
+ * kernel. Otherwise they will not get probe()'d because the
+ * peripheral ID register will not be powered.
+ */
+
+ /* XXX: some of these differ between ED/V1 */
+
+ u8500_clock_enable(1, 1, 1); /* UART1 */
+ u8500_clock_enable(1, 0, 0); /* UART0 */
+ u8500_clock_enable(3, 2, 2); /* SSP1 */
+ u8500_clock_enable(3, 1, 1); /* SSP0 */
+ u8500_clock_enable(2, 8, -1); /* SPI0 */
+ u8500_clock_enable(2, 5, 3); /* MSP2 */
+}
diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index 04f4b1928..fece201f3 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -27,6 +27,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/prcmu.h>
+#include <asm/arch/clock.h>
#ifdef CONFIG_ARCH_CPU_INIT
/*
@@ -35,6 +36,7 @@
int arch_cpu_init(void)
{
db8500_prcmu_init();
+ db8500_clocks_init();
return 0;
}
diff --git a/arch/arm/include/asm/arch-u8500/clock.h b/arch/arm/include/asm/arch-u8500/clock.h
index b00ab0d21..2a1478409 100644
--- a/arch/arm/include/asm/arch-u8500/clock.h
+++ b/arch/arm/include/asm/arch-u8500/clock.h
@@ -64,9 +64,6 @@ struct prcmu {
extern void u8500_clock_enable(int periph, int kern, int cluster);
-static inline void u8500_prcmu_enable(unsigned int *reg)
-{
- writel(readl(reg) | (1 << 8), reg);
-}
+void db8500_clocks_init(void);
#endif /* __ASM_ARCH_CLOCK */