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authorWolfgang Denk <wd@denx.de>2012-04-09 21:34:27 +0200
committerWolfgang Denk <wd@denx.de>2012-04-09 21:34:27 +0200
commit3f0675d1a532dbf1fd906103e4b61a6fb842c257 (patch)
treefd4f11a24b602a83c47352a1a392976e6c8b6c3d /arch
parent2c734cd932b53b46e9f89e4f5db9360afc459ae6 (diff)
parentf4cdde40195078a9183a0e29f741dac31ea3d425 (diff)
Merge branch 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging
* 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging: LMB: Fix undefined lmb_reserve() on non-lmb platforms MIPS: fix endianess handling MIPS: fix inconsistency in config option for cache operation mode MIPS: board.c: fix init of flash data in bd_info
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/cpu/mips32/cache.S6
-rw-r--r--arch/mips/cpu/mips32/config.mk21
-rw-r--r--arch/mips/lib/board.c8
3 files changed, 26 insertions, 9 deletions
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index 5ce0ec45f..e683e8be8 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -30,6 +30,10 @@
#include <asm/addrspace.h>
#include <asm/cacheops.h>
+#ifndef CONFIG_SYS_MIPS_CACHE_MODE
+#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
+#endif
+
#define RA t8
/*
@@ -224,7 +228,7 @@ LEAF(dcache_enable)
mfc0 t0, CP0_CONFIG
ori t0, CONF_CM_CMASK
xori t0, CONF_CM_CMASK
- ori t0, CONF_CM_CACHABLE_NONCOHERENT
+ ori t0, CONFIG_SYS_MIPS_CACHE_MODE
mtc0 t0, CP0_CONFIG
jr ra
END(dcache_enable)
diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk
index 4d1b27379..a1cd590a0 100644
--- a/arch/mips/cpu/mips32/config.mk
+++ b/arch/mips/cpu/mips32/config.mk
@@ -27,14 +27,23 @@
# Note: Toolchains with binutils prior to v2.16
# are no longer supported by U-Boot MIPS tree!
#
-MIPSFLAGS = -march=mips32r2
+MIPSFLAGS := -march=mips32r2
+# Handle special prefix in ELDK 4.0 toolchain
ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
-ENDIANNESS = -EL
-else
-ENDIANNESS = -EB
+ENDIANNESS := -EL
endif
-MIPSFLAGS += $(ENDIANNESS)
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+ENDIANNESS := -EL
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+ENDIANNESS := -EB
+endif
+
+# Default to EB if no endianess is configured
+ENDIANNESS ?= -EB
-PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS)
+PLATFORM_LDFLAGS += $(ENDIANNESS)
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index d998f0e74..38e6e77a3 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -294,15 +294,19 @@ void board_init_r(gd_t *id, ulong dest_addr)
/* configure available FLASH banks */
size = flash_init();
display_flash_config(size);
+ bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
bd->bi_flashsize = size;
-#endif
- bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */
#else
bd->bi_flashoffset = 0;
#endif
+#else
+ bd->bi_flashstart = 0;
+ bd->bi_flashsize = 0;
+ bd->bi_flashoffset = 0;
+#endif
#ifdef CONFIG_CMD_NAND
puts("NAND: ");