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authoryork <yorksun@freescale.com>2010-07-02 22:25:55 +0000
committerKumar Gala <galak@kernel.crashing.org>2010-07-26 13:16:10 -0500
commit9490ff48648d969caeb70dbc6e506175f8699617 (patch)
tree19d3caa8fa415392cb93e304c925a3dc5a58cbe5 /arch/powerpc/include/asm/fsl_ddr_dimm_params.h
parent7fd101c97b58dab7b0bd87f30c3dedb0db21d15f (diff)
downloadu-boot-linaro-stable-9490ff48648d969caeb70dbc6e506175f8699617.tar.gz
powerpc/8xxx: Enable DDR3 RDIMM support
Enabled registered DIMMs using data from SPD. RDIMMs have registers which need to be configured before using. The register configuration words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software should read those RCWs and put into DDR controller before initialization. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_ddr_dimm_params.h')
-rw-r--r--arch/powerpc/include/asm/fsl_ddr_dimm_params.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
index 55923e09b..be8260277 100644
--- a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
+++ b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
@@ -81,6 +81,9 @@ typedef struct dimm_params_s {
unsigned int tRTP_ps; /* byte 38, spd->trtp */
unsigned int tDQSQ_max_ps; /* byte 44, spd->tdqsq */
unsigned int tQHS_ps; /* byte 45, spd->tqhs */
+
+ /* DDR3 RDIMM */
+ unsigned char rcw[16]; /* Register Control Word 0-15 */
} dimm_params_t;
extern unsigned int ddr_compute_dimm_parameters(