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authorKumar Gala <galak@kernel.crashing.org>2011-02-02 11:23:50 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-04-04 09:24:41 -0500
commitf9a33f1c6158ce3fa119d94109d4347cf2e0aa4a (patch)
treea1f46817cc4b8a914e7013244e7d323f22a64801 /arch/powerpc/cpu/mpc85xx/cpu_init.c
parentfdb4dad31e2b0c7991595c9cedaf76c033a31115 (diff)
powerpc: Add cpu_secondary_init_r to allow for initialization post env setup
We can simplify some cpu/SoC level initialization by moving it to be after the environment and non-volatile storage is setup as there might be dependancies on such things in various boot configurations. For example for FSL SoC's with QE if we boot from NAND we need it setup to extra the ucode image to initialize the QE. If we always do this after environment & non-volatile storage is working we can have the code be the same regardless of NOR, NAND, SPI, MMC boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 8ece97009..215b7b380 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -384,12 +384,6 @@ int cpu_init_r(void)
enable_cpc();
-#ifdef CONFIG_QE
- uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
- qe_init(qe_base);
- qe_reset();
-#endif
-
/* needs to be in ram since code uses global static vars */
fsl_serdes_init();
@@ -449,3 +443,12 @@ int sata_initialize(void)
return 1;
}
#endif
+
+void cpu_secondary_init_r(void)
+{
+#ifdef CONFIG_QE
+ uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
+}