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authorMarek Vasut <marex@denx.de>2012-10-03 08:54:10 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-10-26 22:38:00 +0200
commitb411eb30f5ccca861b5aeee6b8e5880d4e4aea6b (patch)
treeabecca7461f3ef1f9cb639f3f573a4cf19a38105 /arch/arm/cpu/arm720t
parentafad40299eea12dfd032b44d04c2d4151d7e9862 (diff)
downloadu-boot-linaro-stable-b411eb30f5ccca861b5aeee6b8e5880d4e4aea6b.tar.gz
arm: Remove support for NETARM
This stuff has been rotting in the tree for a while now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm720t')
-rw-r--r--arch/arm/cpu/arm720t/cpu.c9
-rw-r--r--arch/arm/cpu/arm720t/interrupts.c83
-rw-r--r--arch/arm/cpu/arm720t/start.S75
3 files changed, 9 insertions, 158 deletions
diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
index 864720fcd..85c1a2c7f 100644
--- a/arch/arm/cpu/arm720t/cpu.c
+++ b/arch/arm/cpu/arm720t/cpu.c
@@ -36,6 +36,10 @@
#include <asm/hardware.h>
#include <asm/system.h>
+#if !defined(CONFIG_INTEGRATOR) || !defined(CONFIG_ARCH_INTEGRATOR)
+#error No cleanup_before_linux() defined for this CPU type
+#endif
+
int cleanup_before_linux (void)
{
/*
@@ -46,10 +50,7 @@ int cleanup_before_linux (void)
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
-#if defined(CONFIG_NETARM)
- disable_interrupts ();
- /* Nothing more needed */
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No cleanup before linux for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_TEGRA)
/* No cleanup before linux for tegra as yet */
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index e3b59fef0..998efd844 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -31,20 +31,11 @@
#include <asm/proc-armv/ptrace.h>
#include <asm/hardware.h>
-#ifndef CONFIG_NETARM
/* we always count down the max. */
#define TIMER_LOAD_VAL 0xffff
/* macro to read the 16 bit timer */
#define READ_TIMER (IO_TC1D & 0xffff)
-#else
-#define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
-#define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
-#define TM2STAT (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_STATUS))
-#define TIMER_LOAD_VAL NETARM_GEN_TSTAT_CTC_MASK
-#define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
-#endif
-
#ifdef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
@@ -65,18 +56,7 @@ static ulong lastdec;
int timer_init (void)
{
-#if defined(CONFIG_NETARM)
- /* disable all interrupts */
- IRQEN = 0;
-
- /* operate timer 2 in non-prescale mode */
- TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) |
- NETARM_GEN_TCTL_ENABLE |
- NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL));
-
- /* set timer 2 counter */
- lastdec = TIMER_LOAD_VAL;
-#elif defined(CONFIG_TEGRA)
+#if defined(CONFIG_TEGRA)
/* No timer routines for tegra as yet */
lastdec = 0;
#else
@@ -94,66 +74,7 @@ int timer_init (void)
*/
-#if defined(CONFIG_NETARM)
-
-ulong get_timer (ulong base)
-{
- return get_timer_masked () - base;
-}
-
-void __udelay (unsigned long usec)
-{
- ulong tmo;
-
- tmo = usec / 1000;
- tmo *= CONFIG_SYS_HZ;
- tmo /= 1000;
-
- tmo += get_timer (0);
-
- while (get_timer_masked () < tmo)
-}
-
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER;
-
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
- } else {
- /* we have an overflow ... */
- timestamp += lastdec + TIMER_LOAD_VAL - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-void udelay_masked (unsigned long usec)
-{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) {
- tmo = usec / 1000;
- tmo *= CONFIG_SYS_HZ;
- tmo /= 1000;
- } else {
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*1000);
- }
-
- endtime = get_timer_masked () + tmo;
-
- do {
- ulong now = get_timer_masked ();
- diff = endtime - now;
- } while (diff >= 0);
-}
-
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No timer routines for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_TEGRA)
/* No timer routines for tegra as yet */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 3a90e0d77..45c8f0a5e 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -284,58 +284,7 @@ _dynsym_start_ofs:
*/
cpu_init_crit:
-#if defined(CONFIG_NETARM)
- /*
- * prior to software reset : need to set pin PORTC4 to be *HRESET
- */
- ldr r0, =NETARM_GEN_MODULE_BASE
- ldr r1, =(NETARM_GEN_PORT_MODE(0x10) | \
- NETARM_GEN_PORT_DIR(0x10))
- str r1, [r0, #+NETARM_GEN_PORTC]
- /*
- * software reset : see HW Ref. Guide 8.2.4 : Software Service register
- * for an explanation of this process
- */
- ldr r0, =NETARM_GEN_MODULE_BASE
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
- /*
- * setup PLL and System Config
- */
- ldr r0, =NETARM_GEN_MODULE_BASE
-
- ldr r1, =( NETARM_GEN_SYS_CFG_LENDIAN | \
- NETARM_GEN_SYS_CFG_BUSFULL | \
- NETARM_GEN_SYS_CFG_USER_EN | \
- NETARM_GEN_SYS_CFG_ALIGN_ABORT | \
- NETARM_GEN_SYS_CFG_BUSARB_INT | \
- NETARM_GEN_SYS_CFG_BUSMON_EN )
-
- str r1, [r0, #+NETARM_GEN_SYSTEM_CONTROL]
-
-#ifndef CONFIG_NETARM_PLL_BYPASS
- ldr r1, =( NETARM_GEN_PLL_CTL_PLLCNT(NETARM_PLL_COUNT_VAL) | \
- NETARM_GEN_PLL_CTL_POLTST_DEF | \
- NETARM_GEN_PLL_CTL_INDIV(1) | \
- NETARM_GEN_PLL_CTL_ICP_DEF | \
- NETARM_GEN_PLL_CTL_OUTDIV(2) )
- str r1, [r0, #+NETARM_GEN_PLL_CONTROL]
-#endif
-
- /*
- * mask all IRQs by clearing all bits in the INTMRs
- */
- mov r1, #0
- ldr r0, =NETARM_GEN_MODULE_BASE
- str r1, [r0, #+NETARM_GEN_INTR_ENABLE]
-
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific initialisation for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_TEGRA)
/* No cpu_init_crit for tegra as yet */
@@ -533,27 +482,7 @@ fiq:
#endif
#endif /* CONFIG_SPL_BUILD */
-#if defined(CONFIG_NETARM)
- .align 5
-.globl reset_cpu
-reset_cpu:
- ldr r1, =NETARM_MEM_MODULE_BASE
- ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
- ldr r1, =0xFFFFF000
- and r0, r1, r0
- ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE)
- add r0, r1, r0
- ldr r4, =NETARM_GEN_MODULE_BASE
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETA
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- ldr r1, =NETARM_GEN_SW_SVC_RESETB
- str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
- mov pc, r0
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific reset actions for IntegratorAP/CM720T as yet */
#elif defined(CONFIG_TEGRA)
/* No specific reset actions for tegra as yet */