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authorValeriy Glushkov <gvv@lstec.com>2009-02-04 18:27:49 +0200
committerKim Phillips <kim.phillips@freescale.com>2009-03-05 18:13:45 -0600
commitb7be63abec45858c044f0fbd6aeef524c4663f9b (patch)
treea27c107c2759ad0418674fec20304969a5337f26
parent7e2ec1de1d2d723b59d7dd2fb85ff71b952d63af (diff)
downloadu-boot-linaro-stable-b7be63abec45858c044f0fbd6aeef524c4663f9b.tar.gz
MPC8349ITX: several config issues fixed
The previous version rebooted forever with DDR bigger than 256MB. Access the DS1339 RTC chip is on I2C1 bus. Allow DHCP. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
-rw-r--r--include/configs/MPC8349ITX.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 5e1ddaedd..38a7386d0 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -99,6 +99,7 @@
#define CONFIG_SYS_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C2_OFFSET 0x3100
#define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */
+#define CONFIG_SYS_RTC_BUS_NUM 1 /* The I2C bus for RTC */
#define CONFIG_SYS_I2C_8574_ADDR1 0x20 /* I2C1, PCF8574 */
#define CONFIG_SYS_I2C_8574_ADDR2 0x21 /* I2C1, PCF8574 */
@@ -168,6 +169,9 @@
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)256 << 20)
+
#ifdef CONFIG_HARD_I2C
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
#endif
@@ -457,6 +461,7 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SDRAM
#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114)