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authorMathieu J. Poirier <mathieu.poirier@linaro.org>2012-07-31 08:59:29 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-08-14 02:22:06 +0200
commit0313908bb0fb7a16c806decd4fd50a37d391320d (patch)
tree5426f22641deee318e691da23fb631cd8b07de83
parentcdc7f5042f27224e5b3285b820354d1857e9f661 (diff)
downloadu-boot-linaro-stable-0313908bb0fb7a16c806decd4fd50a37d391320d.tar.gz
u8500: Moving processor-specific functions to cpu area.
Functions such as providing power to the MMC device and reading the processor version register should be in the cpu area for access by multiple u8500-based boards. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
-rw-r--r--arch/arm/cpu/armv7/u8500/cpu.c80
-rw-r--r--arch/arm/include/asm/arch-u8500/sys_proto.h1
-rw-r--r--board/st-ericsson/u8500/u8500_href.c75
3 files changed, 82 insertions, 74 deletions
diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index fece201f3..7126d9472 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -28,6 +28,24 @@
#include <asm/io.h>
#include <asm/arch/prcmu.h>
#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+
+#include <asm/arch/hardware.h>
+
+#define CPUID_DB8500V1 0x411fc091
+#define ASICID_DB8500V11 0x008500A1
+
+static unsigned int read_asicid(void)
+{
+ unsigned int *address = (void *)U8500_BOOTROM_BASE
+ + U8500_BOOTROM_ASIC_ID_OFFSET;
+ return readl(address);
+}
+
+static int cpu_is_u8500v11(void)
+{
+ return read_asicid() == ASICID_DB8500V11;
+}
#ifdef CONFIG_ARCH_CPU_INIT
/*
@@ -41,3 +59,65 @@ int arch_cpu_init(void)
return 0;
}
#endif /* CONFIG_ARCH_CPU_INIT */
+
+#ifdef CONFIG_MMC
+
+#define LDO_VAUX3_MASK 0x3
+#define LDO_VAUX3_ENABLE 0x1
+#define VAUX3_VOLTAGE_2_9V 0xd
+
+#define AB8500_REGU_CTRL2 0x4
+#define AB8500_REGU_VRF1VAUX3_REGU_REG 0x040A
+#define AB8500_REGU_VRF1VAUX3_SEL_REG 0x0421
+
+int u8500_mmc_power_init(void)
+{
+ int ret;
+ int val;
+
+ if (!cpu_is_u8500v11())
+ return 0;
+
+ /*
+ * On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
+ * card to work. This is done by enabling the regulators in the AB8500
+ * via PRCMU I2C transactions.
+ *
+ * This code is derived from the handling of AB8500_LDO_VAUX3 in
+ * ab8500_ldo_enable() and ab8500_ldo_disable() in Linux.
+ *
+ * Turn off and delay is required to have it work across soft reboots.
+ */
+
+ ret = prcmu_i2c_read(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG);
+ if (ret < 0)
+ goto out;
+
+ val = ret;
+
+ /* Turn off */
+ ret = prcmu_i2c_write(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG,
+ val & ~LDO_VAUX3_MASK);
+ if (ret < 0)
+ goto out;
+
+ udelay(10 * 1000);
+
+ /* Set the voltage to 2.9V */
+ ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
+ AB8500_REGU_VRF1VAUX3_SEL_REG,
+ VAUX3_VOLTAGE_2_9V);
+ if (ret < 0)
+ goto out;
+
+ val = val & ~LDO_VAUX3_MASK;
+ val = val | LDO_VAUX3_ENABLE;
+
+ /* Turn on the supply */
+ ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
+ AB8500_REGU_VRF1VAUX3_REGU_REG, val);
+
+out:
+ return ret;
+}
+#endif /* CONFIG_MMC */
diff --git a/arch/arm/include/asm/arch-u8500/sys_proto.h b/arch/arm/include/asm/arch-u8500/sys_proto.h
index bac5e7999..a8ef9e5f4 100644
--- a/arch/arm/include/asm/arch-u8500/sys_proto.h
+++ b/arch/arm/include/asm/arch-u8500/sys_proto.h
@@ -23,5 +23,6 @@
#define _SYS_PROTO_H_
void gpio_init(void);
+int u8500_mmc_power_init(void);
#endif /* _SYS_PROTO_H_ */
diff --git a/board/st-ericsson/u8500/u8500_href.c b/board/st-ericsson/u8500/u8500_href.c
index fe72684d2..e75f8b435 100644
--- a/board/st-ericsson/u8500/u8500_href.c
+++ b/board/st-ericsson/u8500/u8500_href.c
@@ -139,18 +139,6 @@ void show_boot_progress(int progress)
}
#endif
-static unsigned int read_asicid(void)
-{
- unsigned int *address = (void *)U8500_BOOTROM_BASE
- + U8500_BOOTROM_ASIC_ID_OFFSET;
- return readl(address);
-}
-
-int cpu_is_u8500v11(void)
-{
- return read_asicid() == 0x008500A1;
-}
-
/*
* Miscellaneous platform dependent initialisations
*/
@@ -227,67 +215,6 @@ unsigned int addr_vall_arr[] = {
};
#ifdef CONFIG_BOARD_LATE_INIT
-#ifdef CONFIG_MMC
-
-#define LDO_VAUX3_MASK 0x3
-#define LDO_VAUX3_ENABLE 0x1
-#define VAUX3_VOLTAGE_2_9V 0xd
-
-#define AB8500_REGU_CTRL2 0x4
-#define AB8500_REGU_VRF1VAUX3_REGU_REG 0x040A
-#define AB8500_REGU_VRF1VAUX3_SEL_REG 0x0421
-
-static int hrefplus_mmc_power_init(void)
-{
- int ret;
- int val;
-
- if (!cpu_is_u8500v11())
- return 0;
-
- /*
- * On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
- * card to work. This is done by enabling the regulators in the AB8500
- * via PRCMU I2C transactions.
- *
- * This code is derived from the handling of AB8500_LDO_VAUX3 in
- * ab8500_ldo_enable() and ab8500_ldo_disable() in Linux.
- *
- * Turn off and delay is required to have it work across soft reboots.
- */
-
- ret = prcmu_i2c_read(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG);
- if (ret < 0)
- goto out;
-
- val = ret;
-
- /* Turn off */
- ret = prcmu_i2c_write(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG,
- val & ~LDO_VAUX3_MASK);
- if (ret < 0)
- goto out;
-
- udelay(10 * 1000);
-
- /* Set the voltage to 2.9V */
- ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
- AB8500_REGU_VRF1VAUX3_SEL_REG,
- VAUX3_VOLTAGE_2_9V);
- if (ret < 0)
- goto out;
-
- val = val & ~LDO_VAUX3_MASK;
- val = val | LDO_VAUX3_ENABLE;
-
- /* Turn on the supply */
- ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
- AB8500_REGU_VRF1VAUX3_REGU_REG, val);
-
-out:
- return ret;
-}
-#endif
/*
* called after all initialisation were done, but before the generic
* mmc_initialize().
@@ -314,7 +241,7 @@ int board_late_init(void)
setenv("board_id", "1");
}
#ifdef CONFIG_MMC
- hrefplus_mmc_power_init();
+ u8500_mmc_power_init();
/*
* config extended GPIO pins for level shifter and