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authorwdenk <wdenk>2004-12-16 21:44:03 +0000
committerwdenk <wdenk>2004-12-16 21:44:03 +0000
commitefe2a4d5cf96dd37bc4782ba1880cee4ed1117c5 (patch)
tree9b8636853fefbfcd38e804ddccac013bd216d50e
parentbea8e84b52ac3c499b5868978a29c20cf92cf88f (diff)
downloadu-boot-linaro-stable-efe2a4d5cf96dd37bc4782ba1880cee4ed1117c5.tar.gz
Code cleanup.
-rw-r--r--README10
-rw-r--r--board/esd/apc405/strataflash.c63
-rw-r--r--board/esd/common/lcd.c2
-rw-r--r--board/esd/common/lcd.h1
-rw-r--r--board/esd/common/s1d13806_1024_768_8bpp.h1
-rw-r--r--board/esd/common/s1d13806_320_240_4bpp.h1
-rw-r--r--board/esd/common/s1d13806_640_480_16bpp.h1
-rw-r--r--board/esd/common/s1d13806_640_480_8bpp.h1
-rw-r--r--board/esd/cpci405/cpci405.c6
-rw-r--r--board/esd/cpci750/i2c.c62
-rw-r--r--board/esd/cpci750/ide.c59
-rw-r--r--board/esd/cpci750/local.h4
-rw-r--r--board/esd/cpci750/misc.S8
-rw-r--r--board/esd/cpci750/sdram_init.c1850
-rw-r--r--board/esd/cpci750/serial.c2
-rw-r--r--board/esd/hh405/hh405.c14
-rw-r--r--board/esd/hub405/hub405.c2
-rw-r--r--board/esd/pci405/pci405.c6
-rw-r--r--board/esd/pci405/writeibm.S178
-rw-r--r--board/esd/pmc405/strataflash.c63
-rw-r--r--board/esd/tasreg/tasreg.c2
-rw-r--r--board/g2000/g2000.c34
-rw-r--r--board/g2000/strataflash.c47
-rw-r--r--board/inka4x0/flash.c40
-rw-r--r--board/inka4x0/inka4x0.c1
-rw-r--r--board/tqm5200/tqm5200.c22
-rw-r--r--cpu/at91rm9200/cpu.c2
-rw-r--r--drivers/ps2ser.c4
-rw-r--r--fs/ext2/dev.c151
-rw-r--r--fs/ext2/ext2fs.c924
-rw-r--r--include/asm-m68k/m5249.h2
-rw-r--r--include/configs/APC405.h10
-rw-r--r--include/configs/CPCI750.h22
-rw-r--r--include/configs/TASREG.h6
-rw-r--r--include/configs/TQM5200.h2
-rw-r--r--include/ppc405.h8
-rw-r--r--include/universe.h9
37 files changed, 1831 insertions, 1789 deletions
diff --git a/README b/README
index 9455cc22e..32341f42b 100644
--- a/README
+++ b/README
@@ -835,7 +835,7 @@ The following options need to be configured:
function struct part_info* jffs2_part_info(int part_num)
If you define only one JFFS2 partition you may also want to
- #define CFG_JFFS_SINGLE_PART 1
+ #define CFG_JFFS_SINGLE_PART 1
to disable the command chpart. This is the default when you
have not defined a custom partition
@@ -1978,7 +1978,7 @@ Low Level (hardware related) configuration options:
initializations.
- CFG_IMMR: Physical address of the Internal Memory.
- DO NOT CHANGE unless you know exactly what you're
+ DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx/82xx systems only]
- CFG_INIT_RAM_ADDR:
@@ -2118,13 +2118,13 @@ Low Level (hardware related) configuration options:
"md/mw" commands.
Examples:
- => mdc.b 10 4 500
+ => mdc.b 10 4 500
This command will print 4 bytes (10,11,12,13) each 500 ms.
- => mwc.l 100 12345678 10
+ => mwc.l 100 12345678 10
This command will write 12345678 to address 100 all 10 ms.
- This only takes effect if the memory commands are activated
+ This only takes effect if the memory commands are activated
globally (CFG_CMD_MEM).
Building the Software:
diff --git a/board/esd/apc405/strataflash.c b/board/esd/apc405/strataflash.c
index 6578ed9d5..ad7a71dc4 100644
--- a/board/esd/apc405/strataflash.c
+++ b/board/esd/apc405/strataflash.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <asm/processor.h>
-#undef DEBUG_FLASH
+#undef DEBUG_FLASH
/*
* This file implements a Common Flash Interface (CFI) driver for ppcboot.
* The width of the port and the width of the chips are determined at initialization.
@@ -85,12 +85,8 @@
#define FLASH_OFFSET_USER_PROTECTION 0x85
#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
#define FLASH_MAN_CFI 0x01000000
-
-
-
typedef union {
unsigned char c;
unsigned short w;
@@ -107,13 +103,10 @@ typedef union {
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
/*-----------------------------------------------------------------------
* Functions
*/
-
-
static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
@@ -249,7 +242,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
+
if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
rcode = 1;
} else
@@ -277,7 +270,7 @@ void flash_print_info (flash_info_t *info)
info->size >> 20, info->sector_count);
printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
+
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
#ifdef CFG_FLASH_EMPTY_INFO
@@ -286,28 +279,28 @@ void flash_print_info (flash_info_t *info)
int erased;
volatile unsigned long *flash;
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
+ /*
+ * Check if whole sector is erased
+ */
+ if (i != (info->sector_count-1))
+ size = info->start[i+1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned long *)info->start[i];
+ size = size >> 2; /* divide by 4 for longword access */
+ for (k=0; k<size; k++)
+ {
+ if (*flash++ != 0xffffffff)
+ {
+ erased = 0;
+ break;
+ }
+ }
if ((i % 5) == 0)
printf ("\n ");
- /* print empty and read-only info */
+ /* print empty and read-only info */
printf (" %08lX%s%s",
info->start[i],
erased ? " E" : " ",
@@ -414,7 +407,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
else
flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
+ if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
prot?"protect":"unprotect")) == 0) {
info->protect[sector] = prot;
@@ -464,7 +457,7 @@ static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout
printf("Command Sequence Error.\n");
} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
+ retcode = ERR_NOT_ERASED;
} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
printf("Locking Error\n");
}
@@ -733,7 +726,7 @@ static int find_sector(flash_info_t *info, ulong addr)
{
int sector;
for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
+ if(addr >= info->start[sector])
break;
}
return sector;
@@ -741,7 +734,7 @@ static int find_sector(flash_info_t *info, ulong addr)
static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
{
-
+
int sector;
int cnt;
int retcode;
@@ -789,8 +782,8 @@ static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, in
flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
"buffer write");
- }
+ }
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
return retcode;
-}
+}
#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/esd/common/lcd.c b/board/esd/common/lcd.c
index a1fc18089..d2d642a1a 100644
--- a/board/esd/common/lcd.c
+++ b/board/esd/common/lcd.c
@@ -136,7 +136,7 @@ void lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,
}
s1dValue = regs[i].Value;
lcd_reg[s1dReg] = s1dValue;
- }
+ }
/*
* Decompress bmp image
diff --git a/board/esd/common/lcd.h b/board/esd/common/lcd.h
index a8971f6c0..3169e6bb5 100644
--- a/board/esd/common/lcd.h
+++ b/board/esd/common/lcd.h
@@ -68,4 +68,3 @@ typedef struct /**** BMP file info structure ****/
unsigned int biClrUsed; /* Number of colors used */
unsigned int biClrImportant; /* Number of important colors */
} BITMAPINFOHEADER;
-
diff --git a/board/esd/common/s1d13806_1024_768_8bpp.h b/board/esd/common/s1d13806_1024_768_8bpp.h
index a37e79719..68801bf40 100644
--- a/board/esd/common/s1d13806_1024_768_8bpp.h
+++ b/board/esd/common/s1d13806_1024_768_8bpp.h
@@ -123,4 +123,3 @@ static S1D_REGS regs_13806_1024_768_8bpp[] =
{0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
{0x01FC,0x01}, /* Display Mode Register */
};
-
diff --git a/board/esd/common/s1d13806_320_240_4bpp.h b/board/esd/common/s1d13806_320_240_4bpp.h
index beb6e9ed6..24d7350f2 100644
--- a/board/esd/common/s1d13806_320_240_4bpp.h
+++ b/board/esd/common/s1d13806_320_240_4bpp.h
@@ -123,4 +123,3 @@ static S1D_REGS regs_13806_320_240_4bpp[] =
{0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
{0x01FC,0x01}, /* Display Mode Register */
};
-
diff --git a/board/esd/common/s1d13806_640_480_16bpp.h b/board/esd/common/s1d13806_640_480_16bpp.h
index 6b83bf827..178f1a961 100644
--- a/board/esd/common/s1d13806_640_480_16bpp.h
+++ b/board/esd/common/s1d13806_640_480_16bpp.h
@@ -123,4 +123,3 @@ static S1D_REGS regs_13806_640_480_16bpp[] =
{0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
{0x01FC,0x01}, /* Display Mode Register */
};
-
diff --git a/board/esd/common/s1d13806_640_480_8bpp.h b/board/esd/common/s1d13806_640_480_8bpp.h
index dd0cc0994..c1f5b2bb7 100644
--- a/board/esd/common/s1d13806_640_480_8bpp.h
+++ b/board/esd/common/s1d13806_640_480_8bpp.h
@@ -123,4 +123,3 @@ static S1D_REGS regs_13806_640_320_16bpp[] =
{0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
{0x01FC,0x01}, /* Display Mode Register */
};
-
diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
index 873751889..f27668d14 100644
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -559,11 +559,11 @@ void ide_set_reset(int on)
#ifdef CONFIG_CPCI405AB
#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
- |= CFG_FPGA_MODE_1WIRE_DIR)
+ |= CFG_FPGA_MODE_1WIRE_DIR)
#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
- &= ~CFG_FPGA_MODE_1WIRE_DIR)
+ &= ~CFG_FPGA_MODE_1WIRE_DIR)
#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
- & CFG_FPGA_MODE_1WIRE)
+ & CFG_FPGA_MODE_1WIRE)
/*
* Generate a 1-wire reset, return 1 if no presence detect was found,
diff --git a/board/esd/cpci750/i2c.c b/board/esd/cpci750/i2c.c
index fcec78eac..5b1bc01c2 100644
--- a/board/esd/cpci750/i2c.c
+++ b/board/esd/cpci750/i2c.c
@@ -72,28 +72,28 @@ static void i2c_init (int speed, int slaveaddr)
/* Setup bus */
/* gtI2cReset */
GT_REG_WRITE (I2C_SOFT_RESET, 0);
- asm(" sync");
+ asm(" sync");
GT_REG_WRITE (I2C_CONTROL, 0);
- asm(" sync");
+ asm(" sync");
DP (puts ("set baudrate\n"));
GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
- asm(" sync");
+ asm(" sync");
DP (puts ("udelay...\n"));
udelay (I2C_DELAY);
GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
- asm(" sync");
+ asm(" sync");
}
static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
{
unsigned int status, data, bits = 7;
- unsigned int control;
+ unsigned int control;
int count = 0;
DP (puts ("i2c_select_device\n"));
@@ -107,19 +107,19 @@ static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
GT_REG_READ (I2C_CONTROL, &control);
control |= (0x1 << 2);
GT_REG_WRITE (I2C_CONTROL, control);
- asm(" sync");
+ asm(" sync");
GT_REG_READ (I2C_CONTROL, &control);
control |= (0x1 << 5); /* generate the I2C_START_BIT */
GT_REG_WRITE (I2C_CONTROL, control);
- asm(" sync");
+ asm(" sync");
RESET_REG_BITS (I2C_CONTROL, (0x01 << 3));
- asm(" sync");
+ asm(" sync");
GT_REG_READ (I2C_CONTROL, &status);
while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
+ GT_REG_READ (I2C_CONTROL, &status);
+ }
count = 0;
@@ -128,7 +128,7 @@ static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
while (((status & 0xff) != 0x08) && ((status & 0xff) != 0x10)){
if (count > 200) {
#ifdef DEBUG_I2C
- printf ("Failed to set startbit: 0x%02x\n", status);
+ printf ("Failed to set startbit: 0x%02x\n", status);
#endif
GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
asm(" sync");
@@ -146,21 +146,21 @@ static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
/* set the read bit */
data |= read;
GT_REG_WRITE (I2C_DATA, data);
- asm(" sync");
+ asm(" sync");
RESET_REG_BITS (I2C_CONTROL, BIT3);
- asm(" sync");
+ asm(" sync");
GT_REG_READ (I2C_CONTROL, &status);
while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
+ GT_REG_READ (I2C_CONTROL, &status);
+ }
GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
count = 0;
while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
if (count > 200) {
#ifdef DEBUG_I2C
- printf ("Failed to write address: 0x%02x\n", status);
+ printf ("Failed to write address: 0x%02x\n", status);
#endif
GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
return (status);
@@ -195,15 +195,15 @@ static uchar i2c_get_data (uchar * return_data, int len)
GT_REG_READ (I2C_CONTROL, &status);
while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
+ GT_REG_READ (I2C_CONTROL, &status);
+ }
GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
count++;
while ((status & 0xff) != 0x50) {
if (count > 20) {
#ifdef DEBUG_I2C
- printf ("Failed to get data len status: 0x%02x\n", status);
+ printf ("Failed to get data len status: 0x%02x\n", status);
#endif
GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
asm(" sync");
@@ -219,13 +219,13 @@ static uchar i2c_get_data (uchar * return_data, int len)
}
RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
- asm(" sync");
+ asm(" sync");
count = 0;
GT_REG_READ (I2C_CONTROL, &status);
while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
+ GT_REG_READ (I2C_CONTROL, &status);
+ }
while ((status & 0xff) != 0x58) {
if (count > 2000) {
@@ -236,9 +236,9 @@ static uchar i2c_get_data (uchar * return_data, int len)
count++;
}
GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
- asm(" sync");
+ asm(" sync");
RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
- asm(" sync");
+ asm(" sync");
return (0);
}
@@ -254,7 +254,7 @@ static uchar i2c_write_data (unsigned int *data, int len)
DP (puts ("i2c_write_data\n"));
while (len) {
- count = 0;
+ count = 0;
temp = (unsigned int) (*temp_ptr);
GT_REG_WRITE (I2C_DATA, temp);
asm(" sync");
@@ -264,7 +264,7 @@ static uchar i2c_write_data (unsigned int *data, int len)
GT_REG_READ (I2C_CONTROL, &status);
while ((status & 0x08) != 0x08) {
GT_REG_READ (I2C_CONTROL, &status);
- }
+ }
GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
count++;
@@ -294,7 +294,7 @@ static uchar i2c_write_byte (unsigned char *data, int len)
DP (puts ("i2c_write_byte\n"));
while (len) {
- count = 0;
+ count = 0;
/* Set and assert the data */
temp = *temp_ptr;
GT_REG_WRITE (I2C_DATA, temp);
@@ -306,7 +306,7 @@ static uchar i2c_write_byte (unsigned char *data, int len)
GT_REG_READ (I2C_CONTROL, &status);
while ((status & 0x08) != 0x08) {
GT_REG_READ (I2C_CONTROL, &status);
- }
+ }
GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
count++;
@@ -419,7 +419,7 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
void i2c_stop (void)
{
GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
- asm(" sync");
+ asm(" sync");
}
@@ -441,7 +441,7 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
status);
#endif
return status;
- }
+ }
status = i2c_write_byte (data, len); /* write the data */
@@ -450,7 +450,7 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
printf ("Data not written: 0x%02x\n", status);
#endif
return status;
- }
+ }
/* issue a stop bit */
i2c_stop ();
return 0;
diff --git a/board/esd/cpci750/ide.c b/board/esd/cpci750/ide.c
index 7400e8dc5..bea99ce8e 100644
--- a/board/esd/cpci750/ide.c
+++ b/board/esd/cpci750/ide.c
@@ -32,41 +32,34 @@
extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
-int ide_preinit
- (
- void
- )
- {
- int status;
- pci_dev_t devbusfn;
- int l;
+int ide_preinit (void)
+{
+ int status;
+ pci_dev_t devbusfn;
+ int l;
- status = 1;
- for(l=0;l<CFG_IDE_MAXBUS;l++)
- {
- ide_bus_offset[l] = -ATA_STATUS;
- }
- devbusfn = pci_find_device(0x1103, 0x0004, 0);
- if (devbusfn != -1)
- {
- status = 0;
+ status = 1;
+ for (l = 0; l < CFG_IDE_MAXBUS; l++) {
+ ide_bus_offset[l] = -ATA_STATUS;
+ }
+ devbusfn = pci_find_device (0x1103, 0x0004, 0);
+ if (devbusfn != -1) {
+ status = 0;
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, (u32 *)&ide_bus_offset[0]);
- ide_bus_offset[0] &= 0xfffffffe;
- ide_bus_offset[0] += CFG_PCI0_IO_SPACE;
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, (u32 *)&ide_bus_offset[1]);
- ide_bus_offset[1] &= 0xfffffffe;
- ide_bus_offset[1] += CFG_PCI0_IO_SPACE;
- }
- return(status);
- }
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
+ (u32 *) & ide_bus_offset[0]);
+ ide_bus_offset[0] &= 0xfffffffe;
+ ide_bus_offset[0] += CFG_PCI0_IO_SPACE;
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
+ (u32 *) & ide_bus_offset[1]);
+ ide_bus_offset[1] &= 0xfffffffe;
+ ide_bus_offset[1] += CFG_PCI0_IO_SPACE;
+ }
+ return (status);
+}
-void ide_set_reset
- (
- int flag
- )
- {
- return;
- }
+void ide_set_reset (int flag) {
+ return;
+}
#endif /* of CONFIG_CMDS_IDE */
diff --git a/board/esd/cpci750/local.h b/board/esd/cpci750/local.h
index 1beb7e2dd..47ab31e90 100644
--- a/board/esd/cpci750/local.h
+++ b/board/esd/cpci750/local.h
@@ -1,6 +1,6 @@
/*
* (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
+ * Ingo Assmus <ingo.assmus@keymile.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -35,7 +35,7 @@
/* This tells PPCBoot that the config options are compiled in */
/* #undef ENV_IS_EMBEDDED */
-/* Don't touch this! PPCBOOT figures this out based on other
+/* Don't touch this! PPCBOOT figures this out based on other
* magic. */
/* Uncomment and define any of the below options */
diff --git a/board/esd/cpci750/misc.S b/board/esd/cpci750/misc.S
index ec5d9ecc4..160b1d31f 100644
--- a/board/esd/cpci750/misc.S
+++ b/board/esd/cpci750/misc.S
@@ -158,13 +158,13 @@ board_asm_init:
rlwinm r3, r3, 16, 16, 31
lis r4, CFG_GT_REGS@h
ori r4, r4, CFG_GT_REGS@l
- li r5, INTEGRATED_SRAM_BASE_ADDR
- stwbrx r3, r5, r4
+ li r5, INTEGRATED_SRAM_BASE_ADDR
+ stwbrx r3, r5, r4
2: lwbrx r6, r5, r4
cmp cr0, r3, r6
- bne 2b
-
+ bne 2b
+
/* done! */
blr
#endif
diff --git a/board/esd/cpci750/sdram_init.c b/board/esd/cpci750/sdram_init.c
index d22ffe517..db545ef68 100644
--- a/board/esd/cpci750/sdram_init.c
+++ b/board/esd/cpci750/sdram_init.c
@@ -125,8 +125,8 @@ typedef struct sdram_info {
typedef enum _memoryType {SDRAM, DDR} MEMORY_TYPE;
typedef enum _voltageInterface {TTL_5V_TOLERANT, LVTTL, HSTL_1_5V,
- SSTL_3_3V, SSTL_2_5V, VOLTAGE_UNKNOWN,
- } VOLTAGE_INTERFACE;
+ SSTL_3_3V, SSTL_2_5V, VOLTAGE_UNKNOWN,
+ } VOLTAGE_INTERFACE;
typedef enum _max_CL_supported_DDR {DDR_CL_1=1, DDR_CL_1_5=2, DDR_CL_2=4, DDR_CL_2_5=8, DDR_CL_3=16, DDR_CL_3_5=32, DDR_CL_FAULT} MAX_CL_SUPPORTED_DDR;
typedef enum _max_CL_supported_SD {SD_CL_1=1, SD_CL_2, SD_CL_3, SD_CL_4, SD_CL_5, SD_CL_6, SD_CL_7, SD_FAULT} MAX_CL_SUPPORTED_SD;
@@ -248,760 +248,974 @@ NSto10PS(unsigned char spd_byte)
/* This code reads the SPD chip on the sdram and populates
* the array which is passed in with the relevant information */
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
-static int
-check_dimm(uchar slot, AUX_MEM_DIMM_INFO *dimmInfo)
-
+static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
- DECLARE_GLOBAL_DATA_PTR;
+ DECLARE_GLOBAL_DATA_PTR;
- unsigned long spd_checksum;
+ unsigned long spd_checksum;
uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
int ret;
- unsigned int i,j,density = 1,devicesForErrCheck = 0;
+ unsigned int i, j, density = 1, devicesForErrCheck = 0;
+
#ifdef DEBUG
- unsigned int k;
+ unsigned int k;
#endif
- unsigned int rightOfPoint = 0,leftOfPoint = 0, mult, div, time_tmp;
- int sign = 1,shift,maskLeftOfPoint,maskRightOfPoint;
+ unsigned int rightOfPoint = 0, leftOfPoint = 0, mult, div, time_tmp;
+ int sign = 1, shift, maskLeftOfPoint, maskRightOfPoint;
uchar supp_cal, cal_val;
ulong memclk, tmemclk;
ulong tmp;
- uchar trp_clocks=0, trcd_clocks, tras_clocks, trrd_clocks;
+ uchar trp_clocks = 0, trcd_clocks, tras_clocks, trrd_clocks;
uchar data[128];
memclk = gd->bus_clk;
- tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */
+ tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */
- memset(data, 0, sizeof(data));
+ memset (data, 0, sizeof (data));
ret = 0;
- DP(puts("before i2c read\n"));
+ DP (puts ("before i2c read\n"));
- ret = i2c_read(addr, 0, 2, data, 128);
+ ret = i2c_read (addr, 0, 2, data, 128);
- DP(puts("after i2c read\n"));
+ DP (puts ("after i2c read\n"));
- if ((data[64] != 'e') || (data[65] != 's') || (data[66] != 'd') || (data[67] != '-') ||
- (data[68] != 'g') || (data[69] != 'm') || (data[70] != 'b') || (data[71] != 'h'))
- {
- ret = -1;
- }
+ if ((data[64] != 'e') || (data[65] != 's') || (data[66] != 'd')
+ || (data[67] != '-') || (data[68] != 'g') || (data[69] != 'm')
+ || (data[70] != 'b') || (data[71] != 'h')) {
+ ret = -1;
+ }
- if ((ret != 0) && (slot == 0))
- {
- memset(data, 0, sizeof(data));
- data[ 0] = 0x80; data[ 1] = 0x08; data[ 2] = 0x07; data[ 3] = 0x0c;
- data[ 4] = 0x09; data[ 5] = 0x01; data[ 6] = 0x48; data[ 7] = 0x00;
- data[ 8] = 0x04; data[ 9] = 0x75; data[10] = 0x80; data[11] = 0x02;
- data[12] = 0x80; data[13] = 0x10; data[14] = 0x08; data[15] = 0x01;
- data[16] = 0x0e; data[17] = 0x04; data[18] = 0x0c; data[19] = 0x01;
- data[20] = 0x02; data[21] = 0x20; data[22] = 0x00; data[23] = 0xa0;
- data[24] = 0x80; data[25] = 0x00; data[26] = 0x00; data[27] = 0x50;
- data[28] = 0x3c; data[29] = 0x50; data[30] = 0x32; data[31] = 0x10;
- data[32] = 0xb0; data[33] = 0xb0; data[34] = 0x60; data[35] = 0x60;
- data[64] = 'e' ; data[65] = 's' ; data[66] = 'd' ; data[67] = '-' ;
- data[68] = 'g' ; data[69] = 'm' ; data[70] = 'b' ; data[71] = 'h' ;
- ret = 0;
- }
+ if ((ret != 0) && (slot == 0)) {
+ memset (data, 0, sizeof (data));
+ data[0] = 0x80;
+ data[1] = 0x08;
+ data[2] = 0x07;
+ data[3] = 0x0c;
+ data[4] = 0x09;
+ data[5] = 0x01;
+ data[6] = 0x48;
+ data[7] = 0x00;
+ data[8] = 0x04;
+ data[9] = 0x75;
+ data[10] = 0x80;
+ data[11] = 0x02;
+ data[12] = 0x80;
+ data[13] = 0x10;
+ data[14] = 0x08;
+ data[15] = 0x01;
+ data[16] = 0x0e;
+ data[17] = 0x04;
+ data[18] = 0x0c;
+ data[19] = 0x01;
+ data[20] = 0x02;
+ data[21] = 0x20;
+ data[22] = 0x00;
+ data[23] = 0xa0;
+ data[24] = 0x80;
+ data[25] = 0x00;
+ data[26] = 0x00;
+ data[27] = 0x50;
+ data[28] = 0x3c;
+ data[29] = 0x50;
+ data[30] = 0x32;
+ data[31] = 0x10;
+ data[32] = 0xb0;
+ data[33] = 0xb0;
+ data[34] = 0x60;
+ data[35] = 0x60;
+ data[64] = 'e';
+ data[65] = 's';
+ data[66] = 'd';
+ data[67] = '-';
+ data[68] = 'g';
+ data[69] = 'm';
+ data[70] = 'b';
+ data[71] = 'h';
+ ret = 0;
+ }
/* zero all the values */
- memset(dimmInfo, 0, sizeof(*dimmInfo));
+ memset (dimmInfo, 0, sizeof (*dimmInfo));
- /* copy the SPD content 1:1 into the dimmInfo structure*/
- for(i = 0 ; i <= 127 ; i++)
- {
- dimmInfo->spd_raw_data[i] = data[i];
- }
+ /* copy the SPD content 1:1 into the dimmInfo structure */
+ for (i = 0; i <= 127; i++) {
+ dimmInfo->spd_raw_data[i] = data[i];
+ }
if (ret) {
- DP(printf("No DIMM in slot %d [err = %x]\n", slot, ret));
+ DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret));
return 0;
- }
- else
- dimmInfo->slot = slot; /* start to fill up dimminfo for this "slot" */
+ } else
+ dimmInfo->slot = slot; /* start to fill up dimminfo for this "slot" */
#ifdef CFG_DISPLAY_DIMM_SPD_CONTENT
- for(i = 0 ; i <= 127 ; i++)
- {
- printf("SPD-EEPROM Byte %3d = %3x (%3d)\n", i, data[i], data[i]);
- }
+ for (i = 0; i <= 127; i++) {
+ printf ("SPD-EEPROM Byte %3d = %3x (%3d)\n", i, data[i],
+ data[i]);
+ }
#endif
#ifdef DEBUG
-/* find Manufactura of Dimm Module */
- for(i = 0 ; i < sizeof(dimmInfo->manufactura) ; i++)
- {
- dimmInfo->manufactura[i] = data[64+i];
- }
- printf("\nThis RAM-Module is produced by: %s\n", dimmInfo->manufactura);
+ /* find Manufacturer of Dimm Module */
+ for (i = 0; i < sizeof (dimmInfo->manufactura); i++) {
+ dimmInfo->manufactura[i] = data[64 + i];
+ }
+ printf ("\nThis RAM-Module is produced by: %s\n",
+ dimmInfo->manufactura);
-/* find Manul-ID of Dimm Module */
- for(i = 0 ; i < sizeof(dimmInfo->modul_id) ; i++)
- {
- dimmInfo->modul_id[i] = data[73+i];
- }
- printf("The Module-ID of this RAM-Module is: %s\n", dimmInfo->modul_id);
+ /* find Manul-ID of Dimm Module */
+ for (i = 0; i < sizeof (dimmInfo->modul_id); i++) {
+ dimmInfo->modul_id[i] = data[73 + i];
+ }
+ printf ("The Module-ID of this RAM-Module is: %s\n",
+ dimmInfo->modul_id);
-/* find Vendor-Data of Dimm Module */
- for(i = 0 ; i < sizeof(dimmInfo->vendor_data) ; i++)
- {
- dimmInfo->vendor_data[i] = data[99+i];
- }
- printf("Vendor Data of this RAM-Module is: %s\n", dimmInfo->vendor_data);
+ /* find Vendor-Data of Dimm Module */
+ for (i = 0; i < sizeof (dimmInfo->vendor_data); i++) {
+ dimmInfo->vendor_data[i] = data[99 + i];
+ }
+ printf ("Vendor Data of this RAM-Module is: %s\n",
+ dimmInfo->vendor_data);
-/* find modul_serial_no of Dimm Module */
- dimmInfo->modul_serial_no = (*((unsigned long *)(&data[95])));
- printf("Serial No. of this RAM-Module is: %ld (%lx)\n", dimmInfo->modul_serial_no, dimmInfo->modul_serial_no);
+ /* find modul_serial_no of Dimm Module */
+ dimmInfo->modul_serial_no = (*((unsigned long *) (&data[95])));
+ printf ("Serial No. of this RAM-Module is: %ld (%lx)\n",
+ dimmInfo->modul_serial_no, dimmInfo->modul_serial_no);
-/* find Manufac-Data of Dimm Module */
- dimmInfo->manufac_date = (*((unsigned int *)(&data[93])));
- printf("Manufactoring Date of this RAM-Module is: %d.%d\n", data[93], data [94]); /*dimmInfo->manufac_date*/
+ /* find Manufac-Data of Dimm Module */
+ dimmInfo->manufac_date = (*((unsigned int *) (&data[93])));
+ printf ("Manufactoring Date of this RAM-Module is: %d.%d\n", data[93], data[94]); /*dimmInfo->manufac_date */
-/* find modul_revision of Dimm Module */
- dimmInfo->modul_revision = (*((unsigned int *)(&data[91])));
- printf("Module Revision of this RAM-Module is: %d.%d\n", data[91], data [92]); /* dimmInfo->modul_revision*/
+ /* find modul_revision of Dimm Module */
+ dimmInfo->modul_revision = (*((unsigned int *) (&data[91])));
+ printf ("Module Revision of this RAM-Module is: %d.%d\n", data[91], data[92]); /* dimmInfo->modul_revision */
-/* find manufac_place of Dimm Module */
- dimmInfo->manufac_place = (*((unsigned char *)(&data[72])));
- printf("manufac_place of this RAM-Module is: %d\n", dimmInfo->manufac_place);
+ /* find manufac_place of Dimm Module */
+ dimmInfo->manufac_place = (*((unsigned char *) (&data[72])));
+ printf ("manufac_place of this RAM-Module is: %d\n",
+ dimmInfo->manufac_place);
#endif
/*------------------------------------------------------------------------------------------------------------------------------*/
/* calculate SPD checksum */
/*------------------------------------------------------------------------------------------------------------------------------*/
- spd_checksum = 0;
-#if 0 /* test-only */
- for(i = 0 ; i <= 62 ; i++)
- {
- spd_checksum += data[i];
- }
+ spd_checksum = 0;
+#if 0 /* test-only */
+ for (i = 0; i <= 62; i++) {
+ spd_checksum += data[i];
+ }
- if ((spd_checksum & 0xff) != data[63])
- {
- printf("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int)(spd_checksum & 0xff), data[63]);
- hang();
- }
+ if ((spd_checksum & 0xff) != data[63]) {
+ printf ("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int) (spd_checksum & 0xff), data[63]);
+ hang ();
+ }
- else
- printf("SPD Checksum ok!\n");
+ else
+ printf ("SPD Checksum ok!\n");
#endif /* test-only */
/*------------------------------------------------------------------------------------------------------------------------------*/
- for(i = 2 ; i <= 35 ; i++)
- {
- switch(i)
- {
- case 2: /* Memory type (DDR / SDRAM) */
- dimmInfo->memoryType = (data[i] == 0x7)? DDR:SDRAM;
- #ifdef DEBUG
- if (dimmInfo->memoryType == 0)
- DP(printf("Dram_type in slot %d is: SDRAM\n", dimmInfo->slot));
- if (dimmInfo->memoryType == 1)
- DP(printf("Dram_type in slot %d is: DDRAM\n", dimmInfo->slot));
- #endif
- break;
+ for (i = 2; i <= 35; i++) {
+ switch (i) {
+ case 2: /* Memory type (DDR / SDRAM) */
+ dimmInfo->memoryType = (data[i] == 0x7) ? DDR : SDRAM;
+#ifdef DEBUG
+ if (dimmInfo->memoryType == 0)
+ DP (printf
+ ("Dram_type in slot %d is: SDRAM\n",
+ dimmInfo->slot));
+ if (dimmInfo->memoryType == 1)
+ DP (printf
+ ("Dram_type in slot %d is: DDRAM\n",
+ dimmInfo->slot));
+#endif
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 3: /* Number Of Row Addresses */
- dimmInfo->numOfRowAddresses = data[i];
- DP(printf("Module Number of row addresses: %d\n", dimmInfo->numOfRowAddresses));
- break;
+ case 3: /* Number Of Row Addresses */
+ dimmInfo->numOfRowAddresses = data[i];
+ DP (printf
+ ("Module Number of row addresses: %d\n",
+ dimmInfo->numOfRowAddresses));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 4: /* Number Of Column Addresses */
- dimmInfo->numOfColAddresses = data[i];
- DP(printf("Module Number of col addresses: %d\n", dimmInfo->numOfColAddresses));
- break;
+ case 4: /* Number Of Column Addresses */
+ dimmInfo->numOfColAddresses = data[i];
+ DP (printf
+ ("Module Number of col addresses: %d\n",
+ dimmInfo->numOfColAddresses));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 5: /* Number Of Module Banks */
- dimmInfo->numOfModuleBanks = data[i];
- DP(printf("Number of Banks on Mod. : %d\n", dimmInfo->numOfModuleBanks));
- break;
+ case 5: /* Number Of Module Banks */
+ dimmInfo->numOfModuleBanks = data[i];
+ DP (printf
+ ("Number of Banks on Mod. : %d\n",
+ dimmInfo->numOfModuleBanks));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 6: /* Data Width */
- dimmInfo->dataWidth = data[i];
- DP(printf("Module Data Width: %d\n", dimmInfo->dataWidth));
- break;
+ case 6: /* Data Width */
+ dimmInfo->dataWidth = data[i];
+ DP (printf
+ ("Module Data Width: %d\n",
+ dimmInfo->dataWidth));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 8: /* Voltage Interface */
- switch(data[i])
- {
- case 0x0:
- dimmInfo->voltageInterface = TTL_5V_TOLERANT;
- DP(printf("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x1:
- dimmInfo->voltageInterface = LVTTL;
- DP(printf("Module is LVTTL\n"));
- break;
- case 0x2:
- dimmInfo->voltageInterface = HSTL_1_5V;
- DP(printf("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x3:
- dimmInfo->voltageInterface = SSTL_3_3V;
- DP(printf("Module is HSTL_1_5V\n"));
- break;
- case 0x4:
- dimmInfo->voltageInterface = SSTL_2_5V;
- DP(printf("Module is SSTL_2_5V\n"));
- break;
- default:
- dimmInfo->voltageInterface = VOLTAGE_UNKNOWN;
- DP(printf("Module is VOLTAGE_UNKNOWN\n"));
- break;
- }
- break;
+ case 8: /* Voltage Interface */
+ switch (data[i]) {
+ case 0x0:
+ dimmInfo->voltageInterface = TTL_5V_TOLERANT;
+ DP (printf
+ ("Module is TTL_5V_TOLERANT\n"));
+ break;
+ case 0x1:
+ dimmInfo->voltageInterface = LVTTL;
+ DP (printf
+ ("Module is LVTTL\n"));
+ break;
+ case 0x2:
+ dimmInfo->voltageInterface = HSTL_1_5V;
+ DP (printf
+ ("Module is TTL_5V_TOLERANT\n"));
+ break;
+ case 0x3:
+ dimmInfo->voltageInterface = SSTL_3_3V;
+ DP (printf
+ ("Module is HSTL_1_5V\n"));
+ break;
+ case 0x4:
+ dimmInfo->voltageInterface = SSTL_2_5V;
+ DP (printf
+ ("Module is SSTL_2_5V\n"));
+ break;
+ default:
+ dimmInfo->voltageInterface = VOLTAGE_UNKNOWN;
+ DP (printf
+ ("Module is VOLTAGE_UNKNOWN\n"));
+ break;
+ }
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 9: /* Minimum Cycle Time At Max CasLatancy */
- shift = (dimmInfo->memoryType == DDR)? 4:2;
- mult = (dimmInfo->memoryType == DDR)? 10:25;
- maskLeftOfPoint = (dimmInfo->memoryType == DDR)? 0xf0:0xfc;
- maskRightOfPoint = (dimmInfo->memoryType == DDR)? 0xf:0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint)* mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_LoP = leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_RoP = rightOfPoint;
- DP(printf("Minimum Cycle Time At Max CasLatancy: %d.%d [ns]\n",leftOfPoint, rightOfPoint));
- break;
+ case 9: /* Minimum Cycle Time At Max CasLatancy */
+ shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
+ mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
+ maskLeftOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
+ maskRightOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
+ leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
+ rightOfPoint = (data[i] & maskRightOfPoint) * mult;
+ dimmInfo->minimumCycleTimeAtMaxCasLatancy_LoP =
+ leftOfPoint;
+ dimmInfo->minimumCycleTimeAtMaxCasLatancy_RoP =
+ rightOfPoint;
+ DP (printf
+ ("Minimum Cycle Time At Max CasLatancy: %d.%d [ns]\n",
+ leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 10: /* Clock To Data Out */
- div = (dimmInfo->memoryType == DDR)? 100:10;
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOut_LoP = leftOfPoint;
- dimmInfo->clockToDataOut_RoP = rightOfPoint;
- DP(printf("Clock To Data Out: %d.%2d [ns]\n",leftOfPoint, rightOfPoint ));
- /*dimmInfo->clockToDataOut*/
- break;
+ case 10: /* Clock To Data Out */
+ div = (dimmInfo->memoryType == DDR) ? 100 : 10;
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / div;
+ rightOfPoint = time_tmp % div;
+ dimmInfo->clockToDataOut_LoP = leftOfPoint;
+ dimmInfo->clockToDataOut_RoP = rightOfPoint;
+ DP (printf
+ ("Clock To Data Out: %d.%2d [ns]\n",
+ leftOfPoint, rightOfPoint));
+ /*dimmInfo->clockToDataOut */
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
#ifdef CONFIG_ECC
- case 11: /* Error Check Type */
- dimmInfo->errorCheckType = data[i];
- DP(printf("Error Check Type (0=NONE): %d\n", dimmInfo->errorCheckType));
- break;
+ case 11: /* Error Check Type */
+ dimmInfo->errorCheckType = data[i];
+ DP (printf
+ ("Error Check Type (0=NONE): %d\n",
+ dimmInfo->errorCheckType));
+ break;
#endif
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 12: /* Refresh Interval */
- dimmInfo->RefreshInterval = data[i];
- DP(printf("RefreshInterval (80= Self refresh Normal, 15.625us) : %x\n", dimmInfo->RefreshInterval));
- break;
+ case 12: /* Refresh Interval */
+ dimmInfo->RefreshInterval = data[i];
+ DP (printf
+ ("RefreshInterval (80= Self refresh Normal, 15.625us) : %x\n",
+ dimmInfo->RefreshInterval));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 13: /* Sdram Width */
- dimmInfo->sdramWidth = data[i];
- DP(printf("Sdram Width: %d\n", dimmInfo->sdramWidth));
- break;
+ case 13: /* Sdram Width */
+ dimmInfo->sdramWidth = data[i];
+ DP (printf
+ ("Sdram Width: %d\n",
+ dimmInfo->sdramWidth));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 14: /* Error Check Data Width */
- dimmInfo->errorCheckDataWidth = data[i];
- DP(printf("Error Check Data Width: %d\n", dimmInfo->errorCheckDataWidth));
- break;
+ case 14: /* Error Check Data Width */
+ dimmInfo->errorCheckDataWidth = data[i];
+ DP (printf
+ ("Error Check Data Width: %d\n",
+ dimmInfo->errorCheckDataWidth));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 15: /* Minimum Clock Delay */
- dimmInfo->minClkDelay = data[i];
- DP(printf("Minimum Clock Delay: %d\n", dimmInfo->minClkDelay));
- break;
+ case 15: /* Minimum Clock Delay */
+ dimmInfo->minClkDelay = data[i];
+ DP (printf
+ ("Minimum Clock Delay: %d\n",
+ dimmInfo->minClkDelay));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 16: /* Burst Length Supported */
- /******-******-******-*******
- * bit3 | bit2 | bit1 | bit0 *
- *******-******-******-*******
- burst length = * 8 | 4 | 2 | 1 *
- *****************************
+ case 16: /* Burst Length Supported */
+ /******-******-******-*******
+ * bit3 | bit2 | bit1 | bit0 *
+ *******-******-******-*******
+ burst length = * 8 | 4 | 2 | 1 *
+ *****************************
- If for example bit0 and bit2 are set, the burst
- length supported are 1 and 4. */
+ If for example bit0 and bit2 are set, the burst
+ length supported are 1 and 4. */
- dimmInfo->burstLengthSupported = data[i];
+ dimmInfo->burstLengthSupported = data[i];
#ifdef DEBUG
- DP(printf("Burst Length Supported: "));
- if (dimmInfo->burstLengthSupported & 0x01)
- DP(printf("1, "));
- if (dimmInfo->burstLengthSupported & 0x02)
- DP(printf("2, "));
- if (dimmInfo->burstLengthSupported & 0x04)
- DP(printf("4, "));
- if (dimmInfo->burstLengthSupported & 0x08)
- DP(printf("8, "));
- DP(printf(" Bit \n"));
+ DP (printf
+ ("Burst Length Supported: "));
+ if (dimmInfo->burstLengthSupported & 0x01)
+ DP (printf ("1, "));
+ if (dimmInfo->burstLengthSupported & 0x02)
+ DP (printf ("2, "));
+ if (dimmInfo->burstLengthSupported & 0x04)
+ DP (printf ("4, "));
+ if (dimmInfo->burstLengthSupported & 0x08)
+ DP (printf ("8, "));
+ DP (printf (" Bit \n"));
#endif
- break;
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 17: /* Number Of Banks On Each Device */
- dimmInfo->numOfBanksOnEachDevice = data[i];
- DP(printf("Number Of Banks On Each Chip: %d\n", dimmInfo->numOfBanksOnEachDevice));
- break;
+ case 17: /* Number Of Banks On Each Device */
+ dimmInfo->numOfBanksOnEachDevice = data[i];
+ DP (printf
+ ("Number Of Banks On Each Chip: %d\n",
+ dimmInfo->numOfBanksOnEachDevice));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 18: /* Suported Cas Latencies */
-
- /* DDR:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | TBD | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 *
- *********************************************************
- SDRAM:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 *
- ********************************************************/
- dimmInfo->suportedCasLatencies = data[i];
+ case 18: /* Suported Cas Latencies */
+
+ /* DDR:
+ *******-******-******-******-******-******-******-*******
+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
+ *******-******-******-******-******-******-******-*******
+ CAS = * TBD | TBD | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 *
+ *********************************************************
+ SDRAM:
+ *******-******-******-******-******-******-******-*******
+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
+ *******-******-******-******-******-******-******-*******
+ CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 *
+ ********************************************************/
+ dimmInfo->suportedCasLatencies = data[i];
#ifdef DEBUG
- DP(printf("Suported Cas Latencies: (CL) "));
- if (dimmInfo->memoryType == 0) /* SDRAM*/
- {
- for (k = 0; k <=7; k++)
- {
- if (dimmInfo->suportedCasLatencies & (1 << k))
- DP(printf("%d, ", k+1));
- }
+ DP (printf
+ ("Suported Cas Latencies: (CL) "));
+ if (dimmInfo->memoryType == 0) { /* SDRAM */
+ for (k = 0; k <= 7; k++) {
+ if (dimmInfo->
+ suportedCasLatencies & (1 << k))
+ DP (printf
+ ("%d, ",
+ k + 1));
+ }
+
+ } else { /* DDR-RAM */
+
+ if (dimmInfo->suportedCasLatencies & 1)
+ DP (printf ("1, "));
+ if (dimmInfo->suportedCasLatencies & 2)
+ DP (printf ("1.5, "));
+ if (dimmInfo->suportedCasLatencies & 4)
+ DP (printf ("2, "));
+ if (dimmInfo->suportedCasLatencies & 8)
+ DP (printf ("2.5, "));
+ if (dimmInfo->suportedCasLatencies & 16)
+ DP (printf ("3, "));
+ if (dimmInfo->suportedCasLatencies & 32)
+ DP (printf ("3.5, "));
- }
- else /* DDR-RAM*/
- {
- if (dimmInfo->suportedCasLatencies & 1)
- DP(printf("1, "));
- if (dimmInfo->suportedCasLatencies & 2)
- DP(printf("1.5, "));
- if (dimmInfo->suportedCasLatencies & 4)
- DP(printf("2, "));
- if (dimmInfo->suportedCasLatencies & 8)
- DP(printf("2.5, "));
- if (dimmInfo->suportedCasLatencies & 16)
- DP(printf("3, "));
- if (dimmInfo->suportedCasLatencies & 32)
- DP(printf("3.5, "));
-
- }
- DP(printf("\n"));
+ }
+ DP (printf ("\n"));
#endif
- /* Calculating MAX CAS latency */
- for(j = 7 ; j > 0 ; j--)
- {
- if(((dimmInfo->suportedCasLatencies >> j) & 0x1) == 1)
- {
- switch(dimmInfo->memoryType)
- {
- case DDR:
- /* CAS latency 1, 1.5, 2, 2.5, 3, 3.5 */
- switch (j)
- {
- case 7:
- DP(printf("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_FAULT;
- hang();
- break;
- case 6:
- DP(printf("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_FAULT;
- hang();
- break;
- case 5:
- DP(printf("Max. Cas Latencies (DDR): 3.5 clk's\n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_3_5;
- break;
- case 4:
- DP(printf("Max. Cas Latencies (DDR): 3 clk's \n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_3;
- break;
- case 3:
- DP(printf("Max. Cas Latencies (DDR): 2.5 clk's \n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_2_5;
- break;
- case 2:
- DP(printf("Max. Cas Latencies (DDR): 2 clk's \n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_2;
- break;
- case 1:
- DP(printf("Max. Cas Latencies (DDR): 1.5 clk's \n"));
- dimmInfo->maxClSupported_DDR = DDR_CL_1_5;
- break;
+ /* Calculating MAX CAS latency */
+ for (j = 7; j > 0; j--) {
+ if (((dimmInfo->
+ suportedCasLatencies >> j) & 0x1) ==
+ 1) {
+ switch (dimmInfo->memoryType) {
+ case DDR:
+ /* CAS latency 1, 1.5, 2, 2.5, 3, 3.5 */
+ switch (j) {
+ case 7:
+ DP (printf
+ ("Max. Cas Latencies (DDR): ERROR !!!\n"));
+ dimmInfo->
+ maxClSupported_DDR
+ =
+ DDR_CL_FAULT;
+ hang ();
+ break;
+ case 6:
+ DP (printf
+ ("Max. Cas Latencies (DDR): ERROR !!!\n"));
+ dimmInfo->
+ maxClSupported_DDR
+ =
+ DDR_CL_FAULT;
+ hang ();
+ break;
+ case 5:
+ DP (printf
+ ("Max. Cas Latencies (DDR): 3.5 clk's\n"));
+ dimmInfo->
+ maxClSupported_DDR
+ = DDR_CL_3_5;
+ break;
+ case 4:
+ DP (printf
+ ("Max. Cas Latencies (DDR): 3 clk's \n"));
+ dimmInfo->
+ maxClSupported_DDR
+ = DDR_CL_3;
+ break;
+ case 3:
+ DP (printf
+ ("Max. Cas Latencies (DDR): 2.5 clk's \n"));
+ dimmInfo->
+ maxClSupported_DDR
+ = DDR_CL_2_5;
+ break;
+ case 2:
+ DP (printf
+ ("Max. Cas Latencies (DDR): 2 clk's \n"));
+ dimmInfo->
+ maxClSupported_DDR
+ = DDR_CL_2;
+ break;
+ case 1:
+ DP (printf
+ ("Max. Cas Latencies (DDR): 1.5 clk's \n"));
+ dimmInfo->
+ maxClSupported_DDR
+ = DDR_CL_1_5;
+ break;
+ }
+ dimmInfo->
+ maxCASlatencySupported_LoP
+ =
+ 1 +
+ (int) (5 * j / 10);
+ if (((5 * j) % 10) != 0)
+ dimmInfo->
+ maxCASlatencySupported_RoP
+ = 5;
+ else
+ dimmInfo->
+ maxCASlatencySupported_RoP
+ = 0;
+ DP (printf
+ ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
+ dimmInfo->
+ maxCASlatencySupported_LoP,
+ dimmInfo->
+ maxCASlatencySupported_RoP));
+ break;
+ case SDRAM:
+ /* CAS latency 1, 2, 3, 4, 5, 6, 7 */
+ dimmInfo->maxClSupported_SD = j; /* Cas Latency DDR-RAM Coded */
+ DP (printf
+ ("Max. Cas Latencies (SD): %d\n",
+ dimmInfo->
+ maxClSupported_SD));
+ dimmInfo->
+ maxCASlatencySupported_LoP
+ = j;
+ dimmInfo->
+ maxCASlatencySupported_RoP
+ = 0;
+ DP (printf
+ ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
+ dimmInfo->
+ maxCASlatencySupported_LoP,
+ dimmInfo->
+ maxCASlatencySupported_RoP));
+ break;
+ }
+ break;
+ }
}
- dimmInfo->maxCASlatencySupported_LoP = 1 + (int) (5 * j /10);
- if (((5*j) % 10) != 0)
- dimmInfo->maxCASlatencySupported_RoP = 5;
- else
- dimmInfo->maxCASlatencySupported_RoP = 0;
- DP(printf("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n", dimmInfo->maxCASlatencySupported_LoP, dimmInfo->maxCASlatencySupported_RoP));
- break;
- case SDRAM:
- /* CAS latency 1, 2, 3, 4, 5, 6, 7 */
- dimmInfo->maxClSupported_SD = j; /* Cas Latency DDR-RAM Coded */
- DP(printf("Max. Cas Latencies (SD): %d\n", dimmInfo->maxClSupported_SD));
- dimmInfo->maxCASlatencySupported_LoP = j ;
- dimmInfo->maxCASlatencySupported_RoP = 0;
- DP(printf("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n", dimmInfo->maxCASlatencySupported_LoP, dimmInfo->maxCASlatencySupported_RoP));
- break;
- }
- break;
- }
- }
- break;
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 21: /* Buffered Address And Control Inputs */
- DP(printf("\nModul Attributes (SPD Byte 21): \n"));
- dimmInfo->bufferedAddrAndControlInputs = data[i] & BIT0;
- dimmInfo->registeredAddrAndControlInputs = (data[i] & BIT1) >> 1;
- dimmInfo->onCardPLL = (data[i] & BIT2) >> 2;
- dimmInfo->bufferedDQMBinputs = (data[i] & BIT3) >> 3;
- dimmInfo->registeredDQMBinputs = (data[i] & BIT4) >> 4;
- dimmInfo->differentialClockInput = (data[i] & BIT5) >> 5;
- dimmInfo->redundantRowAddressing = (data[i] & BIT6) >> 6;
+ case 21: /* Buffered Address And Control Inputs */
+ DP (printf ("\nModul Attributes (SPD Byte 21): \n"));
+ dimmInfo->bufferedAddrAndControlInputs =
+ data[i] & BIT0;
+ dimmInfo->registeredAddrAndControlInputs =
+ (data[i] & BIT1) >> 1;
+ dimmInfo->onCardPLL = (data[i] & BIT2) >> 2;
+ dimmInfo->bufferedDQMBinputs = (data[i] & BIT3) >> 3;
+ dimmInfo->registeredDQMBinputs =
+ (data[i] & BIT4) >> 4;
+ dimmInfo->differentialClockInput =
+ (data[i] & BIT5) >> 5;
+ dimmInfo->redundantRowAddressing =
+ (data[i] & BIT6) >> 6;
#ifdef DEBUG
- if (dimmInfo->bufferedAddrAndControlInputs == 1)
- DP(printf(" - Buffered Address/Control Input: Yes \n"));
- else
- DP(printf(" - Buffered Address/Control Input: No \n"));
-
- if (dimmInfo->registeredAddrAndControlInputs == 1)
- DP(printf(" - Registered Address/Control Input: Yes \n"));
- else
- DP(printf(" - Registered Address/Control Input: No \n"));
-
- if (dimmInfo->onCardPLL == 1)
- DP(printf(" - On-Card PLL (clock): Yes \n"));
- else
- DP(printf(" - On-Card PLL (clock): No \n"));
-
- if (dimmInfo->bufferedDQMBinputs == 1)
- DP(printf(" - Bufferd DQMB Inputs: Yes \n"));
- else
- DP(printf(" - Bufferd DQMB Inputs: No \n"));
-
- if (dimmInfo->registeredDQMBinputs == 1)
- DP(printf(" - Registered DQMB Inputs: Yes \n"));
- else
- DP(printf(" - Registered DQMB Inputs: No \n"));
-
- if (dimmInfo->differentialClockInput == 1)
- DP(printf(" - Differential Clock Input: Yes \n"));
- else
- DP(printf(" - Differential Clock Input: No \n"));
-
- if (dimmInfo->redundantRowAddressing == 1)
- DP(printf(" - redundant Row Addressing: Yes \n"));
- else
- DP(printf(" - redundant Row Addressing: No \n"));
+ if (dimmInfo->bufferedAddrAndControlInputs == 1)
+ DP (printf
+ (" - Buffered Address/Control Input: Yes \n"));
+ else
+ DP (printf
+ (" - Buffered Address/Control Input: No \n"));
+
+ if (dimmInfo->registeredAddrAndControlInputs == 1)
+ DP (printf
+ (" - Registered Address/Control Input: Yes \n"));
+ else
+ DP (printf
+ (" - Registered Address/Control Input: No \n"));
+
+ if (dimmInfo->onCardPLL == 1)
+ DP (printf
+ (" - On-Card PLL (clock): Yes \n"));
+ else
+ DP (printf
+ (" - On-Card PLL (clock): No \n"));
+
+ if (dimmInfo->bufferedDQMBinputs == 1)
+ DP (printf
+ (" - Bufferd DQMB Inputs: Yes \n"));
+ else
+ DP (printf
+ (" - Bufferd DQMB Inputs: No \n"));
+
+ if (dimmInfo->registeredDQMBinputs == 1)
+ DP (printf
+ (" - Registered DQMB Inputs: Yes \n"));
+ else
+ DP (printf
+ (" - Registered DQMB Inputs: No \n"));
+
+ if (dimmInfo->differentialClockInput == 1)
+ DP (printf
+ (" - Differential Clock Input: Yes \n"));
+ else
+ DP (printf
+ (" - Differential Clock Input: No \n"));
+
+ if (dimmInfo->redundantRowAddressing == 1)
+ DP (printf
+ (" - redundant Row Addressing: Yes \n"));
+ else
+ DP (printf
+ (" - redundant Row Addressing: No \n"));
#endif
- break;
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 22: /* Suported AutoPreCharge */
- DP(printf("\nModul Attributes (SPD Byte 22): \n"));
- dimmInfo->suportedEarlyRasPreCharge= data[i] & BIT0;
- dimmInfo->suportedAutoPreCharge = (data[i] & BIT1) >> 1;
- dimmInfo->suportedPreChargeAll = (data[i] & BIT2) >> 2;
- dimmInfo->suportedWrite1ReadBurst= (data[i] & BIT3) >> 3;
- dimmInfo->suported5PercentLowVCC= (data[i] & BIT4) >> 4;
- dimmInfo->suported5PercentUpperVCC= (data[i] & BIT5) >> 5;
+ case 22: /* Suported AutoPreCharge */
+ DP (printf ("\nModul Attributes (SPD Byte 22): \n"));
+ dimmInfo->suportedEarlyRasPreCharge = data[i] & BIT0;
+ dimmInfo->suportedAutoPreCharge =
+ (data[i] & BIT1) >> 1;
+ dimmInfo->suportedPreChargeAll =
+ (data[i] & BIT2) >> 2;
+ dimmInfo->suportedWrite1ReadBurst =
+ (data[i] & BIT3) >> 3;
+ dimmInfo->suported5PercentLowVCC =
+ (data[i] & BIT4) >> 4;
+ dimmInfo->suported5PercentUpperVCC =
+ (data[i] & BIT5) >> 5;
#ifdef DEBUG
- if (dimmInfo->suportedEarlyRasPreCharge == 1)
- DP(printf(" - Early Ras Precharge: Yes \n"));
- else
- DP(printf(" - Early Ras Precharge: No \n"));
-
- if (dimmInfo->suportedAutoPreCharge == 1)
- DP(printf(" - AutoPreCharge: Yes \n"));
- else
- DP(printf(" - AutoPreCharge: No \n"));
-
- if (dimmInfo->suportedPreChargeAll == 1)
- DP(printf(" - Precharge All: Yes \n"));
- else
- DP(printf(" - Precharge All: No \n"));
-
- if (dimmInfo->suportedWrite1ReadBurst == 1)
- DP(printf(" - Write 1/ReadBurst: Yes \n"));
- else
- DP(printf(" - Write 1/ReadBurst: No \n"));
-
- if (dimmInfo->suported5PercentLowVCC == 1)
- DP(printf(" - lower VCC tolerance: 5 Percent \n"));
- else
- DP(printf(" - lower VCC tolerance: 10 Percent \n"));
-
- if (dimmInfo->suported5PercentUpperVCC == 1)
- DP(printf(" - upper VCC tolerance: 5 Percent \n"));
- else
- DP(printf(" - upper VCC tolerance: 10 Percent \n"));
+ if (dimmInfo->suportedEarlyRasPreCharge == 1)
+ DP (printf
+ (" - Early Ras Precharge: Yes \n"));
+ else
+ DP (printf
+ (" - Early Ras Precharge: No \n"));
+
+ if (dimmInfo->suportedAutoPreCharge == 1)
+ DP (printf
+ (" - AutoPreCharge: Yes \n"));
+ else
+ DP (printf
+ (" - AutoPreCharge: No \n"));
+
+ if (dimmInfo->suportedPreChargeAll == 1)
+ DP (printf
+ (" - Precharge All: Yes \n"));
+ else
+ DP (printf
+ (" - Precharge All: No \n"));
+
+ if (dimmInfo->suportedWrite1ReadBurst == 1)
+ DP (printf
+ (" - Write 1/ReadBurst: Yes \n"));
+ else
+ DP (printf
+ (" - Write 1/ReadBurst: No \n"));
+
+ if (dimmInfo->suported5PercentLowVCC == 1)
+ DP (printf
+ (" - lower VCC tolerance: 5 Percent \n"));
+ else
+ DP (printf
+ (" - lower VCC tolerance: 10 Percent \n"));
+
+ if (dimmInfo->suported5PercentUpperVCC == 1)
+ DP (printf
+ (" - upper VCC tolerance: 5 Percent \n"));
+ else
+ DP (printf
+ (" - upper VCC tolerance: 10 Percent \n"));
#endif
- break;
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 23: /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
- shift = (dimmInfo->memoryType == DDR)? 4:2;
- mult = (dimmInfo->memoryType == DDR)? 10:25;
- maskLeftOfPoint = (dimmInfo->memoryType == DDR)? 0xf0:0xfc;
- maskRightOfPoint = (dimmInfo->memoryType == DDR)? 0xf:0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint)* mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_LoP = leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_RoP = rightOfPoint;
- DP(printf("Minimum Cycle Time At 2nd highest CasLatancy (0 = Not supported): %d.%d [ns]\n",leftOfPoint, rightOfPoint ));
- /*dimmInfo->minimumCycleTimeAtMaxCasLatancy*/
- break;
+ case 23: /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
+ shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
+ mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
+ maskLeftOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
+ maskRightOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
+ leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
+ rightOfPoint = (data[i] & maskRightOfPoint) * mult;
+ dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_LoP =
+ leftOfPoint;
+ dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_RoP =
+ rightOfPoint;
+ DP (printf
+ ("Minimum Cycle Time At 2nd highest CasLatancy (0 = Not supported): %d.%d [ns]\n",
+ leftOfPoint, rightOfPoint));
+ /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 24: /* Clock To Data Out 2nd highest Cas Latency Value*/
- div = (dimmInfo->memoryType == DDR)? 100:10;
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus1_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus1_RoP = rightOfPoint;
- DP(printf("Clock To Data Out (2nd CL value): %d.%2d [ns]\n",leftOfPoint, rightOfPoint ));
- break;
+ case 24: /* Clock To Data Out 2nd highest Cas Latency Value */
+ div = (dimmInfo->memoryType == DDR) ? 100 : 10;
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / div;
+ rightOfPoint = time_tmp % div;
+ dimmInfo->clockToDataOutMinus1_LoP = leftOfPoint;
+ dimmInfo->clockToDataOutMinus1_RoP = rightOfPoint;
+ DP (printf
+ ("Clock To Data Out (2nd CL value): %d.%2d [ns]\n",
+ leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 25: /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
- shift = (dimmInfo->memoryType == DDR)? 4:2;
- mult = (dimmInfo->memoryType == DDR)? 10:25;
- maskLeftOfPoint = (dimmInfo->memoryType == DDR)? 0xf0:0xfc;
- maskRightOfPoint = (dimmInfo->memoryType == DDR)? 0xf:0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint)* mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_LoP = leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_RoP = rightOfPoint;
- DP(printf("Minimum Cycle Time At 3rd highest CasLatancy (0 = Not supported): %d.%d [ns]\n",leftOfPoint, rightOfPoint ));
- /*dimmInfo->minimumCycleTimeAtMaxCasLatancy*/
- break;
+ case 25: /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
+ shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
+ mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
+ maskLeftOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
+ maskRightOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
+ leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
+ rightOfPoint = (data[i] & maskRightOfPoint) * mult;
+ dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_LoP =
+ leftOfPoint;
+ dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_RoP =
+ rightOfPoint;
+ DP (printf
+ ("Minimum Cycle Time At 3rd highest CasLatancy (0 = Not supported): %d.%d [ns]\n",
+ leftOfPoint, rightOfPoint));
+ /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 26: /* Clock To Data Out 3rd highest Cas Latency Value*/
- div = (dimmInfo->memoryType == DDR)? 100:10;
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus2_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus2_RoP = rightOfPoint;
- DP(printf("Clock To Data Out (3rd CL value): %d.%2d [ns]\n",leftOfPoint, rightOfPoint ));
- break;
+ case 26: /* Clock To Data Out 3rd highest Cas Latency Value */
+ div = (dimmInfo->memoryType == DDR) ? 100 : 10;
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / div;
+ rightOfPoint = time_tmp % div;
+ dimmInfo->clockToDataOutMinus2_LoP = leftOfPoint;
+ dimmInfo->clockToDataOutMinus2_RoP = rightOfPoint;
+ DP (printf
+ ("Clock To Data Out (3rd CL value): %d.%2d [ns]\n",
+ leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 27: /* Minimum Row Precharge Time */
- shift = (dimmInfo->memoryType == DDR)? 2:0;
- maskLeftOfPoint = (dimmInfo->memoryType == DDR)? 0xfc:0xff;
- maskRightOfPoint = (dimmInfo->memoryType == DDR)? 0x03:0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint)*25;
-
- dimmInfo->minRowPrechargeTime = ((leftOfPoint*100) + rightOfPoint); /* measured in n times 10ps Intervals */
- trp_clocks = (dimmInfo->minRowPrechargeTime + (tmemclk-1)) / tmemclk;
- DP(printf("*** 1 clock cycle = %ld 10ps intervalls = %ld.%ld ns****\n", tmemclk, tmemclk/100, tmemclk%100 ));
- DP(printf("Minimum Row Precharge Time [ns]: %d.%2d = in Clk cycles %d\n", leftOfPoint, rightOfPoint, trp_clocks));
- break;
+ case 27: /* Minimum Row Precharge Time */
+ shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
+ maskLeftOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
+ maskRightOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
+ leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
+ rightOfPoint = (data[i] & maskRightOfPoint) * 25;
+
+ dimmInfo->minRowPrechargeTime = ((leftOfPoint * 100) + rightOfPoint); /* measured in n times 10ps Intervals */
+ trp_clocks =
+ (dimmInfo->minRowPrechargeTime +
+ (tmemclk - 1)) / tmemclk;
+ DP (printf
+ ("*** 1 clock cycle = %ld 10ps intervalls = %ld.%ld ns****\n",
+ tmemclk, tmemclk / 100, tmemclk % 100));
+ DP (printf
+ ("Minimum Row Precharge Time [ns]: %d.%2d = in Clk cycles %d\n",
+ leftOfPoint, rightOfPoint, trp_clocks));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 28: /* Minimum Row Active to Row Active Time */
- shift = (dimmInfo->memoryType == DDR)? 2:0;
- maskLeftOfPoint = (dimmInfo->memoryType == DDR)? 0xfc:0xff;
- maskRightOfPoint = (dimmInfo->memoryType == DDR)? 0x03:0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint)*25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint*100) + rightOfPoint); /* measured in 100ns Intervals */
- trrd_clocks = (dimmInfo->minRowActiveRowActiveDelay + (tmemclk-1)) / tmemclk;
- DP(printf("Minimum Row Active -To- Row Active Delay [ns]: %d.%2d = in Clk cycles %d\n", leftOfPoint, rightOfPoint, trp_clocks));
- break;
+ case 28: /* Minimum Row Active to Row Active Time */
+ shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
+ maskLeftOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
+ maskRightOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
+ leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
+ rightOfPoint = (data[i] & maskRightOfPoint) * 25;
+
+ dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
+ trrd_clocks =
+ (dimmInfo->minRowActiveRowActiveDelay +
+ (tmemclk - 1)) / tmemclk;
+ DP (printf
+ ("Minimum Row Active -To- Row Active Delay [ns]: %d.%2d = in Clk cycles %d\n",
+ leftOfPoint, rightOfPoint, trp_clocks));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 29: /* Minimum Ras-To-Cas Delay */
- shift = (dimmInfo->memoryType == DDR)? 2:0;
- maskLeftOfPoint = (dimmInfo->memoryType == DDR)? 0xfc:0xff;
- maskRightOfPoint = (dimmInfo->memoryType == DDR)? 0x03:0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint)*25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint*100) + rightOfPoint); /* measured in 100ns Intervals */
- trcd_clocks = (dimmInfo->minRowActiveRowActiveDelay + (tmemclk-1) )/ tmemclk;
- DP(printf("Minimum Ras-To-Cas Delay [ns]: %d.%2d = in Clk cycles %d\n", leftOfPoint, rightOfPoint, trp_clocks));
- break;
+ case 29: /* Minimum Ras-To-Cas Delay */
+ shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
+ maskLeftOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
+ maskRightOfPoint =
+ (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
+ leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
+ rightOfPoint = (data[i] & maskRightOfPoint) * 25;
+
+ dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
+ trcd_clocks =
+ (dimmInfo->minRowActiveRowActiveDelay +
+ (tmemclk - 1)) / tmemclk;
+ DP (printf
+ ("Minimum Ras-To-Cas Delay [ns]: %d.%2d = in Clk cycles %d\n",
+ leftOfPoint, rightOfPoint, trp_clocks));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 30: /* Minimum Ras Pulse Width */
- dimmInfo->minRasPulseWidth = data[i];
- tras_clocks = (NSto10PS(data[i])+(tmemclk-1)) / tmemclk;
- DP(printf("Minimum Ras Pulse Width [ns]: %d = in Clk cycles %d\n", dimmInfo->minRasPulseWidth, tras_clocks));
+ case 30: /* Minimum Ras Pulse Width */
+ dimmInfo->minRasPulseWidth = data[i];
+ tras_clocks =
+ (NSto10PS (data[i]) +
+ (tmemclk - 1)) / tmemclk;
+ DP (printf
+ ("Minimum Ras Pulse Width [ns]: %d = in Clk cycles %d\n",
+ dimmInfo->minRasPulseWidth, tras_clocks));
- break;
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 31: /* Module Bank Density */
- dimmInfo->moduleBankDensity = data[i];
- DP(printf("Module Bank Density: %d\n", dimmInfo->moduleBankDensity));
+ case 31: /* Module Bank Density */
+ dimmInfo->moduleBankDensity = data[i];
+ DP (printf
+ ("Module Bank Density: %d\n",
+ dimmInfo->moduleBankDensity));
#ifdef DEBUG
- DP(printf("*** Offered Densities (more than 1 = Multisize-Module): "));
- {
- if (dimmInfo->moduleBankDensity & 1)
- DP(printf("4MB, "));
- if (dimmInfo->moduleBankDensity & 2)
- DP(printf("8MB, "));
- if (dimmInfo->moduleBankDensity & 4)
- DP(printf("16MB, "));
- if (dimmInfo->moduleBankDensity & 8)
- DP(printf("32MB, "));
- if (dimmInfo->moduleBankDensity & 16)
- DP(printf("64MB, "));
- if (dimmInfo->moduleBankDensity & 32)
- DP(printf("128MB, "));
- if ((dimmInfo->moduleBankDensity & 64) || (dimmInfo->moduleBankDensity & 128)) {
- DP(printf("ERROR, "));
- hang();
+ DP (printf
+ ("*** Offered Densities (more than 1 = Multisize-Module): "));
+ {
+ if (dimmInfo->moduleBankDensity & 1)
+ DP (printf ("4MB, "));
+ if (dimmInfo->moduleBankDensity & 2)
+ DP (printf ("8MB, "));
+ if (dimmInfo->moduleBankDensity & 4)
+ DP (printf ("16MB, "));
+ if (dimmInfo->moduleBankDensity & 8)
+ DP (printf ("32MB, "));
+ if (dimmInfo->moduleBankDensity & 16)
+ DP (printf ("64MB, "));
+ if (dimmInfo->moduleBankDensity & 32)
+ DP (printf ("128MB, "));
+ if ((dimmInfo->moduleBankDensity & 64)
+ || (dimmInfo->moduleBankDensity & 128)) {
+ DP (printf ("ERROR, "));
+ hang ();
+ }
}
- }
- DP(printf("\n"));
+ DP (printf ("\n"));
#endif
- break;
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 32: /* Address And Command Setup Time (measured in ns/1000) */
- sign = 1;
- switch(dimmInfo->memoryType)
- {
- case DDR:
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if(leftOfPoint > 7)
- {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandSetupTime = (leftOfPoint*100 + rightOfPoint) * sign;
- DP(printf("Address And Command Setup Time [ns]: %d.%d\n", sign*leftOfPoint, rightOfPoint));
- break;
+ case 32: /* Address And Command Setup Time (measured in ns/1000) */
+ sign = 1;
+ switch (dimmInfo->memoryType) {
+ case DDR:
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / 100;
+ rightOfPoint = time_tmp % 100;
+ break;
+ case SDRAM:
+ leftOfPoint = (data[i] & 0xf0) >> 4;
+ if (leftOfPoint > 7) {
+ leftOfPoint = data[i] & 0x70 >> 4;
+ sign = -1;
+ }
+ rightOfPoint = (data[i] & 0x0f);
+ break;
+ }
+ dimmInfo->addrAndCommandSetupTime =
+ (leftOfPoint * 100 + rightOfPoint) * sign;
+ DP (printf
+ ("Address And Command Setup Time [ns]: %d.%d\n",
+ sign * leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 33: /* Address And Command Hold Time */
- sign = 1;
- switch(dimmInfo->memoryType)
- {
- case DDR:
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if(leftOfPoint > 7)
- {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f) ;
- break;
- }
- dimmInfo->addrAndCommandHoldTime = (leftOfPoint * 100 + rightOfPoint) * sign;
- DP(printf("Address And Command Hold Time [ns]: %d.%d\n", sign*leftOfPoint, rightOfPoint));
- break;
+ case 33: /* Address And Command Hold Time */
+ sign = 1;
+ switch (dimmInfo->memoryType) {
+ case DDR:
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / 100;
+ rightOfPoint = time_tmp % 100;
+ break;
+ case SDRAM:
+ leftOfPoint = (data[i] & 0xf0) >> 4;
+ if (leftOfPoint > 7) {
+ leftOfPoint = data[i] & 0x70 >> 4;
+ sign = -1;
+ }
+ rightOfPoint = (data[i] & 0x0f);
+ break;
+ }
+ dimmInfo->addrAndCommandHoldTime =
+ (leftOfPoint * 100 + rightOfPoint) * sign;
+ DP (printf
+ ("Address And Command Hold Time [ns]: %d.%d\n",
+ sign * leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 34: /* Data Input Setup Time */
- sign = 1;
- switch(dimmInfo->memoryType)
- {
- case DDR:
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if( leftOfPoint > 7)
- {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f );
- break;
- }
- dimmInfo->dataInputSetupTime = (leftOfPoint *100 + rightOfPoint) * sign;
- DP(printf("Data Input Setup Time [ns]: %d.%d\n", sign*leftOfPoint, rightOfPoint));
- break;
+ case 34: /* Data Input Setup Time */
+ sign = 1;
+ switch (dimmInfo->memoryType) {
+ case DDR:
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / 100;
+ rightOfPoint = time_tmp % 100;
+ break;
+ case SDRAM:
+ leftOfPoint = (data[i] & 0xf0) >> 4;
+ if (leftOfPoint > 7) {
+ leftOfPoint = data[i] & 0x70 >> 4;
+ sign = -1;
+ }
+ rightOfPoint = (data[i] & 0x0f);
+ break;
+ }
+ dimmInfo->dataInputSetupTime =
+ (leftOfPoint * 100 + rightOfPoint) * sign;
+ DP (printf
+ ("Data Input Setup Time [ns]: %d.%d\n",
+ sign * leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- case 35: /* Data Input Hold Time */
- sign = 1;
- switch(dimmInfo->memoryType)
- {
- case DDR:
- time_tmp = (((data[i] & 0xf0) >> 4)*10) + ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if( leftOfPoint > 7)
- {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f) ;
- break;
- }
- dimmInfo->dataInputHoldTime = (leftOfPoint *100 + rightOfPoint) * sign;
- DP(printf("Data Input Hold Time [ns]: %d.%d\n\n", sign*leftOfPoint, rightOfPoint));
- break;
+ case 35: /* Data Input Hold Time */
+ sign = 1;
+ switch (dimmInfo->memoryType) {
+ case DDR:
+ time_tmp =
+ (((data[i] & 0xf0) >> 4) * 10) +
+ ((data[i] & 0x0f));
+ leftOfPoint = time_tmp / 100;
+ rightOfPoint = time_tmp % 100;
+ break;
+ case SDRAM:
+ leftOfPoint = (data[i] & 0xf0) >> 4;
+ if (leftOfPoint > 7) {
+ leftOfPoint = data[i] & 0x70 >> 4;
+ sign = -1;
+ }
+ rightOfPoint = (data[i] & 0x0f);
+ break;
+ }
+ dimmInfo->dataInputHoldTime =
+ (leftOfPoint * 100 + rightOfPoint) * sign;
+ DP (printf
+ ("Data Input Hold Time [ns]: %d.%d\n\n",
+ sign * leftOfPoint, rightOfPoint));
+ break;
/*------------------------------------------------------------------------------------------------------------------------------*/
- }
- }
- /* calculating the sdram density */
- for(i = 0;i < dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses;i++)
- {
- density = density*2;
- }
- dimmInfo->deviceDensity = density*dimmInfo->numOfBanksOnEachDevice*
- dimmInfo->sdramWidth;
- dimmInfo->numberOfDevices = (dimmInfo->dataWidth / dimmInfo->sdramWidth)*
- dimmInfo->numOfModuleBanks;
- devicesForErrCheck = (dimmInfo->dataWidth - 64) / dimmInfo->sdramWidth ;
- if((dimmInfo->errorCheckType == 0x1) ||
- (dimmInfo->errorCheckType == 0x2) ||
- (dimmInfo->errorCheckType == 0x3))
- {
- dimmInfo->size = (dimmInfo->deviceDensity / 8)*
- (dimmInfo->numberOfDevices - devicesForErrCheck);
- }
- else
- {
- dimmInfo->size = (dimmInfo->deviceDensity/8)*dimmInfo->numberOfDevices;
- }
+ }
+ }
+ /* calculating the sdram density */
+ for (i = 0;
+ i < dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses;
+ i++) {
+ density = density * 2;
+ }
+ dimmInfo->deviceDensity = density * dimmInfo->numOfBanksOnEachDevice *
+ dimmInfo->sdramWidth;
+ dimmInfo->numberOfDevices =
+ (dimmInfo->dataWidth / dimmInfo->sdramWidth) *
+ dimmInfo->numOfModuleBanks;
+ devicesForErrCheck =
+ (dimmInfo->dataWidth - 64) / dimmInfo->sdramWidth;
+ if ((dimmInfo->errorCheckType == 0x1)
+ || (dimmInfo->errorCheckType == 0x2)
+ || (dimmInfo->errorCheckType == 0x3)) {
+ dimmInfo->size =
+ (dimmInfo->deviceDensity / 8) *
+ (dimmInfo->numberOfDevices - devicesForErrCheck);
+ } else {
+ dimmInfo->size =
+ (dimmInfo->deviceDensity / 8) *
+ dimmInfo->numberOfDevices;
+ }
- /* compute the module DRB size */
- tmp = (1 << (dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses));
- tmp *= dimmInfo->numOfModuleBanks;
- tmp *= dimmInfo->sdramWidth;
- tmp = tmp >> 24; /* div by 0x4000000 (64M) */
- dimmInfo->drb_size = (uchar)tmp;
- DP(printf("Module DRB size (n*64Mbit): %d\n", dimmInfo->drb_size));
+ /* compute the module DRB size */
+ tmp = (1 <<
+ (dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses));
+ tmp *= dimmInfo->numOfModuleBanks;
+ tmp *= dimmInfo->sdramWidth;
+ tmp = tmp >> 24; /* div by 0x4000000 (64M) */
+ dimmInfo->drb_size = (uchar) tmp;
+ DP (printf ("Module DRB size (n*64Mbit): %d\n", dimmInfo->drb_size));
/* try a CAS latency of 3 first... */
@@ -1010,44 +1224,43 @@ check_dimm(uchar slot, AUX_MEM_DIMM_INFO *dimmInfo)
cal_val = 0;
if (supp_cal & 8) {
- if (NS10to10PS(data[9]) <= tmemclk)
+ if (NS10to10PS (data[9]) <= tmemclk)
cal_val = 6;
}
if (supp_cal & 4) {
- if (NS10to10PS(data[9]) <= tmemclk)
+ if (NS10to10PS (data[9]) <= tmemclk)
cal_val = 5;
}
/* then 2... */
if (supp_cal & 2) {
- if (NS10to10PS(data[23]) <= tmemclk)
+ if (NS10to10PS (data[23]) <= tmemclk)
cal_val = 4;
}
- DP(printf("cal_val = %d\n", cal_val*5));
+ DP (printf ("cal_val = %d\n", cal_val * 5));
/* bummer, did't work... */
if (cal_val == 0) {
- DP(printf("Couldn't find a good CAS latency\n"));
- hang();
+ DP (printf ("Couldn't find a good CAS latency\n"));
+ hang ();
return 0;
}
- return true;
+ return true;
}
/* sets up the GT properly with information passed in */
-int
-setup_sdram(AUX_MEM_DIMM_INFO *info)
+int setup_sdram (AUX_MEM_DIMM_INFO * info)
{
ulong tmp, check;
- ulong tmp_sdram_mode=0; /* 0x141c*/
- ulong tmp_dunit_control_low=0; /* 0x1404*/
+ ulong tmp_sdram_mode = 0; /* 0x141c */
+ ulong tmp_dunit_control_low = 0; /* 0x1404 */
int i;
/* sanity checking */
- if (! info->numOfModuleBanks) {
- printf("setup_sdram called with 0 banks\n");
+ if (!info->numOfModuleBanks) {
+ printf ("setup_sdram called with 0 banks\n");
return 1;
}
@@ -1055,137 +1268,150 @@ setup_sdram(AUX_MEM_DIMM_INFO *info)
/* Program the GT with the discovered data */
if (info->registeredAddrAndControlInputs == true)
- DP(printf("Module is registered, but we do not support registered Modules !!!\n"));
+ DP (printf
+ ("Module is registered, but we do not support registered Modules !!!\n"));
/* delay line */
- set_dfcdlInit(); /* may be its not needed */
- DP(printf("Delay line set done\n"));
-
- /* set SDRAM mode NOP*/ /* To_do check it*/
- GT_REG_WRITE(SDRAM_OPERATION, 0x5);
- while (GTREGREAD(SDRAM_OPERATION) != 0) {
- DP(printf("\n*** SDRAM_OPERATION 1418: Module still busy ... please wait... ***\n"));
- }
+ set_dfcdlInit (); /* may be its not needed */
+ DP (printf ("Delay line set done\n"));
+
+ /* set SDRAM mode NOP */ /* To_do check it */
+ GT_REG_WRITE (SDRAM_OPERATION, 0x5);
+ while (GTREGREAD (SDRAM_OPERATION) != 0) {
+ DP (printf
+ ("\n*** SDRAM_OPERATION 1418: Module still busy ... please wait... ***\n"));
+ }
/* SDRAM configuration */
- GT_REG_WRITE(SDRAM_CONFIG, 0x58200400);
- DP(printf("sdram_conf 0x1400: %08x\n", GTREGREAD(SDRAM_CONFIG)));
+ GT_REG_WRITE (SDRAM_CONFIG, 0x58200400);
+ DP (printf ("sdram_conf 0x1400: %08x\n", GTREGREAD (SDRAM_CONFIG)));
- /* SDRAM open pages controll keep open as much as I can*/
- GT_REG_WRITE(SDRAM_OPEN_PAGES_CONTROL, 0x0);
- DP(printf("sdram_open_pages_controll 0x1414: %08x\n", GTREGREAD(SDRAM_OPEN_PAGES_CONTROL)));
+ /* SDRAM open pages controll keep open as much as I can */
+ GT_REG_WRITE (SDRAM_OPEN_PAGES_CONTROL, 0x0);
+ DP (printf
+ ("sdram_open_pages_controll 0x1414: %08x\n",
+ GTREGREAD (SDRAM_OPEN_PAGES_CONTROL)));
/* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- tmp = (GTREGREAD(D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset*/
+ tmp = (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset */
if (tmp == 0)
- DP(printf("Core Signals are sync (by HW-Setting)!!!\n"));
+ DP (printf ("Core Signals are sync (by HW-Setting)!!!\n"));
else
- DP(printf("Core Signals syncs. are bypassed (by HW-Setting)!!!\n"));
-
- /* SDRAM set CAS Lentency according to SPD information*/
- switch(info->memoryType)
- {
- case SDRAM:
- DP(printf("### SD-RAM not supported yet !!!\n"));
- hang();
- /* ToDo fill SD-RAM if needed !!!!!*/
- break;
-
- case DDR:
- DP(printf("### SET-CL for DDR-RAM\n"));
-
- switch (info->maxClSupported_DDR)
- {
- case DDR_CL_3:
- tmp_dunit_control_low = 0x3c000000; /* Read-Data sampled on falling edge of Clk*/
- tmp_sdram_mode = 0x32; /* CL=3 Burstlength = 4*/
- DP(printf("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
+ DP (printf
+ ("Core Signals syncs. are bypassed (by HW-Setting)!!!\n"));
+
+ /* SDRAM set CAS Lentency according to SPD information */
+ switch (info->memoryType) {
+ case SDRAM:
+ DP (printf ("### SD-RAM not supported yet !!!\n"));
+ hang ();
+ /* ToDo fill SD-RAM if needed !!!!! */
break;
- case DDR_CL_2_5:
- if (tmp == 1) /* clocks sync*/
- {
- tmp_dunit_control_low = 0x24000000; /* Read-Data sampled on falling edge of Clk*/
- tmp_sdram_mode = 0x62; /* CL=2,5 Burstlength = 4*/
- DP(printf("Max. CL is 2,5s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
- }
- else /* clk sync. bypassed */
- {
- tmp_dunit_control_low = 0x03000000; /* Read-Data sampled on rising edge of Clk*/
- tmp_sdram_mode = 0x62; /* CL=2,5 Burstlength = 4*/
- DP(printf("Max. CL is 2,5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
- }
- break;
-
- case DDR_CL_2:
- if (tmp == 1) /* Sync*/
- {
- tmp_dunit_control_low = 0x03000000; /* Read-Data sampled on rising edge of Clk*/
- tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4*/
- DP(printf("Max. CL is 2s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
- }
- else /* Not sync. */
- {
- tmp_dunit_control_low = 0x3b000000; /* Read-Data sampled on rising edge of Clk*/
- tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4*/
- DP(printf("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
- }
- break;
-
- case DDR_CL_1_5:
- if (tmp == 1) /* Sync*/
- {
- tmp_dunit_control_low = 0x23000000; /* Read-Data sampled on falling edge of Clk*/
- tmp_sdram_mode = 0x52; /* CL=1,5 Burstlength = 4*/
- DP(printf("Max. CL is 1,5s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
- }
- else /* not sync*/
- {
- tmp_dunit_control_low = 0x1a000000; /* Read-Data sampled on rising edge of Clk*/
- tmp_sdram_mode = 0x52; /* CL=1,5 Burstlength = 4*/
- DP(printf("Max. CL is 1,5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",tmp_sdram_mode, tmp_dunit_control_low ));
- }
- break;
+ case DDR:
+ DP (printf ("### SET-CL for DDR-RAM\n"));
+
+ switch (info->maxClSupported_DDR) {
+ case DDR_CL_3:
+ tmp_dunit_control_low = 0x3c000000; /* Read-Data sampled on falling edge of Clk */
+ tmp_sdram_mode = 0x32; /* CL=3 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ break;
+
+ case DDR_CL_2_5:
+ if (tmp == 1) { /* clocks sync */
+ tmp_dunit_control_low = 0x24000000; /* Read-Data sampled on falling edge of Clk */
+ tmp_sdram_mode = 0x62; /* CL=2,5 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 2,5s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ } else { /* clk sync. bypassed */
+
+ tmp_dunit_control_low = 0x03000000; /* Read-Data sampled on rising edge of Clk */
+ tmp_sdram_mode = 0x62; /* CL=2,5 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 2,5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ }
+ break;
+
+ case DDR_CL_2:
+ if (tmp == 1) { /* Sync */
+ tmp_dunit_control_low = 0x03000000; /* Read-Data sampled on rising edge of Clk */
+ tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 2s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ } else { /* Not sync. */
+
+ tmp_dunit_control_low = 0x3b000000; /* Read-Data sampled on rising edge of Clk */
+ tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ }
+ break;
+
+ case DDR_CL_1_5:
+ if (tmp == 1) { /* Sync */
+ tmp_dunit_control_low = 0x23000000; /* Read-Data sampled on falling edge of Clk */
+ tmp_sdram_mode = 0x52; /* CL=1,5 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 1,5s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ } else { /* not sync */
+
+ tmp_dunit_control_low = 0x1a000000; /* Read-Data sampled on rising edge of Clk */
+ tmp_sdram_mode = 0x52; /* CL=1,5 Burstlength = 4 */
+ DP (printf
+ ("Max. CL is 1,5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
+ tmp_sdram_mode, tmp_dunit_control_low));
+ }
+ break;
- default:
- printf("Max. CL is out of range %d\n", info->maxClSupported_DDR);
- hang();
+ default:
+ printf ("Max. CL is out of range %d\n",
+ info->maxClSupported_DDR);
+ hang ();
+ break;
+ }
break;
- }
- break;
- }
+ }
/* Write results of CL detection procedure */
- GT_REG_WRITE(SDRAM_MODE, tmp_sdram_mode);
- /* set SDRAM mode SetCommand 0x1418*/
- GT_REG_WRITE(SDRAM_OPERATION, 0x3);
- while (GTREGREAD(SDRAM_OPERATION) != 0) {
- DP(printf("\n*** SDRAM_OPERATION 1418 after SDRAM_MODE: Module still busy ... please wait... ***\n"));
- }
+ GT_REG_WRITE (SDRAM_MODE, tmp_sdram_mode);
+ /* set SDRAM mode SetCommand 0x1418 */
+ GT_REG_WRITE (SDRAM_OPERATION, 0x3);
+ while (GTREGREAD (SDRAM_OPERATION) != 0) {
+ DP (printf
+ ("\n*** SDRAM_OPERATION 1418 after SDRAM_MODE: Module still busy ... please wait... ***\n"));
+ }
/* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- tmp = (GTREGREAD(D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset*/
- if (tmp != 1) /*clocks are not sync*/
- {
- /* asyncmode*/
- GT_REG_WRITE(D_UNIT_CONTROL_LOW ,
- (GTREGREAD(D_UNIT_CONTROL_LOW) & 0x7F) | 0x18110780 | tmp_dunit_control_low );
- }
- else
- {
- /* syncmode*/
- GT_REG_WRITE(D_UNIT_CONTROL_LOW ,
- (GTREGREAD(D_UNIT_CONTROL_LOW) & 0x7F) | 0x00110000 | tmp_dunit_control_low );
- }
-
- /* set SDRAM mode SetCommand 0x1418*/
- GT_REG_WRITE(SDRAM_OPERATION, 0x3);
- while (GTREGREAD(SDRAM_OPERATION) != 0) {
- DP(printf("\n*** SDRAM_OPERATION 1418 after D_UNIT_CONTROL_LOW: Module still busy ... please wait... ***\n"));
- }
+ tmp = (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset */
+ if (tmp != 1) { /*clocks are not sync */
+ /* asyncmode */
+ GT_REG_WRITE (D_UNIT_CONTROL_LOW,
+ (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x7F) |
+ 0x18110780 | tmp_dunit_control_low);
+ } else {
+ /* syncmode */
+ GT_REG_WRITE (D_UNIT_CONTROL_LOW,
+ (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x7F) |
+ 0x00110000 | tmp_dunit_control_low);
+ }
+
+ /* set SDRAM mode SetCommand 0x1418 */
+ GT_REG_WRITE (SDRAM_OPERATION, 0x3);
+ while (GTREGREAD (SDRAM_OPERATION) != 0) {
+ DP (printf
+ ("\n*** SDRAM_OPERATION 1418 after D_UNIT_CONTROL_LOW: Module still busy ... please wait... ***\n"));
+ }
/*------------------------------------------------------------------------------ */
@@ -1196,93 +1422,113 @@ setup_sdram(AUX_MEM_DIMM_INFO *info)
tmp = 0x02;
- DP(printf("drb_size (n*64Mbit): %d\n", info->drb_size));
+ DP (printf ("drb_size (n*64Mbit): %d\n", info->drb_size));
switch (info->drb_size) {
- case 1: /* 64 Mbit */
- case 2: /* 128 Mbit */
- DP(printf("RAM-Device_size 64Mbit or 128Mbit)\n"));
+ case 1: /* 64 Mbit */
+ case 2: /* 128 Mbit */
+ DP (printf ("RAM-Device_size 64Mbit or 128Mbit)\n"));
tmp |= (0x00 << 4);
break;
- case 4: /* 256 Mbit */
- case 8: /* 512 Mbit */
- DP(printf("RAM-Device_size 256Mbit or 512Mbit)\n"));
+ case 4: /* 256 Mbit */
+ case 8: /* 512 Mbit */
+ DP (printf ("RAM-Device_size 256Mbit or 512Mbit)\n"));
tmp |= (0x01 << 4);
break;
- case 16: /* 1 Gbit */
- case 32: /* 2 Gbit */
- DP(printf("RAM-Device_size 1Gbit or 2Gbit)\n"));
+ case 16: /* 1 Gbit */
+ case 32: /* 2 Gbit */
+ DP (printf ("RAM-Device_size 1Gbit or 2Gbit)\n"));
tmp |= (0x02 << 4);
break;
default:
- printf("Error in dram size calculation\n");
- DP(printf("Assume: RAM-Device_size 1Gbit or 2Gbit)\n"));
+ printf ("Error in dram size calculation\n");
+ DP (printf ("Assume: RAM-Device_size 1Gbit or 2Gbit)\n"));
tmp |= (0x02 << 4);
return 1;
}
/* SDRAM bank parameters */
/* the param registers for slot 1 (banks 2+3) are offset by 0x8 */
- DP(printf("setting up slot %d config with: %08lx \n", info->slot, tmp));
- GT_REG_WRITE(SDRAM_ADDR_CONTROL, tmp);
+ DP (printf
+ ("setting up slot %d config with: %08lx \n", info->slot, tmp));
+ GT_REG_WRITE (SDRAM_ADDR_CONTROL, tmp);
/* ------------------------------------------------------------------------------ */
- DP(printf("setting up sdram_timing_control_low with: %08x \n", 0x11511220));
- GT_REG_WRITE(SDRAM_TIMING_CONTROL_LOW, 0x11511220);
+ DP (printf
+ ("setting up sdram_timing_control_low with: %08x \n",
+ 0x11511220));
+ GT_REG_WRITE (SDRAM_TIMING_CONTROL_LOW, 0x11511220);
/* ------------------------------------------------------------------------------ */
/* SDRAM configuration */
- tmp = GTREGREAD(SDRAM_CONFIG);
-
- if (info->registeredAddrAndControlInputs || info->registeredDQMBinputs) {
- tmp |= (1 << 17);
- DP(printf("SPD says: registered Addr. and Cont.: %d; registered DQMBinputs: %d\n",info->registeredAddrAndControlInputs, info->registeredDQMBinputs));
+ tmp = GTREGREAD (SDRAM_CONFIG);
+
+ if (info->registeredAddrAndControlInputs
+ || info->registeredDQMBinputs) {
+ tmp |= (1 << 17);
+ DP (printf
+ ("SPD says: registered Addr. and Cont.: %d; registered DQMBinputs: %d\n",
+ info->registeredAddrAndControlInputs,
+ info->registeredDQMBinputs));
}
/* Use buffer 1 to return read data to the CPU
* Page 426 MV64360 */
tmp |= (1 << 26);
- DP(printf("Before Buffer assignment - sdram_conf: %08x\n", GTREGREAD(SDRAM_CONFIG)));
- DP(printf("After Buffer assignment - sdram_conf: %08x\n", GTREGREAD(SDRAM_CONFIG)));
+ DP (printf
+ ("Before Buffer assignment - sdram_conf: %08x\n",
+ GTREGREAD (SDRAM_CONFIG)));
+ DP (printf
+ ("After Buffer assignment - sdram_conf: %08x\n",
+ GTREGREAD (SDRAM_CONFIG)));
- /* SDRAM timing To_do:*/
+ /* SDRAM timing To_do: */
- tmp = GTREGREAD(SDRAM_TIMING_CONTROL_HIGH);
- DP(printf("# sdram_timing_control_high is : %08lx \n", tmp));
+ tmp = GTREGREAD (SDRAM_TIMING_CONTROL_HIGH);
+ DP (printf ("# sdram_timing_control_high is : %08lx \n", tmp));
/* SDRAM address decode register */
/* program this with the default value */
- tmp = GTREGREAD(SDRAM_ADDR_CONTROL);
- DP(printf("SDRAM address control (before: decode): %08x ", GTREGREAD(SDRAM_ADDR_CONTROL)));
- GT_REG_WRITE(SDRAM_ADDR_CONTROL, (tmp | 0x2));
- DP(printf("SDRAM address control (after: decode): %08x\n", GTREGREAD(SDRAM_ADDR_CONTROL)));
+ tmp = GTREGREAD (SDRAM_ADDR_CONTROL);
+ DP (printf
+ ("SDRAM address control (before: decode): %08x ",
+ GTREGREAD (SDRAM_ADDR_CONTROL)));
+ GT_REG_WRITE (SDRAM_ADDR_CONTROL, (tmp | 0x2));
+ DP (printf
+ ("SDRAM address control (after: decode): %08x\n",
+ GTREGREAD (SDRAM_ADDR_CONTROL)));
/* set the SDRAM configuration for each bank */
/* for (i = info->slot * 2; i < ((info->slot * 2) + info->banks); i++) */
{
i = info->slot;
- DP(printf("\n*** Running a MRS cycle for bank %d ***\n", i));
+ DP (printf
+ ("\n*** Running a MRS cycle for bank %d ***\n", i));
/* map the bank */
- memory_map_bank(i, 0, GB/4);
-#if 1 /* test only */
- /* set SDRAM mode */ /* To_do check it*/
- GT_REG_WRITE(SDRAM_OPERATION, 0x3);
- check = GTREGREAD(SDRAM_OPERATION);
- DP(printf("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n", check));
+ memory_map_bank (i, 0, GB / 4);
+#if 1 /* test only */
+ /* set SDRAM mode */ /* To_do check it */
+ GT_REG_WRITE (SDRAM_OPERATION, 0x3);
+ check = GTREGREAD (SDRAM_OPERATION);
+ DP (printf
+ ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
+ check));
/* switch back to normal operation mode */
- GT_REG_WRITE(SDRAM_OPERATION, 0);
- check = GTREGREAD(SDRAM_OPERATION);
- DP(printf("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n", check));
+ GT_REG_WRITE (SDRAM_OPERATION, 0);
+ check = GTREGREAD (SDRAM_OPERATION);
+ DP (printf
+ ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
+ check));
#endif /* test only */
/* unmap the bank */
- memory_map_bank(i, 0, 0);
+ memory_map_bank (i, 0, 0);
}
return 0;
@@ -1324,7 +1570,7 @@ dram_size(long int *base, long int maxsize)
*b=save2;
if (val != cnt) {
- DP(printf("Found %08x at Address %08x (failure)\n", (unsigned int)val, (unsigned int) addr));
+ DP(printf("Found %08x at Address %08x (failure)\n", (unsigned int)val, (unsigned int) addr));
/* fix boundary condition.. STARTVAL means zero */
if(cnt==STARTVAL/sizeof(long)) cnt=0;
return (cnt * sizeof(long));
@@ -1342,7 +1588,7 @@ initdram(int board_type)
{
int s0 = 0, s1 = 0;
int checkbank[4] = { [0 ... 3] = 0 };
- ulong bank_no, realsize, total, check;
+ ulong bank_no, realsize, total, check;
AUX_MEM_DIMM_INFO dimmInfo1;
AUX_MEM_DIMM_INFO dimmInfo2;
int nhr;
@@ -1407,7 +1653,7 @@ initdram(int board_type)
}
/* Setup Ethernet DMA Adress window to DRAM Area */
- return(total);
+ return(total);
}
/* ***************************************************************************************
@@ -1422,18 +1668,16 @@ initdram(int board_type)
! * DFCDL initialize MV643xx Design Considerations *
! * *
! *************************************************************************************** */
-int
-set_dfcdlInit(void)
+int set_dfcdlInit (void)
{
- int i;
- unsigned int dfcdl_word = 0x0000014f;
- for (i=0 ; i < 64; i++)
- {
- GT_REG_WRITE(SRAM_DATA0, dfcdl_word);
- }
- GT_REG_WRITE(DFCDL_CONFIG0, 0x00300000); /* enable dynamic delay line updating */
+ int i;
+ unsigned int dfcdl_word = 0x0000014f;
+
+ for (i = 0; i < 64; i++) {
+ GT_REG_WRITE (SRAM_DATA0, dfcdl_word);
+ }
+ GT_REG_WRITE (DFCDL_CONFIG0, 0x00300000); /* enable dynamic delay line updating */
- return (0);
+ return (0);
}
-
diff --git a/board/esd/cpci750/serial.c b/board/esd/cpci750/serial.c
index 01adb33f9..44de05256 100644
--- a/board/esd/cpci750/serial.c
+++ b/board/esd/cpci750/serial.c
@@ -4,7 +4,7 @@
*
* modified for marvell db64360 eval board by
* Ingo Assmus <ingo.assmus@keymile.com>
- *
+ *
* modified for cpci750 board by
* Reinhard Arlt <reinhard.arlt@esd-electronics.com>
*
diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c
index 27664e1d7..64690ac1b 100644
--- a/board/esd/hh405/hh405.c
+++ b/board/esd/hh405/hh405.c
@@ -278,13 +278,13 @@ int misc_init_r (void)
udelay(1000);
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_TOUCH_RST);
- /*
- * Enable power on PS/2 interface (with reset)
- */
- *fpga_ctrl &= ~(CFG_FPGA_CTRL_PS2_PWR);
- for (i=0;i<500;i++)
- udelay(1000);
- *fpga_ctrl |= (CFG_FPGA_CTRL_PS2_PWR);
+ /*
+ * Enable power on PS/2 interface (with reset)
+ */
+ *fpga_ctrl &= ~(CFG_FPGA_CTRL_PS2_PWR);
+ for (i=0;i<500;i++)
+ udelay(1000);
+ *fpga_ctrl |= (CFG_FPGA_CTRL_PS2_PWR);
/*
* Get contrast value from environment variable
diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c
index d586ff9fb..4bc3246a1 100644
--- a/board/esd/hub405/hub405.c
+++ b/board/esd/hub405/hub405.c
@@ -86,7 +86,7 @@ int misc_init_r (void)
*duart2_mcr = 0x08;
*duart3_mcr = 0x08;
- /*
+ /*
* Set RS232/RS422 control (RS232 = high on GPIO)
*/
val = in32(GPIO0_OR);
diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c
index ae866b0b2..dbc341442 100644
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -293,7 +293,7 @@ int misc_init_r (void)
*/
#define PCI0_BRDGOPT1 0x4a
pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, 0x3f20);
-// pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, 0x3f60);
+/* pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, 0x3f60); */
#define plb0_acr 0x87
/*
@@ -303,10 +303,10 @@ int misc_init_r (void)
#if 0 /* test-only */
printf("CCR0=%08x\n", mfspr(ccr0)); /* test-only */
-// mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00100000);
+/* mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00100000); */
mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00000000);
#endif
-// printf("CCR0=%08x\n", mfspr(ccr0)); /* test-only */
+/* printf("CCR0=%08x\n", mfspr(ccr0)); /* test-only */ */
#endif
free(dst);
diff --git a/board/esd/pci405/writeibm.S b/board/esd/pci405/writeibm.S
index b08c9ac89..9f5c35b58 100644
--- a/board/esd/pci405/writeibm.S
+++ b/board/esd/pci405/writeibm.S
@@ -50,186 +50,174 @@
write_without_sync:
/*
* Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
+ * ptr = 0xc0000000 -> 0x01000000 (PCI)
+ * *ptr = 0x01234567;
*/
- addi r31,0,0
- lis r31,0xc000
+ addi r31,0,0
+ lis r31,0xc000
start1:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
+ lis r0,0x0123
+ ori r0,r0,0x4567
+ stw r0,0(r31)
/*
* Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
+ * ptr = (volatile unsigned long *)addr;
+ * val = *ptr;
*/
- lwz r0,0(r31)
+ lwz r0,0(r31)
/*
* One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
+ * ibmPciConfigWrite(0x2e, 2, 0x1234);
*/
/* subsystem id */
+ li r4,0x002C
+ oris r4,r4,0x8000
+ lis r3,0xEEC0
+ stwbrx r4,0,r3
+ li r5,0x1234
+ ori r3,r3,0x4
+ stwbrx r5,0,r3
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
-
- b start1
+ b start1
blr /* never reached !!!! */
-
-
.globl write_with_sync
write_with_sync:
/*
* Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
+ * ptr = 0xc0000000 -> 0x01000000 (PCI)
+ * *ptr = 0x01234567;
*/
- addi r31,0,0
- lis r31,0xc000
+ addi r31,0,0
+ lis r31,0xc000
start2:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
+ lis r0,0x0123
+ ori r0,r0,0x4567
+ stw r0,0(r31)
/*
* Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
+ * ptr = (volatile unsigned long *)addr;
+ * val = *ptr;
*/
- lwz r0,0(r31)
+ lwz r0,0(r31)
/*
* One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
+ * ibmPciConfigWrite(0x2e, 2, 0x1234);
*/
/* subsystem id */
+ li r4,0x002C
+ oris r4,r4,0x8000
+ lis r3,0xEEC0
+ stwbrx r4,0,r3
+ sync
+ li r5,0x1234
+ ori r3,r3,0x4
+ stwbrx r5,0,r3
+ sync
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
- sync
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
- sync
-
- b start2
+ b start2
blr /* never reached !!!! */
-
.globl write_with_less_sync
write_with_less_sync:
/*
* Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
+ * ptr = 0xc0000000 -> 0x01000000 (PCI)
+ * *ptr = 0x01234567;
*/
- addi r31,0,0
- lis r31,0xc000
+ addi r31,0,0
+ lis r31,0xc000
start2b:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
+ lis r0,0x0123
+ ori r0,r0,0x4567
+ stw r0,0(r31)
/*
* Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
+ * ptr = (volatile unsigned long *)addr;
+ * val = *ptr;
*/
- lwz r0,0(r31)
+ lwz r0,0(r31)
/*
* One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
+ * ibmPciConfigWrite(0x2e, 2, 0x1234);
*/
/* subsystem id */
+ li r4,0x002C
+ oris r4,r4,0x8000
+ lis r3,0xEEC0
+ stwbrx r4,0,r3
+ sync
-
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
- sync
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
+ li r5,0x1234
+ ori r3,r3,0x4
+ stwbrx r5,0,r3
/* sync */
- b start2b
+ b start2b
blr /* never reached !!!! */
-
.globl write_with_more_sync
write_with_more_sync:
/*
* Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
+ * ptr = 0xc0000000 -> 0x01000000 (PCI)
+ * *ptr = 0x01234567;
*/
- addi r31,0,0
- lis r31,0xc000
+ addi r31,0,0
+ lis r31,0xc000
start3:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
- sync
+ lis r0,0x0123
+ ori r0,r0,0x4567
+ stw r0,0(r31)
+ sync
/*
* Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
+ * ptr = (volatile unsigned long *)addr;
+ * val = *ptr;
*/
- lwz r0,0(r31)
- sync
+ lwz r0,0(r31)
+ sync
/*
* One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
+ * ibmPciConfigWrite(0x2e, 2, 0x1234);
*/
/* subsystem id (PCIC0_SBSYSVID)*/
+ li r4,0x002C
+ oris r4,r4,0x8000
+ lis r3,0xEEC0
+ stwbrx r4,0,r3
+ sync
+ li r5,0x1234
+ ori r3,r3,0x4
+ stwbrx r5,0,r3
+ sync
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
- sync
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
- sync
-
- b start3
+ b start3
blr /* never reached !!!! */
diff --git a/board/esd/pmc405/strataflash.c b/board/esd/pmc405/strataflash.c
index 6578ed9d5..ad7a71dc4 100644
--- a/board/esd/pmc405/strataflash.c
+++ b/board/esd/pmc405/strataflash.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <asm/processor.h>
-#undef DEBUG_FLASH
+#undef DEBUG_FLASH
/*
* This file implements a Common Flash Interface (CFI) driver for ppcboot.
* The width of the port and the width of the chips are determined at initialization.
@@ -85,12 +85,8 @@
#define FLASH_OFFSET_USER_PROTECTION 0x85
#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
#define FLASH_MAN_CFI 0x01000000
-
-
-
typedef union {
unsigned char c;
unsigned short w;
@@ -107,13 +103,10 @@ typedef union {
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
/*-----------------------------------------------------------------------
* Functions
*/
-
-
static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
@@ -249,7 +242,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
+
if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
rcode = 1;
} else
@@ -277,7 +270,7 @@ void flash_print_info (flash_info_t *info)
info->size >> 20, info->sector_count);
printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
+
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
#ifdef CFG_FLASH_EMPTY_INFO
@@ -286,28 +279,28 @@ void flash_print_info (flash_info_t *info)
int erased;
volatile unsigned long *flash;
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
+ /*
+ * Check if whole sector is erased
+ */
+ if (i != (info->sector_count-1))
+ size = info->start[i+1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned long *)info->start[i];
+ size = size >> 2; /* divide by 4 for longword access */
+ for (k=0; k<size; k++)
+ {
+ if (*flash++ != 0xffffffff)
+ {
+ erased = 0;
+ break;
+ }
+ }
if ((i % 5) == 0)
printf ("\n ");
- /* print empty and read-only info */
+ /* print empty and read-only info */
printf (" %08lX%s%s",
info->start[i],
erased ? " E" : " ",
@@ -414,7 +407,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
else
flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
+ if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
prot?"protect":"unprotect")) == 0) {
info->protect[sector] = prot;
@@ -464,7 +457,7 @@ static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout
printf("Command Sequence Error.\n");
} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
+ retcode = ERR_NOT_ERASED;
} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
printf("Locking Error\n");
}
@@ -733,7 +726,7 @@ static int find_sector(flash_info_t *info, ulong addr)
{
int sector;
for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
+ if(addr >= info->start[sector])
break;
}
return sector;
@@ -741,7 +734,7 @@ static int find_sector(flash_info_t *info, ulong addr)
static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
{
-
+
int sector;
int cnt;
int retcode;
@@ -789,8 +782,8 @@ static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, in
flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
"buffer write");
- }
+ }
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
return retcode;
-}
+}
#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c
index c918b6a50..16724005b 100644
--- a/board/esd/tasreg/tasreg.c
+++ b/board/esd/tasreg/tasreg.c
@@ -60,7 +60,7 @@ const unsigned char fpgadata[] =
int checkboard (void) {
ulong val;
- uchar val8;
+ uchar val8;
puts ("Board: ");
puts("esd TASREG");
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c
index c0b36762b..5967e90e1 100644
--- a/board/g2000/g2000.c
+++ b/board/g2000/g2000.c
@@ -25,7 +25,6 @@
#include <asm/processor.h>
#include <command.h>
-
#define MEM_MCOPT1_INIT_VAL 0x00800000
#define MEM_RTR_INIT_VAL 0x04070000
#define MEM_PMIT_INIT_VAL 0x07c00000
@@ -34,11 +33,8 @@
#define MEM_SDTR1_INIT_VAL 0x00854005
#define SDRAM0_CFG_ENABLE 0x80000000
-
-
#define CFG_SDRAM_SIZE 0x04000000 /* 64 MB */
-
int board_early_init_f (void)
{
#if 0 /* test-only */
@@ -119,19 +115,19 @@ int checkboard (void)
long int init_sdram_static_settings(void)
{
#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data)
- /* disable memcontroller so updates work */
- mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL );
- mtsdram0( mem_rtr , MEM_RTR_INIT_VAL );
- mtsdram0( mem_pmit , MEM_PMIT_INIT_VAL );
- mtsdram0( mem_mb0cf , MEM_MB0CF_INIT_VAL );
- mtsdram0( mem_mb1cf , MEM_MB1CF_INIT_VAL );
- mtsdram0( mem_sdtr1 , MEM_SDTR1_INIT_VAL );
-
- /* SDRAM have a power on delay, 500 micro should do */
- udelay(500);
- mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE );
-
- return (CFG_SDRAM_SIZE); /* CFG_SDRAM_SIZE is in G2000.h */
+ /* disable memcontroller so updates work */
+ mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL );
+ mtsdram0( mem_rtr , MEM_RTR_INIT_VAL );
+ mtsdram0( mem_pmit , MEM_PMIT_INIT_VAL );
+ mtsdram0( mem_mb0cf , MEM_MB0CF_INIT_VAL );
+ mtsdram0( mem_mb1cf , MEM_MB1CF_INIT_VAL );
+ mtsdram0( mem_sdtr1 , MEM_SDTR1_INIT_VAL );
+
+ /* SDRAM have a power on delay, 500 micro should do */
+ udelay(500);
+ mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE );
+
+ return (CFG_SDRAM_SIZE); /* CFG_SDRAM_SIZE is in G2000.h */
}
@@ -141,9 +137,9 @@ long int initdram (int board_type)
/* flzt, we can still turn this on in the future */
/* #ifdef CONFIG_SPD_EEPROM
- ret = spd_sdram ();
+ ret = spd_sdram ();
#else
- ret = init_sdram_static_settings();
+ ret = init_sdram_static_settings();
#endif
*/
diff --git a/board/g2000/strataflash.c b/board/g2000/strataflash.c
index 06fedeccd..8446e0210 100644
--- a/board/g2000/strataflash.c
+++ b/board/g2000/strataflash.c
@@ -85,12 +85,8 @@
#define FLASH_OFFSET_USER_PROTECTION 0x85
#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
#define FLASH_MAN_CFI 0x01000000
-
-
-
typedef union {
unsigned char c;
unsigned short w;
@@ -107,13 +103,10 @@ typedef union {
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
/*-----------------------------------------------------------------------
* Functions
*/
-
-
static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
@@ -286,28 +279,28 @@ void flash_print_info (flash_info_t *info)
int erased;
volatile unsigned long *flash;
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
+ /*
+ * Check if whole sector is erased
+ */
+ if (i != (info->sector_count-1))
+ size = info->start[i+1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned long *)info->start[i];
+ size = size >> 2; /* divide by 4 for longword access */
+ for (k=0; k<size; k++)
+ {
+ if (*flash++ != 0xffffffff)
+ {
+ erased = 0;
+ break;
+ }
+ }
if ((i % 5) == 0)
printf ("\n ");
- /* print empty and read-only info */
+ /* print empty and read-only info */
printf (" %08lX%s%s",
info->start[i],
erased ? " E" : " ",
@@ -464,7 +457,7 @@ static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout
printf("Command Sequence Error.\n");
} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
+ retcode = ERR_NOT_ERASED;
} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
printf("Locking Error\n");
}
diff --git a/board/inka4x0/flash.c b/board/inka4x0/flash.c
index a60f4f129..b13865530 100644
--- a/board/inka4x0/flash.c
+++ b/board/inka4x0/flash.c
@@ -142,9 +142,9 @@ void flash_print_info (flash_info_t *info)
}
switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM116DB:
- printf ("AM29LV116DB (16Mbit, bottom boot sect)\n");
- break;
+ case FLASH_AM116DB:
+ printf ("AM29LV116DB (16Mbit, bottom boot sect)\n");
+ break;
case FLASH_AMLV128U:
printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
break;
@@ -220,21 +220,21 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
case (uchar)AMD_ID_LV116DB:
debug ("Chip: AM29LV116DB\n");
- info->flash_id += FLASH_AM116DB;
- info->sector_count = 35;
- info->size = 0x00200000;
- /*
- * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
- * the other ones are 64 kB
- */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for( i = 4; i < info->sector_count; i++ )
- info->start[i] =
- base + (i * (64 << 10)) - 0x00030000;
- break; /* => 2 MB */
+ info->flash_id += FLASH_AM116DB;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ /*
+ * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
+ * the other ones are 64 kB
+ */
+ info->start[0] = base + 0x00000000;
+ info->start[1] = base + 0x00004000;
+ info->start[2] = base + 0x00006000;
+ info->start[3] = base + 0x00008000;
+ for( i = 4; i < info->sector_count; i++ )
+ info->start[i] =
+ base + (i * (64 << 10)) - 0x00030000;
+ break; /* => 2 MB */
case (FPW)AMD_ID_LV160B:
debug ("Chip: AM29LV160MB\n");
@@ -377,8 +377,8 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
for (i = 0; i < cnt; i++)
if ((rc = write_word_amd(info, (FPW *)(addr+i), src[i])) != 0) {
- return (rc);
- }
+ return (rc);
+ }
return rc;
}
diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
index 3dec6849b..1d7707ab4 100644
--- a/board/inka4x0/inka4x0.c
+++ b/board/inka4x0/inka4x0.c
@@ -176,4 +176,3 @@ void flash_preinit(void)
*/
*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
}
-
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index 40f5a7d1d..5ac6cb5ce 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -419,7 +419,7 @@ int last_stage_init (void)
/* save origianl SRAM content */
save = *(volatile u16 *)CFG_CS2_START;
restore = 1;
-
+
/* write test pattern to SRAM */
*(volatile u16 *)CFG_CS2_START = 0xA5A5;
__asm__ volatile ("sync");
@@ -430,7 +430,7 @@ int last_stage_init (void)
tmp = *(volatile u16 *)CFG_FLASH_BASE;
if (tmp == 0xA5A5)
puts ("!! possible error in SRAM detection\n");
-
+
if (*(volatile u16 *)CFG_CS2_START != 0xA5A5) {
/* no SRAM at all, disable cs */
*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 18);
@@ -445,31 +445,31 @@ int last_stage_init (void)
__asm__ volatile ("sync");
if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0x1111) {
/* SRAM size = 512 kByte */
- *(vu_long *)MPC5XXX_CS2_STOP = STOP_REG(CFG_CS2_START,
+ *(vu_long *)MPC5XXX_CS2_STOP = STOP_REG(CFG_CS2_START,
0x80000);
__asm__ volatile ("sync");
puts ("SRAM: 512 kB\n");
}
else
- puts ("!! possible error in SRAM detection\n");
+ puts ("!! possible error in SRAM detection\n");
}
else {
- puts ("SRAM: 1 MB\n");
+ puts ("SRAM: 1 MB\n");
}
/* restore origianl SRAM content */
if (restore) {
*(volatile u16 *)CFG_CS2_START = save;
__asm__ volatile ("sync");
}
-
- /*
+
+ /*
* Check for Grafic Controller
*/
/* save origianl FB content */
save = *(volatile u16 *)CFG_CS1_START;
restore = 1;
-
+
/* write test pattern to FB memory */
*(volatile u16 *)CFG_CS1_START = 0xA5A5;
__asm__ volatile ("sync");
@@ -480,7 +480,7 @@ int last_stage_init (void)
tmp = *(volatile u16 *)CFG_FLASH_BASE;
if (tmp == 0xA5A5)
puts ("!! possible error in grafic controller detection\n");
-
+
if (*(volatile u16 *)CFG_CS1_START != 0xA5A5) {
/* no grafic controller at all, disable cs */
*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 17);
@@ -490,14 +490,14 @@ int last_stage_init (void)
__asm__ volatile ("sync");
}
else {
- puts ("VGA: SMI501 (Voyager) with 8 MB\n");
+ puts ("VGA: SMI501 (Voyager) with 8 MB\n");
}
/* restore origianl FB content */
if (restore) {
*(volatile u16 *)CFG_CS1_START = save;
__asm__ volatile ("sync");
}
-
+
return 0;
}
#endif /* CONFIG_CS_AUTOCONF */
diff --git a/cpu/at91rm9200/cpu.c b/cpu/at91rm9200/cpu.c
index 71463c957..90a4f9cd0 100644
--- a/cpu/at91rm9200/cpu.c
+++ b/cpu/at91rm9200/cpu.c
@@ -134,7 +134,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/*shutdown the console to avoid strange chars during reset */
us->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX);
-#ifdef CONFIG_AT91RM9200DK
+#ifdef CONFIG_AT91RM9200DK
/* Clear PA19 to trigger the hard reset */
pio->PIO_CODR = 0x00080000;
pio->PIO_OER = 0x00080000;
diff --git a/drivers/ps2ser.c b/drivers/ps2ser.c
index 56925a8e0..e2a38dc3d 100644
--- a/drivers/ps2ser.c
+++ b/drivers/ps2ser.c
@@ -163,7 +163,7 @@ void ps2ser_putc(int chr)
#ifdef CONFIG_MPC5xxx
while (!(psc->psc_status & PSC_SR_TXRDY));
-
+
psc->psc_buffer_8 = chr;
#else
while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE));
@@ -259,7 +259,7 @@ static void ps2ser_interrupt(void *dev_id)
printf ("ps2ser.c: buffer overflow\n");
}
#ifdef CONFIG_MPC5xxx
- } while (status & PSC_SR_RXRDY);
+ } while (status & PSC_SR_RXRDY);
#else
} while (status & UART_IIR_RDI);
#endif
diff --git a/fs/ext2/dev.c b/fs/ext2/dev.c
index 117a44984..35a576daa 100644
--- a/fs/ext2/dev.c
+++ b/fs/ext2/dev.c
@@ -34,109 +34,96 @@ static block_dev_desc_t *ext2fs_block_dev_desc;
static disk_partition_t part_info;
#undef DEBUG
-int ext2fs_set_blk_dev
- (
- block_dev_desc_t *rbdd,
- int part
- )
- {
- ext2fs_block_dev_desc = rbdd;
+int ext2fs_set_blk_dev (block_dev_desc_t * rbdd, int part)
+{
+ ext2fs_block_dev_desc = rbdd;
- if (part == 0)
- {
- /* disk doesn't use partition table */
- part_info.start = 0;
- part_info.size = rbdd->lba;
- part_info.blksz = rbdd->blksz;
- }
- else
- {
- if (get_partition_info (ext2fs_block_dev_desc, part, &part_info))
- {
- return 0;
- }
+ if (part == 0) {
+ /* disk doesn't use partition table */
+ part_info.start = 0;
+ part_info.size = rbdd->lba;
+ part_info.blksz = rbdd->blksz;
+ } else {
+ if (get_partition_info
+ (ext2fs_block_dev_desc, part, &part_info)) {
+ return 0;
+ }
}
- return (part_info.size);
- }
+ return (part_info.size);
+}
-int ext2fs_devread
- (
- int sector,
- int byte_offset,
- int byte_len,
- char *buf
- )
- {
- char sec_buf[SECTOR_SIZE];
- unsigned block_len;
+int ext2fs_devread (int sector, int byte_offset, int byte_len, char *buf) {
+ char sec_buf[SECTOR_SIZE];
+ unsigned block_len;
+
/*
* Check partition boundaries
*/
- if ((sector < 0) || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) >= part_info.size))
- {
-/* errnum = ERR_OUTSIDE_PART; */
- printf (" ** ext2fs_devread() read outside partition sector %d\n", sector);
- return(0);
+ if ((sector < 0)
+ || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) >=
+ part_info.size)) {
+ /* errnum = ERR_OUTSIDE_PART; */
+ printf (" ** ext2fs_devread() read outside partition sector %d\n", sector);
+ return (0);
}
/*
* Get the read to the beginning of a partition.
*/
- sector += byte_offset >> SECTOR_BITS;
- byte_offset &= SECTOR_SIZE - 1;
+ sector += byte_offset >> SECTOR_BITS;
+ byte_offset &= SECTOR_SIZE - 1;
#if defined(DEBUG)
- printf (" <%d, %d, %d>\n", sector, byte_offset, byte_len);
+ printf (" <%d, %d, %d>\n", sector, byte_offset, byte_len);
#endif
- if (ext2fs_block_dev_desc == NULL)
- {
- printf("** Invalid Block Device Descriptor (NULL)\n");
- return(0);
+ if (ext2fs_block_dev_desc == NULL) {
+ printf ("** Invalid Block Device Descriptor (NULL)\n");
+ return (0);
}
- if (byte_offset != 0)
- {
-/* read first part which isn't aligned with start of sector */
- if (ext2fs_block_dev_desc->block_read(ext2fs_block_dev_desc->dev, part_info.start+sector, 1, (unsigned long *)sec_buf) != 1)
- {
- printf (" ** ext2fs_devread() read error **\n");
- return(0);
- }
- memcpy(buf, sec_buf+byte_offset, min(SECTOR_SIZE-byte_offset, byte_len));
- buf+=min(SECTOR_SIZE-byte_offset, byte_len);
- byte_len-=min(SECTOR_SIZE-byte_offset, byte_len);
- sector++;
+ if (byte_offset != 0) {
+ /* read first part which isn't aligned with start of sector */
+ if (ext2fs_block_dev_desc->
+ block_read (ext2fs_block_dev_desc->dev,
+ part_info.start + sector, 1,
+ (unsigned long *) sec_buf) != 1) {
+ printf (" ** ext2fs_devread() read error **\n");
+ return (0);
+ }
+ memcpy (buf, sec_buf + byte_offset,
+ min (SECTOR_SIZE - byte_offset, byte_len));
+ buf += min (SECTOR_SIZE - byte_offset, byte_len);
+ byte_len -= min (SECTOR_SIZE - byte_offset, byte_len);
+ sector++;
}
-/* read sector aligned part */
- block_len = byte_len & ~(SECTOR_SIZE-1);
- if (ext2fs_block_dev_desc->block_read(ext2fs_block_dev_desc->dev,
- part_info.start+sector,
- block_len/SECTOR_SIZE,
- (unsigned long *)buf) != block_len/SECTOR_SIZE)
- {
- printf (" ** ext2fs_devread() read error - block\n");
- return(0);
+ /* read sector aligned part */
+ block_len = byte_len & ~(SECTOR_SIZE - 1);
+ if (ext2fs_block_dev_desc->block_read (ext2fs_block_dev_desc->dev,
+ part_info.start + sector,
+ block_len / SECTOR_SIZE,
+ (unsigned long *) buf) !=
+ block_len / SECTOR_SIZE) {
+ printf (" ** ext2fs_devread() read error - block\n");
+ return (0);
}
- buf+=block_len;
- byte_len-=block_len;
- sector+= block_len/SECTOR_SIZE;
+ buf += block_len;
+ byte_len -= block_len;
+ sector += block_len / SECTOR_SIZE;
- if (byte_len != 0)
- {
-/* read rest of data which are not in whole sector */
- if (ext2fs_block_dev_desc->block_read(ext2fs_block_dev_desc->dev,
- part_info.start+sector,
- 1,
- (unsigned long *)sec_buf) != 1)
- {
- printf (" ** ext2fs_devread() read error - last part\n");
- return(0);
- }
- memcpy(buf, sec_buf, byte_len);
+ if (byte_len != 0) {
+ /* read rest of data which are not in whole sector */
+ if (ext2fs_block_dev_desc->
+ block_read (ext2fs_block_dev_desc->dev,
+ part_info.start + sector, 1,
+ (unsigned long *) sec_buf) != 1) {
+ printf (" ** ext2fs_devread() read error - last part\n");
+ return (0);
+ }
+ memcpy (buf, sec_buf, byte_len);
}
- return(1);
- }
+ return (1);
+}
#endif /* CFG_CMD_EXT2FS */
diff --git a/fs/ext2/ext2fs.c b/fs/ext2/ext2fs.c
index bae72a35a..a2d698abc 100644
--- a/fs/ext2/ext2fs.c
+++ b/fs/ext2/ext2fs.c
@@ -30,7 +30,8 @@
#include <malloc.h>
#include <asm/byteorder.h>
-extern int ext2fs_devread (int sector, int byte_offset, int byte_len, char *buf);
+extern int ext2fs_devread (int sector, int byte_offset, int byte_len,
+ char *buf);
/* Magic value used to identify an ext2 filesystem. */
#define EXT2_MAGIC 0xEF53
@@ -66,8 +67,7 @@ extern int ext2fs_devread (int sector, int byte_offset, int byte_len, char *buf)
#define EXT2_BLOCK_SIZE(data) (1 << LOG2_BLOCK_SIZE(data))
/* The ext2 superblock. */
-struct ext2_sblock
-{
+struct ext2_sblock {
uint32_t total_inodes;
uint32_t total_blocks;
uint32_t reserved_blocks;
@@ -106,8 +106,7 @@ struct ext2_sblock
};
/* The ext2 blockgroup. */
-struct ext2_block_group
-{
+struct ext2_block_group {
uint32_t block_id;
uint32_t inode_id;
uint32_t inode_table_id;
@@ -118,8 +117,7 @@ struct ext2_block_group
};
/* The ext2 inode. */
-struct ext2_inode
-{
+struct ext2_inode {
uint16_t mode;
uint16_t uid;
uint32_t size;
@@ -129,20 +127,18 @@ struct ext2_inode
uint32_t dtime;
uint16_t gid;
uint16_t nlinks;
- uint32_t blockcnt; /* Blocks of 512 bytes!! */
+ uint32_t blockcnt; /* Blocks of 512 bytes!! */
uint32_t flags;
uint32_t osd1;
- union
- {
- struct datablocks
- {
+ union {
+ struct datablocks {
uint32_t dir_blocks[INDIRECT_BLOCKS];
uint32_t indir_block;
uint32_t double_indir_block;
uint32_t tripple_indir_block;
} blocks;
char symlink[60];
- } b;
+ } b;
uint32_t version;
uint32_t acl;
uint32_t dir_acl;
@@ -151,25 +147,22 @@ struct ext2_inode
};
/* The header of an ext2 directory entry. */
-struct ext2_dirent
-{
+struct ext2_dirent {
uint32_t inode;
uint16_t direntlen;
- uint8_t namelen;
- uint8_t filetype;
+ uint8_t namelen;
+ uint8_t filetype;
};
-struct ext2fs_node
-{
+struct ext2fs_node {
struct ext2_data *data;
struct ext2_inode inode;
- int ino;
- int inode_read;
+ int ino;
+ int inode_read;
};
/* Information about a "mounted" ext2 filesystem. */
-struct ext2_data
-{
+struct ext2_data {
struct ext2_sblock sblock;
struct ext2_inode *inode;
struct ext2fs_node diropen;
@@ -178,827 +171,708 @@ struct ext2_data
typedef struct ext2fs_node *ext2fs_node_t;
-struct ext2_data *ext2fs_root = NULL;
-ext2fs_node_t ext2fs_file = NULL;
-int symlinknest = 0;
-uint32_t *indir1_block = NULL;
-int indir1_size = 0;
-int indir1_blkno = -1;
-uint32_t *indir2_block = NULL;
-int indir2_size = 0;
-int indir2_blkno = -1;
+struct ext2_data *ext2fs_root = NULL;
+ext2fs_node_t ext2fs_file = NULL;
+int symlinknest = 0;
+uint32_t *indir1_block = NULL;
+int indir1_size = 0;
+int indir1_blkno = -1;
+uint32_t *indir2_block = NULL;
+int indir2_size = 0;
+int indir2_blkno = -1;
static int ext2fs_blockgroup
-(
- struct ext2_data *data,
- int group,
- struct ext2_block_group *blkgrp
- )
-{
+ (struct ext2_data *data, int group, struct ext2_block_group *blkgrp) {
#ifdef DEBUG
- printf("ext2fs read blockgroup\n");
+ printf ("ext2fs read blockgroup\n");
#endif
- return(ext2fs_devread (((__le32_to_cpu (data->sblock.first_data_block) + 1) << LOG2_EXT2_BLOCK_SIZE (data)),
- group * sizeof (struct ext2_block_group),
- sizeof (struct ext2_block_group),
- (char *) blkgrp));
+ return (ext2fs_devread
+ (((__le32_to_cpu (data->sblock.first_data_block) +
+ 1) << LOG2_EXT2_BLOCK_SIZE (data)),
+ group * sizeof (struct ext2_block_group),
+ sizeof (struct ext2_block_group), (char *) blkgrp));
}
static int ext2fs_read_inode
-(
- struct ext2_data *data,
- int ino,
- struct ext2_inode *inode
- )
-{
- struct ext2_block_group blkgrp;
- struct ext2_sblock *sblock = &data->sblock;
- int inodes_per_block;
- int status;
+ (struct ext2_data *data, int ino, struct ext2_inode *inode) {
+ struct ext2_block_group blkgrp;
+ struct ext2_sblock *sblock = &data->sblock;
+ int inodes_per_block;
+ int status;
- unsigned int blkno;
- unsigned int blkoff;
+ unsigned int blkno;
+ unsigned int blkoff;
/* It is easier to calculate if the first inode is 0. */
ino--;
#ifdef DEBUG
- printf("ext2fs read inode %d\n", ino);
+ printf ("ext2fs read inode %d\n", ino);
#endif
- status = ext2fs_blockgroup (data, ino / __le32_to_cpu(sblock->inodes_per_group), &blkgrp);
- if (status == 0)
- {
- return(0);
+ status = ext2fs_blockgroup (data,
+ ino /
+ __le32_to_cpu (sblock->inodes_per_group),
+ &blkgrp);
+ if (status == 0) {
+ return (0);
}
inodes_per_block = EXT2_BLOCK_SIZE (data) / 128;
- blkno = (ino % __le32_to_cpu (sblock->inodes_per_group)) / inodes_per_block;
- blkoff = (ino % __le32_to_cpu (sblock->inodes_per_group)) % inodes_per_block;
+ blkno = (ino % __le32_to_cpu (sblock->inodes_per_group)) /
+ inodes_per_block;
+ blkoff = (ino % __le32_to_cpu (sblock->inodes_per_group)) %
+ inodes_per_block;
#ifdef DEBUG
- printf("ext2fs read inode blkno %d blkoff %d\n", blkno, blkoff);
+ printf ("ext2fs read inode blkno %d blkoff %d\n", blkno, blkoff);
#endif
/* Read the inode. */
- status = ext2fs_devread(((__le32_to_cpu (blkgrp.inode_table_id) + blkno) << LOG2_EXT2_BLOCK_SIZE (data)),
- sizeof (struct ext2_inode) * blkoff,
- sizeof (struct ext2_inode),
- (char *) inode);
- if (status == 0)
- {
- return(0);
- }
- return(1);
+ status = ext2fs_devread (((__le32_to_cpu (blkgrp.inode_table_id) +
+ blkno) << LOG2_EXT2_BLOCK_SIZE (data)),
+ sizeof (struct ext2_inode) * blkoff,
+ sizeof (struct ext2_inode), (char *) inode);
+ if (status == 0) {
+ return (0);
+ }
+ return (1);
}
-void ext2fs_free_node
-(
- ext2fs_node_t node,
- ext2fs_node_t currroot
- )
-{
- if ((node != &ext2fs_root->diropen) && (node != currroot))
- {
+void ext2fs_free_node (ext2fs_node_t node, ext2fs_node_t currroot) {
+ if ((node != &ext2fs_root->diropen) && (node != currroot)) {
free (node);
}
}
-static int ext2fs_read_block
-(
- ext2fs_node_t node,
- int fileblock
- )
-{
- struct ext2_data *data = node->data;
- struct ext2_inode *inode = &node->inode;
- int blknr;
- int blksz = EXT2_BLOCK_SIZE (data);
- int log2_blksz = LOG2_EXT2_BLOCK_SIZE (data);
- int status;
+static int ext2fs_read_block (ext2fs_node_t node, int fileblock) {
+ struct ext2_data *data = node->data;
+ struct ext2_inode *inode = &node->inode;
+ int blknr;
+ int blksz = EXT2_BLOCK_SIZE (data);
+ int log2_blksz = LOG2_EXT2_BLOCK_SIZE (data);
+ int status;
/* Direct blocks. */
- if (fileblock < INDIRECT_BLOCKS)
- {
+ if (fileblock < INDIRECT_BLOCKS) {
blknr = __le32_to_cpu (inode->b.blocks.dir_blocks[fileblock]);
- }
+ }
/* Indirect. */
- else if (fileblock < (INDIRECT_BLOCKS + (blksz/4)))
- {
- if (indir1_block == NULL)
- {
- indir1_block = (uint32_t *) malloc(blksz);
- if (indir1_block == NULL)
- {
- printf("** ext2fs read block (indir 1) malloc failed. **\n");
- return(-1);
+ else if (fileblock < (INDIRECT_BLOCKS + (blksz / 4))) {
+ if (indir1_block == NULL) {
+ indir1_block = (uint32_t *) malloc (blksz);
+ if (indir1_block == NULL) {
+ printf ("** ext2fs read block (indir 1) malloc failed. **\n");
+ return (-1);
}
- indir1_size = blksz;
+ indir1_size = blksz;
indir1_blkno = -1;
}
- if (blksz != indir1_size)
- {
- free(indir1_block);
+ if (blksz != indir1_size) {
+ free (indir1_block);
indir1_block = NULL;
- indir1_size = 0;
+ indir1_size = 0;
indir1_blkno = -1;
- indir1_block = (uint32_t *) malloc(blksz);
- if (indir1_block == NULL)
- {
- printf("** ext2fs read block (indir 1) malloc failed. **\n");
- return(-1);
+ indir1_block = (uint32_t *) malloc (blksz);
+ if (indir1_block == NULL) {
+ printf ("** ext2fs read block (indir 1) malloc failed. **\n");
+ return (-1);
}
- indir1_size = blksz;
+ indir1_size = blksz;
}
- if ((__le32_to_cpu(inode->b.blocks.indir_block) << log2_blksz) != indir1_blkno)
- {
- status = ext2fs_devread (__le32_to_cpu(inode->b.blocks.indir_block) << log2_blksz, 0, blksz, (char *) indir1_block);
- if (status == 0)
- {
- printf("** ext2fs read block (indir 1) failed. **\n");
- return(0);
+ if ((__le32_to_cpu (inode->b.blocks.indir_block) <<
+ log2_blksz) != indir1_blkno) {
+ status = ext2fs_devread (__le32_to_cpu(inode->b.blocks.indir_block) << log2_blksz,
+ 0, blksz,
+ (char *) indir1_block);
+ if (status == 0) {
+ printf ("** ext2fs read block (indir 1) failed. **\n");
+ return (0);
}
- indir1_blkno = __le32_to_cpu(inode->b.blocks.indir_block) << log2_blksz;
+ indir1_blkno =
+ __le32_to_cpu (inode->b.blocks.
+ indir_block) << log2_blksz;
}
- blknr = __le32_to_cpu(indir1_block[fileblock - INDIRECT_BLOCKS]);
+ blknr = __le32_to_cpu (indir1_block
+ [fileblock - INDIRECT_BLOCKS]);
}
/* Double indirect. */
- else if (fileblock < (INDIRECT_BLOCKS + (blksz / 4 * (blksz / 4 + 1))))
- {
+ else if (fileblock <
+ (INDIRECT_BLOCKS + (blksz / 4 * (blksz / 4 + 1)))) {
unsigned int perblock = blksz / 4;
unsigned int rblock = fileblock - (INDIRECT_BLOCKS
+ blksz / 4);
- if (indir1_block == NULL)
- {
- indir1_block = (uint32_t *) malloc(blksz);
- if (indir1_block == NULL)
- {
- printf("** ext2fs read block (indir 2 1) malloc failed. **\n");
- return(-1);
+ if (indir1_block == NULL) {
+ indir1_block = (uint32_t *) malloc (blksz);
+ if (indir1_block == NULL) {
+ printf ("** ext2fs read block (indir 2 1) malloc failed. **\n");
+ return (-1);
}
- indir1_size = blksz;
+ indir1_size = blksz;
indir1_blkno = -1;
}
- if (blksz != indir1_size)
- {
- free(indir1_block);
+ if (blksz != indir1_size) {
+ free (indir1_block);
indir1_block = NULL;
- indir1_size = 0;
+ indir1_size = 0;
indir1_blkno = -1;
- indir1_block = (uint32_t *) malloc(blksz);
- if (indir1_block == NULL)
- {
- printf("** ext2fs read block (indir 2 1) malloc failed. **\n");
- return(-1);
+ indir1_block = (uint32_t *) malloc (blksz);
+ if (indir1_block == NULL) {
+ printf ("** ext2fs read block (indir 2 1) malloc failed. **\n");
+ return (-1);
}
- indir1_size = blksz;
+ indir1_size = blksz;
}
- if ((__le32_to_cpu(inode->b.blocks.double_indir_block) << log2_blksz) != indir1_blkno)
- {
- status = ext2fs_devread (__le32_to_cpu(inode->b.blocks.double_indir_block) << log2_blksz, 0, blksz, (char *) indir1_block);
- if (status == 0)
- {
- printf("** ext2fs read block (indir 2 1) failed. **\n");
- return(-1);
+ if ((__le32_to_cpu (inode->b.blocks.double_indir_block) <<
+ log2_blksz) != indir1_blkno) {
+ status = ext2fs_devread (__le32_to_cpu(inode->b.blocks.double_indir_block) << log2_blksz,
+ 0, blksz,
+ (char *) indir1_block);
+ if (status == 0) {
+ printf ("** ext2fs read block (indir 2 1) failed. **\n");
+ return (-1);
}
- indir1_blkno = __le32_to_cpu(inode->b.blocks.double_indir_block) << log2_blksz;
+ indir1_blkno =
+ __le32_to_cpu (inode->b.blocks.double_indir_block) << log2_blksz;
}
- if (indir2_block == NULL)
- {
- indir2_block = (uint32_t *) malloc(blksz);
- if (indir2_block == NULL)
- {
- printf("** ext2fs read block (indir 2 2) malloc failed. **\n");
- return(-1);
+ if (indir2_block == NULL) {
+ indir2_block = (uint32_t *) malloc (blksz);
+ if (indir2_block == NULL) {
+ printf ("** ext2fs read block (indir 2 2) malloc failed. **\n");
+ return (-1);
}
- indir2_size = blksz;
+ indir2_size = blksz;
indir2_blkno = -1;
}
- if (blksz != indir2_size)
- {
- free(indir2_block);
+ if (blksz != indir2_size) {
+ free (indir2_block);
indir2_block = NULL;
- indir2_size = 0;
+ indir2_size = 0;
indir2_blkno = -1;
- indir2_block = (uint32_t *) malloc(blksz);
- if (indir2_block == NULL)
- {
- printf("** ext2fs read block (indir 2 2) malloc failed. **\n");
- return(-1);
+ indir2_block = (uint32_t *) malloc (blksz);
+ if (indir2_block == NULL) {
+ printf ("** ext2fs read block (indir 2 2) malloc failed. **\n");
+ return (-1);
}
- indir2_size = blksz;
+ indir2_size = blksz;
}
- if ((__le32_to_cpu(indir1_block[rblock / perblock]) << log2_blksz) != indir1_blkno)
- {
- status = ext2fs_devread(__le32_to_cpu(indir1_block[rblock / perblock]) << log2_blksz, 0, blksz, (char *) indir2_block);
- if (status == 0)
- {
- printf("** ext2fs read block (indir 2 2) failed. **\n");
- return(-1);
+ if ((__le32_to_cpu (indir1_block[rblock / perblock]) <<
+ log2_blksz) != indir1_blkno) {
+ status = ext2fs_devread (__le32_to_cpu(indir1_block[rblock / perblock]) << log2_blksz,
+ 0, blksz,
+ (char *) indir2_block);
+ if (status == 0) {
+ printf ("** ext2fs read block (indir 2 2) failed. **\n");
+ return (-1);
}
- indir2_blkno = __le32_to_cpu(indir1_block[rblock / perblock]) << log2_blksz;
+ indir2_blkno =
+ __le32_to_cpu (indir1_block[rblock / perblock]) << log2_blksz;
}
- blknr = __le32_to_cpu(indir2_block[rblock % perblock]);
+ blknr = __le32_to_cpu (indir2_block[rblock % perblock]);
}
/* Tripple indirect. */
- else
- {
- printf("** ext2fs doesn't support tripple indirect blocks. **\n");
- return(-1);
- }
+ else {
+ printf ("** ext2fs doesn't support tripple indirect blocks. **\n");
+ return (-1);
+ }
#ifdef DEBUG
- printf("ext2fs_read_block %08x\n", blknr);
+ printf ("ext2fs_read_block %08x\n", blknr);
#endif
- return(blknr);
+ return (blknr);
}
int ext2fs_read_file
-(
- ext2fs_node_t node,
- int pos,
- unsigned int len,
- char *buf
- )
-{
- int i;
- int blockcnt;
- int log2blocksize = LOG2_EXT2_BLOCK_SIZE (node->data);
- int blocksize = 1 << (log2blocksize + DISK_SECTOR_BITS);
- unsigned int filesize = node->inode.size;
+ (ext2fs_node_t node, int pos, unsigned int len, char *buf) {
+ int i;
+ int blockcnt;
+ int log2blocksize = LOG2_EXT2_BLOCK_SIZE (node->data);
+ int blocksize = 1 << (log2blocksize + DISK_SECTOR_BITS);
+ unsigned int filesize = node->inode.size;
/* Adjust len so it we can't read past the end of the file. */
- if (len > filesize)
- {
+ if (len > filesize) {
len = filesize;
}
- blockcnt = ((len + pos) + blocksize - 1) / blocksize;
+ blockcnt = ((len + pos) + blocksize - 1) / blocksize;
- for (i = pos / blocksize; i < blockcnt; i++)
- {
+ for (i = pos / blocksize; i < blockcnt; i++) {
int blknr;
int blockoff = pos % blocksize;
int blockend = blocksize;
int skipfirst = 0;
- blknr = ext2fs_read_block(node, i);
- if (blknr < 0)
- {
- return(-1);
+ blknr = ext2fs_read_block (node, i);
+ if (blknr < 0) {
+ return (-1);
}
blknr = blknr << log2blocksize;
/* Last block. */
- if (i == blockcnt - 1)
- {
+ if (i == blockcnt - 1) {
blockend = (len + pos) % blocksize;
/* The last portion is exactly blocksize. */
- if (!blockend)
- {
+ if (!blockend) {
blockend = blocksize;
}
}
/* First block. */
- if (i == pos / blocksize)
- {
+ if (i == pos / blocksize) {
skipfirst = blockoff;
blockend -= skipfirst;
}
/* If the block number is 0 this block is not stored on disk but
is zero filled instead. */
- if (blknr)
- {
+ if (blknr) {
int status;
status = ext2fs_devread (blknr, skipfirst, blockend, buf);
- if (status == 0)
- {
- return(-1);
+ if (status == 0) {
+ return (-1);
}
- }
- else
- {
+ } else {
memset (buf, blocksize - skipfirst, 0);
}
buf += blocksize - skipfirst;
- }
- return(len);
+ }
+ return (len);
}
-static int ext2fs_iterate_dir
-(
- ext2fs_node_t dir,
- char *name,
- ext2fs_node_t *fnode,
- int *ftype
- )
+static int ext2fs_iterate_dir (ext2fs_node_t dir, char *name, ext2fs_node_t * fnode, int *ftype)
{
unsigned int fpos = 0;
- int status;
+ int status;
struct ext2fs_node *diro = (struct ext2fs_node *) dir;
+
#ifdef DEBUG
- if (name != NULL) printf("Iterate dir %s\n", name);
+ if (name != NULL)
+ printf ("Iterate dir %s\n", name);
#endif /* of DEBUG */
- if (!diro->inode_read)
- {
- status = ext2fs_read_inode (diro->data, diro->ino, &diro->inode);
- if (status == 0)
- {
- return(0);
+ if (!diro->inode_read) {
+ status = ext2fs_read_inode (diro->data, diro->ino,
+ &diro->inode);
+ if (status == 0) {
+ return (0);
}
}
/* Search the file. */
- while (fpos < __le32_to_cpu (diro->inode.size))
- {
+ while (fpos < __le32_to_cpu (diro->inode.size)) {
struct ext2_dirent dirent;
- status = ext2fs_read_file (diro, fpos, sizeof (struct ext2_dirent), (char *) &dirent);
- if (status < 1)
- {
- return(0);
+ status = ext2fs_read_file (diro, fpos,
+ sizeof (struct ext2_dirent),
+ (char *) &dirent);
+ if (status < 1) {
+ return (0);
}
- if (dirent.namelen != 0)
- {
- char filename[dirent.namelen + 1];
- ext2fs_node_t fdiro;
- int type = FILETYPE_UNKNOWN;
-
- status = ext2fs_read_file (diro, fpos + sizeof (struct ext2_dirent), dirent.namelen, filename);
- if (status < 1)
- {
- return(0);
+ if (dirent.namelen != 0) {
+ char filename[dirent.namelen + 1];
+ ext2fs_node_t fdiro;
+ int type = FILETYPE_UNKNOWN;
+
+ status = ext2fs_read_file (diro,
+ fpos + sizeof (struct ext2_dirent),
+ dirent.namelen, filename);
+ if (status < 1) {
+ return (0);
}
fdiro = malloc (sizeof (struct ext2fs_node));
- if (!fdiro)
- {
- return(0);
+ if (!fdiro) {
+ return (0);
}
fdiro->data = diro->data;
- fdiro->ino = __le32_to_cpu(dirent.inode);
+ fdiro->ino = __le32_to_cpu (dirent.inode);
filename[dirent.namelen] = '\0';
- if (dirent.filetype != FILETYPE_UNKNOWN)
- {
+ if (dirent.filetype != FILETYPE_UNKNOWN) {
fdiro->inode_read = 0;
- if (dirent.filetype == FILETYPE_DIRECTORY)
- {
+ if (dirent.filetype == FILETYPE_DIRECTORY) {
type = FILETYPE_DIRECTORY;
- }
- else if (dirent.filetype == FILETYPE_SYMLINK)
- {
+ } else if (dirent.filetype ==
+ FILETYPE_SYMLINK) {
type = FILETYPE_SYMLINK;
+ } else if (dirent.filetype == FILETYPE_REG) {
+ type = FILETYPE_REG;
}
- else if (dirent.filetype == FILETYPE_REG)
- {
- type = FILETYPE_REG;
- }
- }
- else
- {
+ } else {
/* The filetype can not be read from the dirent, get it from inode */
- status = ext2fs_read_inode (diro->data, __le32_to_cpu (dirent.inode), &fdiro->inode);
- if (status == 0)
- {
- free(fdiro);
- return(0);
+ status = ext2fs_read_inode (diro->data,
+ __le32_to_cpu(dirent.inode),
+ &fdiro->inode);
+ if (status == 0) {
+ free (fdiro);
+ return (0);
}
fdiro->inode_read = 1;
- if ((__le16_to_cpu (fdiro->inode.mode) & FILETYPE_INO_MASK) == FILETYPE_INO_DIRECTORY)
- {
+ if ((__le16_to_cpu (fdiro->inode.mode) &
+ FILETYPE_INO_MASK) ==
+ FILETYPE_INO_DIRECTORY) {
type = FILETYPE_DIRECTORY;
- }
- else if ((__le16_to_cpu (fdiro->inode.mode) & FILETYPE_INO_MASK) == FILETYPE_INO_SYMLINK)
- {
+ } else if ((__le16_to_cpu (fdiro->inode.mode)
+ & FILETYPE_INO_MASK) ==
+ FILETYPE_INO_SYMLINK) {
type = FILETYPE_SYMLINK;
- }
- else if ((__le16_to_cpu (fdiro->inode.mode) & FILETYPE_INO_MASK) == FILETYPE_INO_REG)
- {
+ } else if ((__le16_to_cpu (fdiro->inode.mode)
+ & FILETYPE_INO_MASK) ==
+ FILETYPE_INO_REG) {
type = FILETYPE_REG;
}
}
#ifdef DEBUG
- printf("iterate >%s<\n", filename);
+ printf ("iterate >%s<\n", filename);
#endif /* of DEBUG */
- if ((name != NULL) && (fnode != NULL) && (ftype != NULL))
- {
- if(strcmp(filename, name) == 0)
- {
+ if ((name != NULL) && (fnode != NULL)
+ && (ftype != NULL)) {
+ if (strcmp (filename, name) == 0) {
*ftype = type;
*fnode = fdiro;
- return(1);
+ return (1);
}
- }
- else
- {
- if (fdiro->inode_read == 0)
- {
- status = ext2fs_read_inode (diro->data, __le32_to_cpu (dirent.inode), &fdiro->inode);
- if (status == 0)
- {
- free(fdiro);
- return(0);
+ } else {
+ if (fdiro->inode_read == 0) {
+ status = ext2fs_read_inode (diro->data,
+ __le32_to_cpu (dirent.inode),
+ &fdiro->inode);
+ if (status == 0) {
+ free (fdiro);
+ return (0);
}
fdiro->inode_read = 1;
}
- switch(type)
- {
+ switch (type) {
case FILETYPE_DIRECTORY:
- printf("<DIR> ");
+ printf ("<DIR> ");
break;
case FILETYPE_SYMLINK:
- printf("<SYM> ");
+ printf ("<SYM> ");
break;
case FILETYPE_REG:
- printf(" ");
+ printf (" ");
break;
default:
- printf("<???> ");
+ printf ("<???> ");
break;
}
- printf("%10d %s\n", __le32_to_cpu(fdiro->inode.size), filename);
+ printf ("%10d %s\n",
+ __le32_to_cpu (fdiro->inode.size),
+ filename);
}
- free(fdiro);
+ free (fdiro);
}
fpos += __le16_to_cpu (dirent.direntlen);
}
- return(0);
+ return (0);
}
-static char *ext2fs_read_symlink
-(
- ext2fs_node_t node
- )
-{
- char *symlink;
+static char *ext2fs_read_symlink (ext2fs_node_t node) {
+ char *symlink;
struct ext2fs_node *diro = node;
- int status;
-
- if (!diro->inode_read)
- {
- status = ext2fs_read_inode (diro->data, diro->ino, &diro->inode);
- if (status == 0)
- {
- return(0);
+ int status;
+
+ if (!diro->inode_read) {
+ status = ext2fs_read_inode (diro->data, diro->ino,
+ &diro->inode);
+ if (status == 0) {
+ return (0);
}
}
symlink = malloc (__le32_to_cpu (diro->inode.size) + 1);
- if (!symlink)
- {
- return(0);
+ if (!symlink) {
+ return (0);
}
/* If the filesize of the symlink is bigger than
60 the symlink is stored in a separate block,
otherwise it is stored in the inode. */
- if (__le32_to_cpu (diro->inode.size) <= 60)
- {
- strncpy (symlink, diro->inode.b.symlink, __le32_to_cpu (diro->inode.size));
- }
- else
- {
- status = ext2fs_read_file (diro, 0, __le32_to_cpu (diro->inode.size), symlink);
- if (status == 0)
- {
+ if (__le32_to_cpu (diro->inode.size) <= 60) {
+ strncpy (symlink, diro->inode.b.symlink,
+ __le32_to_cpu (diro->inode.size));
+ } else {
+ status = ext2fs_read_file (diro, 0,
+ __le32_to_cpu (diro->inode.size),
+ symlink);
+ if (status == 0) {
free (symlink);
- return(0);
+ return (0);
}
}
symlink[__le32_to_cpu (diro->inode.size)] = '\0';
- return(symlink);
+ return (symlink);
}
int ext2fs_find_file1
-(
- const char *currpath,
- ext2fs_node_t currroot,
- ext2fs_node_t *currfound,
- int *foundtype
- )
-{
- char fpath[strlen (currpath) + 1];
- char *name = fpath;
- char *next;
- int status;
- int type = FILETYPE_DIRECTORY;
- ext2fs_node_t currnode = currroot;
- ext2fs_node_t oldnode = currroot;
+ (const char *currpath,
+ ext2fs_node_t currroot, ext2fs_node_t * currfound, int *foundtype) {
+ char fpath[strlen (currpath) + 1];
+ char *name = fpath;
+ char *next;
+ int status;
+ int type = FILETYPE_DIRECTORY;
+ ext2fs_node_t currnode = currroot;
+ ext2fs_node_t oldnode = currroot;
strncpy (fpath, currpath, strlen (currpath) + 1);
/* Remove all leading slashes. */
- while (*name == '/')
- {
+ while (*name == '/') {
name++;
- }
- if (!*name)
- {
+ }
+ if (!*name) {
*currfound = currnode;
- return(1);
+ return (1);
}
- for (;;)
- {
+ for (;;) {
int found;
/* Extract the actual part from the pathname. */
next = strchr (name, '/');
- if (next)
- {
+ if (next) {
/* Remove all leading slashes. */
- while (*next == '/')
- {
+ while (*next == '/') {
*(next++) = '\0';
}
}
/* At this point it is expected that the current node is a directory, check if this is true. */
- if (type != FILETYPE_DIRECTORY)
- {
+ if (type != FILETYPE_DIRECTORY) {
ext2fs_free_node (currnode, currroot);
- return(0);
+ return (0);
}
oldnode = currnode;
/* Iterate over the directory. */
found = ext2fs_iterate_dir (currnode, name, &currnode, &type);
- if (found == 0)
- {
- return(0);
+ if (found == 0) {
+ return (0);
}
- if (found == -1)
- {
+ if (found == -1) {
break;
}
/* Read in the symlink and follow it. */
- if (type == FILETYPE_SYMLINK)
- {
+ if (type == FILETYPE_SYMLINK) {
char *symlink;
/* Test if the symlink does not loop. */
- if (++symlinknest == 8)
- {
+ if (++symlinknest == 8) {
ext2fs_free_node (currnode, currroot);
- ext2fs_free_node (oldnode, currroot);
- return(0);
+ ext2fs_free_node (oldnode, currroot);
+ return (0);
}
symlink = ext2fs_read_symlink (currnode);
ext2fs_free_node (currnode, currroot);
- if (!symlink)
- {
+ if (!symlink) {
ext2fs_free_node (oldnode, currroot);
- return(0);
+ return (0);
}
#ifdef DEBUG
- printf("Got symlink >%s<\n",symlink);
+ printf ("Got symlink >%s<\n", symlink);
#endif /* of DEBUG */
/* The symlink is an absolute path, go back to the root inode. */
- if (symlink[0] == '/')
- {
+ if (symlink[0] == '/') {
ext2fs_free_node (oldnode, currroot);
oldnode = &ext2fs_root->diropen;
}
/* Lookup the node the symlink points to. */
- status = ext2fs_find_file1 (symlink, oldnode, &currnode, &type);
+ status = ext2fs_find_file1 (symlink, oldnode,
+ &currnode, &type);
free (symlink);
- if (status == 0)
- {
+ if (status == 0) {
ext2fs_free_node (oldnode, currroot);
- return(0);
+ return (0);
}
}
ext2fs_free_node (oldnode, currroot);
/* Found the node! */
- if (!next || *next == '\0')
- {
+ if (!next || *next == '\0') {
*currfound = currnode;
*foundtype = type;
- return(1);
+ return (1);
}
name = next;
}
- return(-1);
+ return (-1);
}
int ext2fs_find_file
-(
- const char *path,
- ext2fs_node_t rootnode,
- ext2fs_node_t *foundnode,
- int expecttype
- )
-{
+ (const char *path,
+ ext2fs_node_t rootnode, ext2fs_node_t * foundnode, int expecttype) {
int status;
int foundtype = FILETYPE_DIRECTORY;
symlinknest = 0;
- if (!path || path[0] != '/')
- {
- return(0);
+ if (!path || path[0] != '/') {
+ return (0);
}
- status = ext2fs_find_file1(path, rootnode, foundnode, &foundtype);
- if (status == 0)
- {
- return(0);
+ status = ext2fs_find_file1 (path, rootnode, foundnode, &foundtype);
+ if (status == 0) {
+ return (0);
}
/* Check if the node that was found was of the expected type. */
- if ((expecttype == FILETYPE_REG) && (foundtype != expecttype))
- {
- return(0);
- }
- else if ((expecttype == FILETYPE_DIRECTORY) && (foundtype != expecttype))
- {
- return(0);
+ if ((expecttype == FILETYPE_REG) && (foundtype != expecttype)) {
+ return (0);
+ } else if ((expecttype == FILETYPE_DIRECTORY)
+ && (foundtype != expecttype)) {
+ return (0);
}
- return(1);
+ return (1);
}
-int ext2fs_ls
-(
- char *dirname
- )
-{
+int ext2fs_ls (char *dirname) {
ext2fs_node_t dirnode;
- int status;
-
- if (ext2fs_root == NULL)
- {
- return(0);
- }
-
- status = ext2fs_find_file(dirname, &ext2fs_root->diropen, &dirnode, FILETYPE_DIRECTORY);
- if (status != 1)
- {
- printf("** Can not find directory. **\n");
- return(1);
- }
- ext2fs_iterate_dir(dirnode, NULL, NULL, NULL);
- ext2fs_free_node(dirnode, &ext2fs_root->diropen);
- return(0);
+ int status;
+
+ if (ext2fs_root == NULL) {
+ return (0);
+ }
+
+ status = ext2fs_find_file (dirname, &ext2fs_root->diropen, &dirnode,
+ FILETYPE_DIRECTORY);
+ if (status != 1) {
+ printf ("** Can not find directory. **\n");
+ return (1);
+ }
+ ext2fs_iterate_dir (dirnode, NULL, NULL, NULL);
+ ext2fs_free_node (dirnode, &ext2fs_root->diropen);
+ return (0);
}
-int ext2fs_open
-(
- char *filename
- )
-{
- ext2fs_node_t fdiro = NULL;
- int status;
- int len;
+int ext2fs_open (char *filename) {
+ ext2fs_node_t fdiro = NULL;
+ int status;
+ int len;
- if (ext2fs_root == NULL)
- {
- return(0);
+ if (ext2fs_root == NULL) {
+ return (0);
}
ext2fs_file = NULL;
- status = ext2fs_find_file (filename, &ext2fs_root->diropen, &fdiro, FILETYPE_REG);
- if (status == 0)
- {
+ status = ext2fs_find_file (filename, &ext2fs_root->diropen, &fdiro,
+ FILETYPE_REG);
+ if (status == 0) {
goto fail;
}
- if (!fdiro->inode_read)
- {
- status = ext2fs_read_inode (fdiro->data, fdiro->ino, &fdiro->inode);
- if (status == 0)
- {
+ if (!fdiro->inode_read) {
+ status = ext2fs_read_inode (fdiro->data, fdiro->ino,
+ &fdiro->inode);
+ if (status == 0) {
goto fail;
}
}
len = __le32_to_cpu (fdiro->inode.size);
ext2fs_file = fdiro;
- return(len);
+ return (len);
- fail:
- ext2fs_free_node(fdiro, &ext2fs_root->diropen);
- return(0);
+ fail:
+ ext2fs_free_node (fdiro, &ext2fs_root->diropen);
+ return (0);
}
-int ext2fs_close
-(
- void
- )
-{
- if ((ext2fs_file != NULL) && (ext2fs_root != NULL))
- {
- ext2fs_free_node(ext2fs_file, &ext2fs_root->diropen);
+int ext2fs_close (void
+ ) {
+ if ((ext2fs_file != NULL) && (ext2fs_root != NULL)) {
+ ext2fs_free_node (ext2fs_file, &ext2fs_root->diropen);
ext2fs_file = NULL;
}
- if (ext2fs_root != NULL)
- {
- free(ext2fs_root);
- ext2fs_root = NULL;
- }
- if (indir1_block != NULL)
- {
- free(indir1_block);
- indir1_block = NULL;
- indir1_size = 0;
- indir1_blkno = -1;
- }
- if (indir2_block != NULL)
- {
- free(indir2_block);
- indir2_block = NULL;
- indir2_size = 0;
- indir2_blkno = -1;
- }
- return(0);
+ if (ext2fs_root != NULL) {
+ free (ext2fs_root);
+ ext2fs_root = NULL;
+ }
+ if (indir1_block != NULL) {
+ free (indir1_block);
+ indir1_block = NULL;
+ indir1_size = 0;
+ indir1_blkno = -1;
+ }
+ if (indir2_block != NULL) {
+ free (indir2_block);
+ indir2_block = NULL;
+ indir2_size = 0;
+ indir2_blkno = -1;
+ }
+ return (0);
}
-int ext2fs_read
-(
- char *buf,
- unsigned len
- )
-{
+int ext2fs_read (char *buf, unsigned len) {
int status;
- if (ext2fs_root == NULL)
- {
- return(0);
+ if (ext2fs_root == NULL) {
+ return (0);
}
- if (ext2fs_file == NULL)
- {
- return(0);
+ if (ext2fs_file == NULL) {
+ return (0);
}
- status = ext2fs_read_file(ext2fs_file, 0, len, buf);
- return(status);
+ status = ext2fs_read_file (ext2fs_file, 0, len, buf);
+ return (status);
}
-int ext2fs_mount
-(
- unsigned part_length
- )
-{
+int ext2fs_mount (unsigned part_length) {
struct ext2_data *data;
- int status;
+ int status;
data = malloc (sizeof (struct ext2_data));
- if (!data)
- {
- return(0);
+ if (!data) {
+ return (0);
}
/* Read the superblock. */
- status = ext2fs_devread (1 * 2, 0, sizeof (struct ext2_sblock), (char *) &data->sblock);
- if (status == 0)
- {
+ status = ext2fs_devread (1 * 2, 0, sizeof (struct ext2_sblock),
+ (char *) &data->sblock);
+ if (status == 0) {
goto fail;
}
/* Make sure this is an ext2 filesystem. */
- if (__le16_to_cpu (data->sblock.magic) != EXT2_MAGIC)
- {
+ if (__le16_to_cpu (data->sblock.magic) != EXT2_MAGIC) {
goto fail;
}
- data->diropen.data = data;
- data->diropen.ino = 2;
- data->diropen.inode_read = 1;
- data->inode = &data->diropen.inode;
+ data->diropen.data = data;
+ data->diropen.ino = 2;
+ data->diropen.inode_read = 1;
+ data->inode = &data->diropen.inode;
status = ext2fs_read_inode (data, 2, data->inode);
- if (status == 0)
- {
+ if (status == 0) {
goto fail;
}
ext2fs_root = data;
- return(1);
+ return (1);
- fail:
- printf("Failed to mount ext2 filesystem...\n");
- free(data);
+fail:
+ printf ("Failed to mount ext2 filesystem...\n");
+ free (data);
ext2fs_root = NULL;
- return(0);
+ return (0);
}
#endif /* CFG_CMD_EXT2FS */
diff --git a/include/asm-m68k/m5249.h b/include/asm-m68k/m5249.h
index 7ff56303f..8c1b07755 100644
--- a/include/asm-m68k/m5249.h
+++ b/include/asm-m68k/m5249.h
@@ -143,8 +143,6 @@
#define MCFSIM_PLLCR 0x180 /* PLL Control register */
-
-
/*
* Some symbol defines for the above...
*/
diff --git a/include/configs/APC405.h b/include/configs/APC405.h
index 588f9f601..d46b8445a 100644
--- a/include/configs/APC405.h
+++ b/include/configs/APC405.h
@@ -130,8 +130,8 @@
/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE \
- { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
- 57600, 115200, 230400, 460800, 921600 }
+ { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
+ 57600, 115200, 230400, 460800, 921600 }
#define CFG_LOAD_ADDR 0x100000 /* default load address */
#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
@@ -163,7 +163,7 @@
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
#define CONFIG_PCI_PNP /* do pci plug-and-play */
- /* resource configuration */
+ /* resource configuration */
#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
@@ -236,7 +236,7 @@
#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
#define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
#define CFG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars*/
- /* total size of a CAT24WC16 is 2048 bytes */
+ /* total size of a CAT24WC16 is 2048 bytes */
#define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */
#define CFG_NVRAM_SIZE 242 /* NVRAM size */
@@ -262,7 +262,7 @@
* Cache Configuration
*/
#define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */
- /* have only 8kB, 16kB is save here */
+ /* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h
index 45fcee00f..fab263b4b 100644
--- a/include/configs/CPCI750.h
+++ b/include/configs/CPCI750.h
@@ -145,11 +145,11 @@
| CFG_CMD_PCI \
| CFG_CMD_ELF \
| CFG_CMD_DATE \
- | CFG_CMD_NET \
- | CFG_CMD_PING \
- | CFG_CMD_IDE \
- | CFG_CMD_FAT \
- | CFG_CMD_EXT2 \
+ | CFG_CMD_NET \
+ | CFG_CMD_PING \
+ | CFG_CMD_IDE \
+ | CFG_CMD_FAT \
+ | CFG_CMD_EXT2 \
)
#define CONFIG_DOS_PARTITION
@@ -331,11 +331,11 @@
#define CFG_DEV3_PAR 0x8FCFFFFF /* nvram/can */
#define CFG_BOOT_PAR 0x8FDFFFFF /* 16 bit flash */
- /* c 4 a 8 2 4 1 c */
- /* 33 22|2222|22 22|111 1|11 11|1 1 | | */
- /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */
- /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */
- /* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */
+ /* c 4 a 8 2 4 1 c */
+ /* 33 22|2222|22 22|111 1|11 11|1 1 | | */
+ /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */
+ /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */
+ /* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */
/* MPP Control MV64360 Appendix P P. 632*/
@@ -392,8 +392,6 @@
#define CFG_PCI0_0_MEM_SPACE (CFG_PCI0_MEM_BASE)
#define CFG_PCI1_0_MEM_SPACE (CFG_PCI1_MEM_BASE)
-
-
/* PCI I/O MAP section */
#define CFG_PCI0_IO_BASE 0xfa000000
#define CFG_PCI0_IO_SIZE _16M
diff --git a/include/configs/TASREG.h b/include/configs/TASREG.h
index 2d52a8b50..119bc2442 100644
--- a/include/configs/TASREG.h
+++ b/include/configs/TASREG.h
@@ -51,9 +51,9 @@
#undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C ) & \
+ CFG_CMD_BSP | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_I2C ) & \
~(CFG_CMD_NET))
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index f1955a513..595bd292b 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -426,7 +426,7 @@
* use PSC6:
* on STK52xx:
* use as UART. Pins PSC6_0 to PSC6_3 are used.
- Bits 9:11 (mask: 0x00700000):
+ Bits 9:11 (mask: 0x00700000):
* 101 -> PSC6 : Extended POST test is not available
* on MINI-FAP and TQM5200_IB:
* use PSC6_1 and PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
diff --git a/include/ppc405.h b/include/ppc405.h
index 1cd0c5594..44702400e 100644
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -482,11 +482,11 @@
PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
#define PLLMR0_266_66_33_33 (PLL_CPUDIV_1 | PLL_PLBDIV_4 | \
- PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \
- PLL_MALDIV_1 | PLL_PCIDIV_2)
+ PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \
+ PLL_MALDIV_1 | PLL_PCIDIV_2)
#define PLLMR1_266_66_33_33 (PLL_FBKDIV_8 | \
- PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
- PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+ PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
+ PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
/*
* PLL Voltage Controlled Oscillator (VCO) definitions
diff --git a/include/universe.h b/include/universe.h
index 684e9272b..2892d31b4 100644
--- a/include/universe.h
+++ b/include/universe.h
@@ -23,12 +23,10 @@
#ifndef _universe_h
#define _universe_h
-
typedef struct _UNIVERSE UNIVERSE;
typedef struct _SLAVE_IMAGE SLAVE_IMAGE;
typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;
-
struct _SLAVE_IMAGE {
unsigned int ctl; /* Control */
unsigned int bs; /* Base */
@@ -148,10 +146,3 @@ struct _TDMA_CMD_PACKET {
#define PCI_MS_Mxx 0x03
#endif
-
-
-
-
-
-
-