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authorwdenk <wdenk>2004-06-09 17:45:32 +0000
committerwdenk <wdenk>2004-06-09 17:45:32 +0000
commit36c728774edcfca54766f6828173fe24d3d8aa0b (patch)
treea431216abba77d12434c0a01b858d90e71d1075a
parent4c0d4c3b782ef278f5843eb2533e03b9c4c16e21 (diff)
downloadu-boot-linaro-stable-36c728774edcfca54766f6828173fe24d3d8aa0b.tar.gz
* Patch by Mark Jonas, 08 June 2004:
- Make MPC5200 boards evaluate the SVR to print processor name and version in checkcpu() (cpu/mpc5xxx/cpu.c). * Patch by Kai-Uwe Bloem, 06 May 2004: Fix endianess problem in cramfs code
-rw-r--r--CHANGELOG7
-rw-r--r--cpu/mpc5xxx/cpu.c20
-rw-r--r--cpu/mpc5xxx/start.S5
-rw-r--r--include/asm-ppc/processor.h19
-rw-r--r--include/common.h3
-rw-r--r--include/cramfs/cramfs_fs.h36
6 files changed, 52 insertions, 38 deletions
diff --git a/CHANGELOG b/CHANGELOG
index b792af509..eec8062c9 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,13 @@
Changes since U-Boot 1.1.1:
======================================================================
+* Patch by Mark Jonas, 08 June 2004:
+ - Make MPC5200 boards evaluate the SVR to print processor name and
+ version in checkcpu() (cpu/mpc5xxx/cpu.c).
+
+* Patch by Kai-Uwe Bloem, 06 May 2004:
+ Fix endianess problem in cramfs code
+
* Patch by Tom Armistead, 04 Jun 2004:
Add support for MAX6900 RTC
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index 7d6c0b671..2d695d12e 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -37,12 +37,28 @@ int checkcpu (void)
ulong clock = gd->cpu_clk;
char buf[32];
+#ifndef CONFIG_MGT5100
+ uint svr;
+#endif
puts ("CPU: ");
- printf (CPU_ID_STR);
-
+#ifdef CONFIG_MGT5100
+ puts (CPU_ID_STR);
printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
+#else
+ svr = get_svr ();
+ switch (SVR_VER (svr)) {
+ case SVR_MPC5200:
+ printf ("MPC5200");
+ break;
+ default:
+ printf ("MPC52?? (SVR %08x)", svr);
+ break;
+ }
+
+ printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
+#endif
printf (" at %s MHz\n", strmhz (buf, clock));
diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S
index e12eee9d1..99cad9c56 100644
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -549,6 +549,11 @@ dcache_status:
rlwinm r3, r3, HID0_DCE_BITPOS + 1, 31, 31
blr
+ .globl get_svr
+get_svr:
+ mfspr r3, SVR
+ blr
+
.globl get_pvr
get_pvr:
mfspr r3, PVR
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index f036b6828..5b3ff7513 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -280,6 +280,7 @@
#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */
#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */
#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */
+#define SPRN_SVR 0x11E /* System-On-Chip Version Register */
#define SPRN_PVR 0x11F /* Processor Version Register */
#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
@@ -496,6 +497,7 @@
#if defined(CONFIG_E500)
#define PIR SPRN_PIR
#endif
+#define SVR SPRN_SVR /* System-On-Chip Version Register */
#define PVR SPRN_PVR /* Processor Version */
#define RPA SPRN_RPA /* Required Physical Address Register */
#define SDR1 SPRN_SDR1 /* MMU hash base register */
@@ -654,6 +656,23 @@
#define IOCR_SCS 0x00000002
#define IOCR_SPC 0x00000001
+/* System-On-Chip Version Register */
+
+/* System-On-Chip Version Register (SVR) field extraction */
+
+#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
+#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */
+
+#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */
+#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */
+#define SVR_SID(svr) (((svr) >> 16) & 0x3F) /* SOC ID */
+#define SVR_PROC(svr) (((svr) >> 12) & 0x0F) /* Process revision field */
+#define SVR_MFG(svr) (((svr) >> 8) & 0x0F) /* Manufacturing revision */
+#define SVR_MJREV(svr) (((svr) >> 4) & 0x0F) /* Major SOC design revision indicator */
+#define SVR_MNREV(svr) (((svr) >> 0) & 0x0F) /* Minor SOC design revision indicator */
+
+/* System-On-Chip Version Numbers (version field only) */
+#define SVR_MPC5200 0x8011
/* Processor Version Register */
diff --git a/include/common.h b/include/common.h
index db1a114de..43a904955 100644
--- a/include/common.h
+++ b/include/common.h
@@ -315,6 +315,9 @@ int testdram(void);
uint get_immr (uint);
#endif
uint get_pir (void);
+#if defined(CONFIG_MPC5xxx)
+uint get_svr (void);
+#endif
uint get_pvr (void);
uint get_svr (void);
uint rd_ic_cst (void);
diff --git a/include/cramfs/cramfs_fs.h b/include/cramfs/cramfs_fs.h
index 233370988..e0c14f04a 100644
--- a/include/cramfs/cramfs_fs.h
+++ b/include/cramfs/cramfs_fs.h
@@ -84,21 +84,6 @@ struct cramfs_super {
| CRAMFS_FLAG_WRONG_SIGNATURE \
| CRAMFS_FLAG_SHIFTED_ROOT_OFFSET )
-/*
- * Since cramfs is little-endian, provide macros to swab the bitfields.
- */
-
-#ifndef __BYTE_ORDER
-#if defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN)
-#define __BYTE_ORDER __LITTLE_ENDIAN
-#elif defined(__BIG_ENDIAN) && !defined(__LITTLE_ENDIAN)
-#define __BYTE_ORDER __BIG_ENDIAN
-#else
-#error "unable to define __BYTE_ORDER"
-#endif
-#endif /* not __BYTE_ORDER */
-
-#if __BYTE_ORDER == __LITTLE_ENDIAN
#define CRAMFS_16(x) (x)
#define CRAMFS_24(x) (x)
#define CRAMFS_32(x) (x)
@@ -106,27 +91,6 @@ struct cramfs_super {
#define CRAMFS_GET_OFFSET(x) ((x)->offset)
#define CRAMFS_SET_OFFSET(x,y) ((x)->offset = (y))
#define CRAMFS_SET_NAMELEN(x,y) ((x)->namelen = (y))
-#elif __BYTE_ORDER == __BIG_ENDIAN
-#ifdef __KERNEL__
-#define CRAMFS_16(x) swab16(x)
-#define CRAMFS_24(x) ((swab32(x)) >> 8)
-#define CRAMFS_32(x) swab32(x)
-#else /* not __KERNEL__ */
-#define CRAMFS_16(x) bswap_16(x)
-#define CRAMFS_24(x) ((bswap_32(x)) >> 8)
-#define CRAMFS_32(x) bswap_32(x)
-#endif /* not __KERNEL__ */
-#define CRAMFS_GET_NAMELEN(x) (((u8*)(x))[8] & 0x3f)
-#define CRAMFS_GET_OFFSET(x) ((CRAMFS_24(((u32*)(x))[2] & 0xffffff) << 2) |\
- ((((u32*)(x))[2] & 0xc0000000) >> 30))
-#define CRAMFS_SET_NAMELEN(x,y) (((u8*)(x))[8] = (((0x3f & (y))) | \
- (0xc0 & ((u8*)(x))[8])))
-#define CRAMFS_SET_OFFSET(x,y) (((u32*)(x))[2] = (((y) & 3) << 30) | \
- CRAMFS_24((((y) & 0x03ffffff) >> 2)) | \
- (((u32)(((u8*)(x))[8] & 0x3f)) << 24))
-#else
-#error "__BYTE_ORDER must be __LITTLE_ENDIAN or __BIG_ENDIAN"
-#endif
/* Uncompression interfaces to the underlying zlib */
int cramfs_uncompress_block(void *dst, void *src, int srclen);