aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorwdenk <wdenk>2003-08-31 18:37:54 +0000
committerwdenk <wdenk>2003-08-31 18:37:54 +0000
commit326428cc8bbdddb30920a96b672abd0d59833ce4 (patch)
treea972f5b1cd0188096f8b13670f2c32bd7a9a14d0
parent0cb61d7dddb0d8c087f6df46a74815950668c97b (diff)
downloadu-boot-linaro-stable-326428cc8bbdddb30920a96b672abd0d59833ce4.tar.gz
Patch by Yuli Barcohen, 7 Aug 2003:
According to the MPC8260 User's Manual, PCI_MODE signal should be reflected in SCCR register, and local bus pins configuration is taken from HRCW and appears in SIUMCR. For some reason it does not work this way, so the only possibility to detect if the board is configured in PCI mode is to check the BCSR. This patch sets SCCR and SIUMCR according to the BCSR.
-rw-r--r--CHANGELOG3
-rw-r--r--board/mpc8260ads/mpc8260ads.c44
-rw-r--r--include/configs/MPC8260ADS.h9
-rw-r--r--include/version.h2
4 files changed, 42 insertions, 16 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 1badf05ea..259bc2e94 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
Changes for U-Boot 0.4.7:
======================================================================
+* Patch by Yuli Barcohen, 7 Aug 2003:
+ check BCSR to detect if the board is configured in PCI mode
+
* Patch by Raghu Krishnaprasad, 7 Aug 2003:
add support for Adder II MPC852T module
diff --git a/board/mpc8260ads/mpc8260ads.c b/board/mpc8260ads/mpc8260ads.c
index 6df3d80ba..98ae66005 100644
--- a/board/mpc8260ads/mpc8260ads.c
+++ b/board/mpc8260ads/mpc8260ads.c
@@ -35,6 +35,7 @@
#include <common.h>
#include <ioports.h>
#include <mpc8260.h>
+#include <asm/m8260_pci.h>
#include <i2c.h>
#include <spd.h>
#include <miiphy.h>
@@ -237,6 +238,7 @@ int board_pre_init (void)
long int initdram (int board_type)
{
+ vu_long *bcsr = (vu_long *)CFG_BCSR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
volatile uchar *ramaddr, c = 0xff;
@@ -252,27 +254,41 @@ long int initdram (int board_type)
immap->im_siu_conf.sc_ppc_alrh = 0x01267893;
immap->im_siu_conf.sc_tescr1 = 0x00004000;
+#if CONFIG_ADSTYPE == CFG_PQ2FADS
+ if ((bcsr[3] & BCSR_PCI_MODE) == 0) { /* PCI mode selected by JP9 */
+ immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
+ immap->im_siu_conf.sc_siumcr =
+ (immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11)
+ | SIUMCR_LBPC01;
+ }
+#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
+
memctl->memc_mptpr = CFG_MPTPR;
#ifdef CFG_LSDRAM_BASE
- /* Init local bus SDRAM */
- memctl->memc_lsrt = CFG_LSRT;
+ /*
+ Initialise local bus SDRAM only if the pins
+ are configured as local bus pins and not as PCI.
+ The configuration is determined by the HRCW.
+ */
+ if ((immap->im_siu_conf.sc_siumcr & SIUMCR_LBPC11) == SIUMCR_LBPC00) {
+ memctl->memc_lsrt = CFG_LSRT;
#if CONFIG_ADSTYPE == CFG_PQ2FADS /* CS3 */
- memctl->memc_or3 = 0xFF803280;
- memctl->memc_br3 = CFG_LSDRAM_BASE | 0x00001861;
+ memctl->memc_or3 = 0xFF803280;
+ memctl->memc_br3 = CFG_LSDRAM_BASE | 0x00001861;
#else /* CS4 */
- memctl->memc_or4 = 0xFFC01480;
- memctl->memc_br4 = CFG_LSDRAM_BASE | 0x00001861;
+ memctl->memc_or4 = 0xFFC01480;
+ memctl->memc_br4 = CFG_LSDRAM_BASE | 0x00001861;
#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
- memctl->memc_lsdmr = CFG_LSDMR | 0x28000000;
- ramaddr = (uchar *) CFG_LSDRAM_BASE;
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | 0x08000000;
- for (i = 0; i < 8; i++) {
+ memctl->memc_lsdmr = CFG_LSDMR | 0x28000000;
+ ramaddr = (uchar *) CFG_LSDRAM_BASE;
*ramaddr = c;
+ memctl->memc_lsdmr = CFG_LSDMR | 0x08000000;
+ for (i = 0; i < 8; i++)
+ *ramaddr = c;
+ memctl->memc_lsdmr = CFG_LSDMR | 0x18000000;
+ *ramaddr = c;
+ memctl->memc_lsdmr = CFG_LSDMR | 0x40000000;
}
- memctl->memc_lsdmr = CFG_LSDMR | 0x18000000;
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | 0x40000000;
#endif /* CFG_LSDRAM_BASE */
/* Init 60x bus SDRAM */
diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h
index 5960b3025..254ec46f1 100644
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -206,6 +206,8 @@
/*
* Miscellaneous configurable options
*/
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -247,7 +249,7 @@
#define CFG_IMMR 0xF0000000
#define CFG_BCSR 0xF4500000
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_LSDRAM_BASE 0xD0000000
+#define CFG_LSDRAM_BASE 0xFD000000
#define RS232EN_1 0x02000002
#define RS232EN_2 0x01000001
@@ -255,6 +257,7 @@
#define FETH1_RST 0x04000004
#define FETHIEN2 0x01000000
#define FETH2_RST 0x08000000
+#define BCSR_PCI_MODE 0x01000000
#define CFG_INIT_RAM_ADDR CFG_IMMR
#define CFG_INIT_RAM_END 0x4000 /* End of used area in DPRAM */
@@ -327,6 +330,10 @@
#define CFG_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE)
#define CFG_RCCR 0
+#if CONFIG_ADSTYPE == CFG_8266ADS
+#undef CFG_LSDRAM_BASE /* No local bus SDRAM on MPC8266ADS */
+#endif /* CONFIG_ADSTYPE == CFG_8266ADS */
+
#if CONFIG_ADSTYPE == CFG_PQ2FADS
#define CFG_PSDMR 0x824B36A3
#define CFG_PSRT 0x13
diff --git a/include/version.h b/include/version.h
index d295c2a3c..f0e19d5bf 100644
--- a/include/version.h
+++ b/include/version.h
@@ -24,6 +24,6 @@
#ifndef __VERSION_H__
#define __VERSION_H__
-#define U_BOOT_VERSION "U-Boot 0.4.7"
+#define U_BOOT_VERSION "U-Boot 0.4.8"
#endif /* __VERSION_H__ */