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authorwdenk <wdenk>2003-06-22 17:18:28 +0000
committerwdenk <wdenk>2003-06-22 17:18:28 +0000
commit3595ac4979e648e102c7a500e3c63193a27953bc (patch)
treeb15884457b571ad55691fa8a0a6841d5dde15a14
parent9a0e21a3a87830f66a93c17d1bca66fd12d860ae (diff)
downloadu-boot-linaro-stable-3595ac4979e648e102c7a500e3c63193a27953bc.tar.gz
* Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board * Patch by Richard Woodruff, 19 June 03: - Enabled standard u-boot device abstraction for ARM - Enabled console device for ARM - Initilized bi_baudrate for ARM * Patch by Bill Hargen, 23 Apr 2003: fix byte order for 824x I2C addresses (write op)
-rw-r--r--CHANGELOG11
-rw-r--r--board/mpc8266ads/mpc8266ads.c21
-rw-r--r--common/devices.c4
-rw-r--r--cpu/mpc824x/drivers/i2c/i2c1.c85
-rw-r--r--lib_arm/board.c15
5 files changed, 91 insertions, 45 deletions
diff --git a/CHANGELOG b/CHANGELOG
index b7f49ae31..ecf10b8a6 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,17 @@
Changes since U-Boot 0.3.1:
======================================================================
+* Patch by Rune Torgersen, 4 Jun 2003:
+ add large memory support for MPC8266ADS board
+
+* Patch by Richard Woodruff, 19 June 03:
+ - Enabled standard u-boot device abstraction for ARM
+ - Enabled console device for ARM
+ - Initilized bi_baudrate for ARM
+
+* Patch by Bill Hargen, 23 Apr 2003:
+ fix byte order for 824x I2C addresses (write op)
+
* Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
diff --git a/board/mpc8266ads/mpc8266ads.c b/board/mpc8266ads/mpc8266ads.c
index 501e610d5..c6c8d761c 100644
--- a/board/mpc8266ads/mpc8266ads.c
+++ b/board/mpc8266ads/mpc8266ads.c
@@ -46,7 +46,7 @@
* PSDMR_BUFCMD adds a clock
* 0 no extra clock
*/
-#define CONFIG_PBI 0
+#define CONFIG_PBI PSDMR_PBI
#define PESSIMISTIC_SDRAM 0
#define EAMUX 0 /* EST requires EAMUX */
#define BUFCMD 0
@@ -379,6 +379,25 @@ long int initdram(int board_type)
sdram_size = 1 << (rows + cols + banks + width);
+ /* hack for high density memory (512MB per CS) */
+ /* !!!!! Will ONLY work with Page Based Interleave !!!!!
+ ( PSDMR[PBI] = 1 )
+ */
+ /* mamory actually has 11 column addresses, but the memory controller
+ doesn't really care.
+ the calculations that follow will however move the rows so that
+ they are muxed one bit off if you use 11 bit columns.
+ The solution is to tell the memory controller the correct size of the memory
+ but change the number of columns to 10 afterwards.
+ The 11th column addre will still be mucxed correctly onto the bus.
+
+ Also be aware that the MPC8266ADS board Rev B has not connected
+ Row addres 13 to anything.
+
+ The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126)
+ */
+ if (cols > 10)
+ cols = 10;
#if(CONFIG_PBI == 0) /* bank-based interleaving */
rowst = ((32 - 6) - (rows + cols + width)) * 2;
diff --git a/common/devices.c b/common/devices.c
index 1f88fd5e3..4839eacbb 100644
--- a/common/devices.c
+++ b/common/devices.c
@@ -160,14 +160,16 @@ int devices_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
- int i;
+#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
ulong relocation_offset = gd->reloc_off;
+ int i;
/* relocate device name pointers */
for (i = 0; i < (sizeof (stdio_names) / sizeof (char *)); ++i) {
stdio_names[i] = (char *) (((ulong) stdio_names[i]) +
relocation_offset);
}
+#endif
/* Initialize the list */
devlist = ListCreate (sizeof (device_t));
diff --git a/cpu/mpc824x/drivers/i2c/i2c1.c b/cpu/mpc824x/drivers/i2c/i2c1.c
index 7a2eb6665..dc1c97ca0 100644
--- a/cpu/mpc824x/drivers/i2c/i2c1.c
+++ b/cpu/mpc824x/drivers/i2c/i2c1.c
@@ -125,10 +125,10 @@ I2C_Status I2C_Initialize (unsigned char addr,
* len is the length of data to send or receive
* buffer is the address of the data buffer
* stop = I2C_NO_STOP, don't signal STOP at end of transaction
- * I2C_STOP, signal STOP at end of transaction
+ * I2C_STOP, signal STOP at end of transaction
* retry is the timeout retry value, currently ignored
* rsta = I2C_NO_RESTART, this is not continuation of existing transaction
- * I2C_RESTART, this is a continuation of existing transaction
+ * I2C_RESTART, this is a continuation of existing transaction
*/
I2C_Status I2C_do_transaction ( I2C_INTERRUPT_MODE en_int,
I2C_TRANSACTION_MODE act,
@@ -191,12 +191,12 @@ I2C_Status I2C_do_transaction ( I2C_INTERRUPT_MODE en_int,
}
/*
- * We first have to contact the slave device and transmit the
- * data address. Be careful about the STOP and restart stuff.
- * We don't want to signal STOP after sending the data
- * address, but this could be a continuation if the
- * application didn't release the bus after the previous
- * transaction, by not sending a STOP after it.
+ * We first have to contact the slave device and transmit the
+ * data address. Be careful about the STOP and restart stuff.
+ * We don't want to signal STOP after sending the data
+ * address, but this could be a continuation if the
+ * application didn't release the bus after the previous
+ * transaction, by not sending a STOP after it.
*/
status = I2C_do_buffer (en_int, I2C_MASTER_XMIT, i2c_addr, 1,
data_addr_buffer, I2C_NO_STOP, retry, rsta);
@@ -231,10 +231,10 @@ I2C_Status I2C_do_transaction ( I2C_INTERRUPT_MODE en_int,
* len is the length of data to send or receive
* buffer is the address of the data buffer
* stop = I2C_NO_STOP, don't signal STOP at end of transaction
- * I2C_STOP, signal STOP at end of transaction
+ * I2C_STOP, signal STOP at end of transaction
* retry is the timeout retry value, currently ignored
* rsta = I2C_NO_RESTART, this is not continuation of existing transaction
- * I2C_RESTART, this is a continuation of existing transaction
+ * I2C_RESTART, this is a continuation of existing transaction
*/
static I2C_Status I2C_do_buffer (I2C_INTERRUPT_MODE en_int,
I2C_TRANSACTION_MODE act,
@@ -518,9 +518,9 @@ static I2CStatus I2C_Timer_Event (unsigned int eumbbar,
* function: I2C_Start
*
* description: Generate a START signal in the desired mode.
- * I2C is the master.
+ * I2C is the master.
*
- * Return I2CSUCCESS if no error.
+ * Return I2CSUCCESS if no error.
*
* note:
****************************************************/
@@ -594,8 +594,8 @@ static I2CStatus I2C_Start (unsigned int eumbbar, unsigned char slave_addr, /* a
* function: I2c_Stop
*
* description: Generate a STOP signal to terminate the master
- * transaction.
- * return I2CSUCCESS
+ * transaction.
+ * return I2CSUCCESS
*
**********************************************************/
static I2CStatus I2C_Stop (unsigned int eumbbar)
@@ -621,10 +621,10 @@ static I2CStatus I2C_Stop (unsigned int eumbbar)
* function: I2C_Master_Xmit
*
* description: Master sends one byte of data to
- * slave target
+ * slave target
*
- * return I2CSUCCESS if the byte transmitted.
- * Otherwise no-zero
+ * return I2CSUCCESS if the byte transmitted.
+ * Otherwise no-zero
*
* Note: condition must meet when this function is called:
* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 && I2CSR(RXAK) == 0
@@ -669,9 +669,9 @@ static I2CStatus I2C_Master_Xmit (unsigned int eumbbar)
* function: I2C_Master_Rcv
*
* description: master reads one byte data
- * from slave source
+ * from slave source
*
- * return I2CSUCCESS if no error
+ * return I2CSUCCESS if no error
*
* Note: condition must meet when this function is called:
* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 &&
@@ -736,10 +736,10 @@ static I2CStatus I2C_Master_Rcv (unsigned int eumbbar)
* function: I2C_Slave_Xmit
*
* description: Slave sends one byte of data to
- * requesting destination
+ * requesting destination
*
- * return SUCCESS if the byte transmitted. Otherwise
- * No-zero
+ * return SUCCESS if the byte transmitted. Otherwise
+ * No-zero
*
* Note: condition must meet when this function is called:
* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 && I2CSR(RXAK) = 0
@@ -757,12 +757,12 @@ static I2CStatus I2C_Slave_Xmit (unsigned int eumbbar)
ByteToXmit = 0;
/*
- * do not toggle I2CCR(MTX). Doing so will
- * cause bus-hung since current Kahlua design
- * does not give master a way to detect slave
- * stop. It is always a good idea for master
- * to use timer to prevent the long long
- * delays
+ * do not toggle I2CCR(MTX). Doing so will
+ * cause bus-hung since current Kahlua design
+ * does not give master a way to detect slave
+ * stop. It is always a good idea for master
+ * to use timer to prevent the long long
+ * delays
*/
return I2CBUFFEMPTY;
@@ -787,9 +787,9 @@ static I2CStatus I2C_Slave_Xmit (unsigned int eumbbar)
* function: I2C_Slave_Rcv
*
* description: slave reads one byte data
- * from master source
+ * from master source
*
- * return I2CSUCCESS if no error otherwise non-zero
+ * return I2CSUCCESS if no error otherwise non-zero
*
* Note: condition must meet when this function is called:
* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 &&
@@ -834,8 +834,8 @@ static I2CStatus I2C_Slave_Rcv (unsigned int eumbbar)
* function: I2C_Init
*
* description: Initialize I2C unit with desired frequency divider,
- * master's listening address, with interrupt enabled
- * or disabled.
+ * master's listening address, with interrupt enabled
+ * or disabled.
*
* note:
********************************************************/
@@ -912,7 +912,7 @@ static I2C_STAT I2C_Get_Stat (unsigned int eumbbar)
* function: I2c_Set_Ctrl
*
* description: Change I2C Control bits,
- * i.e., write to I2CCR
+ * i.e., write to I2CCR
*
********************************************/
static void I2C_Set_Ctrl (unsigned int eumbbar, I2C_CTRL ctrl)
@@ -937,7 +937,7 @@ static void I2C_Set_Ctrl (unsigned int eumbbar, I2C_CTRL ctrl)
* function: I2C_Get_Ctrl
*
* description: Query I2C Control bits,
- * i.e., read I2CCR
+ * i.e., read I2CCR
*****************************************/
static I2C_CTRL I2C_Get_Ctrl (unsigned int eumbbar)
{
@@ -959,7 +959,7 @@ static I2C_CTRL I2C_Get_Ctrl (unsigned int eumbbar)
* function: I2C_Slave_Addr
*
* description: Process slave address phase.
- * return I2CSUCCESS if no error
+ * return I2CSUCCESS if no error
*
* note: Precondition for calling this function:
* I2CSR(MIF) == 1 &&
@@ -1193,14 +1193,17 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
{
I2CStatus status;
- unsigned char dummy_buffer[I2C_RXTX_LEN + 2];
+ uchar dummy_buffer[I2C_RXTX_LEN + 2];
+ uchar *p;
int i;
- dummy_buffer[0] = addr & 0xFF;
- if (alen == 2)
- dummy_buffer[1] = (addr >> 8) & 0xFF;
- for (i = 0; i < len; i++)
- dummy_buffer[i + alen] = buffer[i];
+ p = dummy_buffer;
+ /* fill in address in big endian order */
+ for (i=0; i<alen; ++i)
+ *p++ = (addr >> (i * 8)) & 0xFF;
+ /* fill in data */
+ for (i=0; i<len; ++i)
+ *p++ = *buffer;
status = I2C_do_buffer (0, I2C_MASTER_XMIT, chip, alen + len,
dummy_buffer, I2C_STOP, 1, I2C_NO_RESTART);
diff --git a/lib_arm/board.c b/lib_arm/board.c
index f169920c6..5192e649d 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -27,7 +27,9 @@
#include <common.h>
#include <command.h>
+#include <malloc.h>
#include <devices.h>
+#include <syscall.h>
#include <version.h>
#include <net.h>
@@ -101,8 +103,7 @@ static int init_baudrate (void)
uchar tmp[64]; /* long enough for environment variables */
int i = getenv_r ("baudrate", tmp, sizeof (tmp));
-
- gd->baudrate = (i > 0)
+ gd->bd->bi_baudrate = gd->baudrate = (i > 0)
? (int) simple_strtoul (tmp, NULL, 10)
: CONFIG_BAUDRATE;
@@ -186,6 +187,7 @@ init_fnc_t *init_sequence[] = {
env_init, /* initialize environment */
init_baudrate, /* initialze baudrate settings */
serial_init, /* serial communications setup */
+ console_init_f, /* stage 1 init of console */
display_banner, /* say that we are here */
dram_init, /* configure available RAM banks */
display_dram_config,
@@ -283,6 +285,15 @@ void start_armboot (void)
}
}
+ devices_init (); /* get the devices list going. */
+
+ /* Syscalls are not implemented for ARM. But allocating
+ * this allows the console_init routines to work without #ifdefs
+ */
+ syscall_tbl = (void **) malloc (NR_SYSCALLS * sizeof (void *));
+
+ console_init_r (); /* fully init console as a device */
+
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r ();