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authorwdenk <wdenk>2003-03-06 21:55:29 +0000
committerwdenk <wdenk>2003-03-06 21:55:29 +0000
commit1cb8e980c41e86760fa93de63f4e4cf643bef9d9 (patch)
treee1993fba07dea51d92f1cec4c814a67173c1f8fb
parent500545cc6b83958209128bffa825b3c842a21a4e (diff)
* Patches by David Müller, 31 Jan 2003:LABEL_2003_03_06_2255
- minimal setup for CardBus bridges - add EEPROM read/write support in the CS8900 driver - add support for the builtin I2C controller in the Samsung s3c24x0 chips - add support for MPL's VCMA9 (Samsung s3c2410 based) board * Patch by Steven Scholz, 04 Feb 2003: add support for RTC DS1307 * Patch by Reinhard Meyer, 5 Feb 2003: fix PLPRCR/SCCR init sequence on 8xx to allow for changes of EBDF by software * Patch by Vladimir Gurevich, 07 Feb 2003: "API-compatibility patch" for 4xx I2C driver
-rw-r--r--CHANGELOG21
-rw-r--r--MAINTAINERS1
-rw-r--r--MAKEALL2
-rw-r--r--Makefile5
-rw-r--r--README1
-rw-r--r--board/mpl/common/common_util.c55
-rw-r--r--board/mpl/vcma9/Makefile49
-rw-r--r--board/mpl/vcma9/cmd_vcma9.c144
-rw-r--r--board/mpl/vcma9/config.mk24
-rw-r--r--board/mpl/vcma9/flash.c445
-rw-r--r--board/mpl/vcma9/memsetup.S160
-rw-r--r--board/mpl/vcma9/u-boot.lds54
-rw-r--r--board/mpl/vcma9/vcma9.c248
-rw-r--r--board/mpl/vcma9/vcma9.h43
-rw-r--r--board/trab/flash.c13
-rw-r--r--board/trab/trab.c85
-rw-r--r--board/trab/vfd.c45
-rw-r--r--common/cmd_bootm.c2
-rw-r--r--cpu/mpc8xx/cpu_init.c16
-rw-r--r--cpu/ppc4xx/i2c.c19
-rw-r--r--cpu/xscale/start.S60
-rw-r--r--drivers/Makefile2
-rw-r--r--drivers/cs8900.c38
-rw-r--r--drivers/cs8900.h4
-rw-r--r--drivers/inca-ip_sw.c0
-rw-r--r--drivers/pci_auto.c10
-rw-r--r--drivers/s3c24x0_i2c.c409
-rw-r--r--include/asm-arm/arch-xscale/bitfield.h113
-rw-r--r--include/asm-arm/arch-xscale/hardware.h153
-rw-r--r--include/asm-arm/mach-types.h3367
-rw-r--r--include/cmd_bsp.h14
-rw-r--r--include/configs/VCMA9.h209
-rw-r--r--include/configs/trab.h3
-rw-r--r--lib_arm/board.c6
-rw-r--r--rtc/Makefile3
-rw-r--r--rtc/ds1307.c203
36 files changed, 5943 insertions, 83 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 01a361032..81fc0729e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,27 @@
Changes since U-Boot 0.2.2:
======================================================================
+* Patches by David Müller, 31 Jan 2003:
+ - minimal setup for CardBus bridges
+ - add EEPROM read/write support in the CS8900 driver
+ - add support for the builtin I2C controller in the Samsung s3c24x0 chips
+ - add support for MPL's VCMA9 (Samsung s3c2410 based) board
+
+* Patch by Steven Scholz, 04 Feb 2003:
+ add support for RTC DS1307
+
+* Patch by Reinhard Meyer, 5 Feb 2003:
+ fix PLPRCR/SCCR init sequence on 8xx to allow for
+ changes of EBDF by software
+
+* Patch by Vladimir Gurevich, 07 Feb 2003:
+ "API-compatibility patch" for 4xx I2C driver
+
+* TRAB fixes / extensions:
+ - Restore VFD brightness as saved in environment
+ - add support for FGujitsu flashes
+ - make sure both buzzers are turned off (drive low level)
+
* Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
- update of CSB226 port
diff --git a/MAINTAINERS b/MAINTAINERS
index fee603a9c..a673cdcb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -247,6 +247,7 @@ Gary Jennejohn <gj@denx.de>
David Müller <d.mueller@elsoft.ch>
smdk2410 ARM920T
+ VCMA9 ARM920T
Rolf Offermanns <rof@sysgo.de>
diff --git a/MAKEALL b/MAKEALL
index 8a4b1d484..45e44e723 100644
--- a/MAKEALL
+++ b/MAKEALL
@@ -95,7 +95,7 @@ LIST_ARM7="impa7 ep7312"
## ARM9 Systems
#########################################################################
-LIST_ARM9="smdk2400 smdk2410 trab"
+LIST_ARM9="smdk2400 smdk2410 trab VCMA9"
#########################################################################
## Xscale Systems
diff --git a/Makefile b/Makefile
index 7ba2c436c..e77a74750 100644
--- a/Makefile
+++ b/Makefile
@@ -638,6 +638,9 @@ trab_big_flash_config: unconfig
}
@./mkconfig -a $(call xtract_trab,$@) arm arm920t trab
+VCMA9_config : unconfig
+ @./mkconfig $(@:_config=) arm arm920t vcma9 mpl
+
#########################################################################
## ARM720T Systems
#########################################################################
@@ -668,7 +671,7 @@ lubbock_config : unconfig
# i386
#========================================================================
#########################################################################
-## AMD SC520 CDP
+## AMD SC520 CDP
#########################################################################
sc520_cdp_config : unconfig
@./mkconfig $(@:_config=) i386 i386 sc520_cdp
diff --git a/README b/README
index fb6a66b3e..0539d427d 100644
--- a/README
+++ b/README
@@ -624,6 +624,7 @@ The following options need to be configured:
CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
CONFIG_RTC_MC146818 - use MC146818 RTC
+ CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
- Timestamp Support:
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index a4a73a6b7..0a67090fe 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -27,6 +27,7 @@
#include <video_fb.h>
#include "common_util.h"
#include <asm/processor.h>
+#include <asm/byteorder.h>
#include <i2c.h>
#include <devices.h>
#include <pci.h>
@@ -39,7 +40,7 @@ extern int mem_test(unsigned long start, unsigned long ramsize, int quiet);
extern flash_info_t flash_info[]; /* info for FLASH chips */
-image_header_t header;
+static image_header_t header;
@@ -51,6 +52,13 @@ int mpl_prg(unsigned long src,unsigned long size)
unsigned long *magic = (unsigned long *)src;
info = &flash_info[0];
+
+#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
+ if(ntohl(magic[0]) != IH_MAGIC) {
+ printf("Bad Magic number\n");
+ return -1;
+ }
+
start = 0 - size;
for(i=info->sector_count-1;i>0;i--)
{
@@ -60,13 +68,25 @@ int mpl_prg(unsigned long src,unsigned long size)
}
/* set-up flash location */
/* now erase flash */
- if(magic[0]!=IH_MAGIC) {
- printf("Bad Magic number\n");
- return -1;
- }
printf("Erasing at %lx (sector %d) (start %lx)\n",
start,i,info->start[i]);
flash_erase (info, i, info->sector_count-1);
+
+#elif defined(CONFIG_VCMA9)
+ start = 0;
+ for (i = 0; i <info->sector_count; i++)
+ {
+ info->protect[i] = 0; /* unprotect this sector */
+ if (size < info->start[i])
+ break;
+ }
+ /* set-up flash location */
+ /* now erase flash */
+ printf("Erasing at %lx (sector %d) (start %lx)\n",
+ start,0,info->start[0]);
+ flash_erase (info, 0, i);
+
+#endif
printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",src,size);
if ((rc = flash_write ((uchar *)src, start, size)) != 0) {
puts ("ERROR ");
@@ -84,7 +104,7 @@ int mpl_prg_image(unsigned long ld_addr)
image_header_t *hdr=&header;
/* Copy header so we can blank CRC field for re-calculation */
memcpy (&header, (char *)ld_addr, sizeof(image_header_t));
- if (hdr->ih_magic != IH_MAGIC) {
+ if (ntohl(hdr->ih_magic) != IH_MAGIC) {
printf ("Bad Magic Number\n");
return 1;
}
@@ -99,16 +119,16 @@ int mpl_prg_image(unsigned long ld_addr)
}
data = (ulong)&header;
len = sizeof(image_header_t);
- checksum = hdr->ih_hcrc;
+ checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
if (crc32 (0, (char *)data, len) != checksum) {
printf ("Bad Header Checksum\n");
return 1;
}
data = ld_addr + sizeof(image_header_t);
- len = hdr->ih_size;
+ len = ntohl(hdr->ih_size);
printf ("Verifying Checksum ... ");
- if (crc32 (0, (char *)data, len) != hdr->ih_dcrc) {
+ if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
return 1;
}
@@ -152,14 +172,14 @@ void set_backup_values(int overwrite)
}
}
memcpy(back.signature,"MPL\0",4);
- i=getenv_r("serial#",back.serial_name,16);
- if(i==0) {
+ i = getenv_r("serial#",back.serial_name,16);
+ if(i < 0) {
printf("Not possible to write Backup\n");
return;
}
back.serial_name[16]=0;
- i=getenv_r("ethaddr",back.eth_addr,20);
- if(i==0) {
+ i = getenv_r("ethaddr",back.eth_addr,20);
+ if(i < 0) {
printf("Not possible to write Backup\n");
return;
}
@@ -338,7 +358,7 @@ void show_stdio_dev(void)
#define SW_CS_PRINTF(fmt,args...)
#endif
-
+#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
int switch_cs(unsigned char boot)
{
unsigned long pbcr;
@@ -391,7 +411,12 @@ int switch_cs(unsigned char boot)
return 0;
}
}
-
+#elif defined(CONFIG_VCMA9)
+int switch_cs(unsigned char boot)
+{
+ return 0;
+}
+#endif /* CONFIG_VCMA9 */
int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile
new file mode 100644
index 000000000..428eea22d
--- /dev/null
+++ b/board/mpl/vcma9/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := vcma9.o flash.o cmd_vcma9.o
+OBJS += ../common/common_util.o ../common/memtst.o
+
+SOBJS := memsetup.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c
new file mode 100644
index 000000000..cdafc50d6
--- /dev/null
+++ b/board/mpl/vcma9/cmd_vcma9.c
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2002
+ * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
+ *
+ * adapted for VCMA9
+ * David Mueller, ELSOFT AG, d.mueller@elsoft.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include "vcma9.h"
+#include "../common/common_util.h"
+
+#if defined(CONFIG_DRIVER_CS8900)
+#include <../drivers/cs8900.h>
+
+static uchar cs8900_chksum(ushort data)
+{
+ return((data >> 8) & 0x00FF) + (data & 0x00FF);
+}
+
+#endif
+
+extern void print_vcma9_info(void);
+extern int vcma9_cantest(void);
+extern int vcma9_nandtest(void);
+extern int vcma9_dactest(void);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+/* ------------------------------------------------------------------------- */
+
+int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ if (strcmp(argv[1], "info") == 0)
+ {
+ print_vcma9_info();
+ return 0;
+ }
+#if defined(CONFIG_DRIVER_CS8900)
+ if (strcmp(argv[1], "cs8900_eeprom") == 0) {
+ if (strcmp(argv[2], "read") == 0) {
+ uchar addr; ushort data;
+
+ addr = simple_strtoul(argv[3], NULL, 16);
+ cs8900_e2prom_read(addr, &data);
+ printf("0x%2.2X: 0x%4.4X\n", addr, data);
+ } else if (strcmp(argv[2], "write") == 0) {
+ uchar addr; ushort data;
+
+ addr = simple_strtoul(argv[3], NULL, 16);
+ data = simple_strtoul(argv[4], NULL, 16);
+ cs8900_e2prom_write(addr, data);
+ } else if (strcmp(argv[2], "setaddr") == 0) {
+ uchar addr, i, csum; ushort data;
+
+ /* check for valid ethaddr */
+ for (i = 0; i < 6; i++)
+ if (gd->bd->bi_enetaddr[i] != 0)
+ break;
+
+ if (i < 6) {
+ addr = 1;
+ data = 0x2158;
+ cs8900_e2prom_write(addr, data);
+ csum = cs8900_chksum(data);
+ addr++;
+ for (i = 0; i < 6; i+=2) {
+ data = gd->bd->bi_enetaddr[i+1] << 8 |
+ gd->bd->bi_enetaddr[i];
+ cs8900_e2prom_write(addr, data);
+ csum += cs8900_chksum(data);
+ addr++;
+ }
+ /* calculate header link byte */
+ data = 0xA100 | (addr * 2);
+ cs8900_e2prom_write(0, data);
+ csum += cs8900_chksum(data);
+ /* write checksum word */
+ cs8900_e2prom_write(addr, (0 - csum) << 8);
+ } else {
+ printf("\nplease defined 'ethaddr'\n");
+ }
+ } else if (strcmp(argv[2], "dump") == 0) {
+ uchar addr, endaddr, csum; ushort data;
+
+ printf("Dump of CS8900 config device: ");
+ cs8900_e2prom_read(addr, &data);
+ if ((data & 0xE000) == 0xA000) {
+ endaddr = (data & 0x00FF) / 2;
+ csum = cs8900_chksum(data);
+ for (addr = 1; addr <= endaddr; addr++) {
+ cs8900_e2prom_read(addr, &data);
+ printf("\n0x%2.2X: 0x%4.4X", addr, data);
+ csum += cs8900_chksum(data);
+ }
+ printf("\nChecksum: %s", (csum == 0) ? "ok" : "wrong");
+ } else {
+ printf("no valid config found");
+ }
+ printf("\n");
+ }
+
+ return 0;
+ }
+#endif
+#if 0
+ if (strcmp(argv[1], "cantest") == 0) {
+ vcma9_cantest();
+ return 0;
+ }
+ if (strcmp(argv[1], "nandtest") == 0) {
+ vcma9_nandtest();
+ return 0;
+ }
+ if (strcmp(argv[1], "dactest") == 0) {
+ vcma9_dactest();
+ return 0;
+ }
+#endif
+
+ return (do_mplcommon(cmdtp, flag, argc, argv));
+}
+
diff --git a/board/mpl/vcma9/config.mk b/board/mpl/vcma9/config.mk
new file mode 100644
index 000000000..19ef18716
--- /dev/null
+++ b/board/mpl/vcma9/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2002
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# MPL VCMA9 board with S3C2410X (ARM920T) cpu
+#
+# see http://www.mpl.ch/ for more information about the MPL VCMA9
+#
+
+#
+# MPL VCMA9 has 1 bank of 64 MB DRAM
+#
+# 3000'0000 to 3400'0000
+#
+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
+# optionally with a ramdisk at 3080'0000
+#
+# we load ourself to 33F0'0000
+#
+# download area is 3300'0000
+#
+
+
+TEXT_BASE = 0x33F00000
diff --git a/board/mpl/vcma9/flash.c b/board/mpl/vcma9/flash.c
new file mode 100644
index 000000000..c2075da2a
--- /dev/null
+++ b/board/mpl/vcma9/flash.c
@@ -0,0 +1,445 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+ulong myflush(void);
+
+
+#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
+#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+
+#define CMD_READ_ARRAY 0x000000F0
+#define CMD_UNLOCK1 0x000000AA
+#define CMD_UNLOCK2 0x00000055
+#define CMD_ERASE_SETUP 0x00000080
+#define CMD_ERASE_CONFIRM 0x00000030
+#define CMD_PROGRAM 0x000000A0
+#define CMD_UNLOCK_BYPASS 0x00000020
+
+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
+
+#define BIT_ERASE_DONE 0x00000080
+#define BIT_RDY_MASK 0x00000080
+#define BIT_PROGRAM_ERROR 0x00000020
+#define BIT_TIMEOUT 0x80000000 /* our flag */
+
+#define READY 1
+#define ERR 2
+#define TMO 4
+
+/*-----------------------------------------------------------------------
+ */
+
+ulong flash_init(void)
+{
+ int i, j;
+ ulong size = 0;
+
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
+ {
+ ulong flashbase = 0;
+ flash_info[i].flash_id =
+#if defined(CONFIG_AMD_LV400)
+ (AMD_MANUFACT & FLASH_VENDMASK) |
+ (AMD_ID_LV400B & FLASH_TYPEMASK);
+#elif defined(CONFIG_AMD_LV800)
+ (AMD_MANUFACT & FLASH_VENDMASK) |
+ (AMD_ID_LV800B & FLASH_TYPEMASK);
+#else
+#error "Unknown flash configured"
+#endif
+ flash_info[i].size = FLASH_BANK_SIZE;
+ flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+ memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+ if (i == 0)
+ flashbase = PHYS_FLASH_1;
+ else
+ panic("configured to many flash banks!\n");
+ for (j = 0; j < flash_info[i].sector_count; j++)
+ {
+ if (j <= 3)
+ {
+ /* 1st one is 16 KB */
+ if (j == 0)
+ {
+ flash_info[i].start[j] = flashbase + 0;
+ }
+
+ /* 2nd and 3rd are both 8 KB */
+ if ((j == 1) || (j == 2))
+ {
+ flash_info[i].start[j] = flashbase + 0x4000 + (j-1)*0x2000;
+ }
+
+ /* 4th 32 KB */
+ if (j == 3)
+ {
+ flash_info[i].start[j] = flashbase + 0x8000;
+ }
+ }
+ else
+ {
+ flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
+ }
+ }
+ size += flash_info[i].size;
+ }
+
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_FLASH_BASE,
+ CFG_FLASH_BASE + _armboot_end - _armboot_start,
+ &flash_info[0]);
+
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ &flash_info[0]);
+
+ return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t *info)
+{
+ int i;
+
+ switch (info->flash_id & FLASH_VENDMASK)
+ {
+ case (AMD_MANUFACT & FLASH_VENDMASK):
+ printf("AMD: ");
+ break;
+ default:
+ printf("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK)
+ {
+ case (AMD_ID_LV400B & FLASH_TYPEMASK):
+ printf("1x Amd29LV400BB (4Mbit)\n");
+ break;
+ case (AMD_ID_LV800B & FLASH_TYPEMASK):
+ printf("1x Amd29LV800BB (8Mbit)\n");
+ break;
+ default:
+ printf("Unknown Chip Type\n");
+ goto Done;
+ break;
+ }
+
+ printf(" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf(" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; i++)
+ {
+ if ((i % 5) == 0)
+ {
+ printf ("\n ");
+ }
+ printf (" %08lX%s", info->start[i],
+ info->protect[i] ? " (RO)" : " ");
+ }
+ printf ("\n");
+
+Done:
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+ ushort result;
+ int iflag, cflag, prot, sect;
+ int rc = ERR_OK;
+ int chip;
+
+ /* first look for protection bits */
+
+ if (info->flash_id == FLASH_UNKNOWN)
+ return ERR_UNKNOWN_FLASH_TYPE;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ return ERR_INVAL;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) !=
+ (AMD_MANUFACT & FLASH_VENDMASK)) {
+ return ERR_UNKNOWN_FLASH_VENDOR;
+ }
+
+ prot = 0;
+ for (sect=s_first; sect<=s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+ if (prot)
+ return ERR_PROTECTED;
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+ cflag = icache_status();
+ icache_disable();
+ iflag = disable_interrupts();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
+ {
+ printf("Erasing sector %2d ... ", sect);
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked();
+
+ if (info->protect[sect] == 0)
+ { /* not protected */
+ vu_short *addr = (vu_short *)(info->start[sect]);
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ *addr = CMD_ERASE_CONFIRM;
+
+ /* wait until flash is ready */
+ chip = 0;
+
+ do
+ {
+ result = *addr;
+
+ /* check timeout */
+ if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
+ {
+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+ chip = TMO;
+ break;
+ }
+
+ if (!chip && (result & 0xFFFF) & BIT_ERASE_DONE)
+ chip = READY;
+
+ if (!chip && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
+ chip = ERR;
+
+ } while (!chip);
+
+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+ if (chip == ERR)
+ {
+ rc = ERR_PROG_ERROR;
+ goto outahere;
+ }
+ if (chip == TMO)
+ {
+ rc = ERR_TIMOUT;
+ goto outahere;
+ }
+
+ printf("ok.\n");
+ }
+ else /* it was protected */
+ {
+ printf("protected!\n");
+ }
+ }
+
+ if (ctrlc())
+ printf("User Interrupt!\n");
+
+outahere:
+ /* allow flash to settle - wait 10 ms */
+ udelay_masked(10000);
+
+ if (iflag)
+ enable_interrupts();
+
+ if (cflag)
+ icache_enable();
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash
+ */
+
+volatile static int write_hword (flash_info_t *info, ulong dest, ushort data)
+{
+ vu_short *addr = (vu_short *)dest;
+ ushort result;
+ int rc = ERR_OK;
+ int cflag, iflag;
+ int chip;
+
+ /*
+ * Check if Flash is (sufficiently) erased
+ */
+ result = *addr;
+ if ((result & data) != data)
+ return ERR_NOT_ERASED;
+
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+ cflag = icache_status();
+ icache_disable();
+ iflag = disable_interrupts();
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ MEM_FLASH_ADDR1 = CMD_PROGRAM;
+ *addr = data;
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked();
+
+ /* wait until flash is ready */
+ chip = 0;
+ do
+ {
+ result = *addr;
+
+ /* check timeout */
+ if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
+ {
+ chip = ERR | TMO;
+ break;
+ }
+ if (!chip && ((result & 0x80) == (data & 0x80)))
+ chip = READY;
+
+ if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
+ {
+ result = *addr;
+
+ if ((result & 0x80) == (data & 0x80))
+ chip = READY;
+ else
+ chip = ERR;
+ }
+
+ } while (!chip);
+
+ *addr = CMD_READ_ARRAY;
+
+ if (chip == ERR || *addr != data)
+ rc = ERR_PROG_ERROR;
+
+ if (iflag)
+ enable_interrupts();
+
+ if (cflag)
+ icache_enable();
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash.
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+ ulong cp, wp;
+ int l;
+ int i, rc;
+ ushort data;
+
+ wp = (addr & ~1); /* get lower word aligned address */
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i=0, cp=wp; i<l; ++i, ++cp) {
+ data = (data >> 8) | (*(uchar *)cp << 8);
+ }
+ for (; i<2 && cnt>0; ++i) {
+ data = (data >> 8) | (*src++ << 8);
+ --cnt;
+ ++cp;
+ }
+ for (; cnt==0 && i<2; ++i, ++cp) {
+ data = (data >> 8) | (*(uchar *)cp << 8);
+ }
+
+ if ((rc = write_hword(info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 2;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= 2) {
+ data = *((vu_short*)src);
+ if ((rc = write_hword(info, wp, data)) != 0) {
+ return (rc);
+ }
+ src += 2;
+ wp += 2;
+ cnt -= 2;
+ }
+
+ if (cnt == 0) {
+ return ERR_OK;
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
+ data = (data >> 8) | (*src++ << 8);
+ --cnt;
+ }
+ for (; i<2; ++i, ++cp) {
+ data = (data >> 8) | (*(uchar *)cp << 8);
+ }
+
+ return write_hword(info, wp, data);
+}
diff --git a/board/mpl/vcma9/memsetup.S b/board/mpl/vcma9/memsetup.S
new file mode 100644
index 000000000..80721cde2
--- /dev/null
+++ b/board/mpl/vcma9/memsetup.S
@@ -0,0 +1,160 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
+ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
+ *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+
+#include <config.h>
+#include <version.h>
+
+
+/* some parameters for the board */
+
+#define BWSCON 0x48000000
+
+/* BWSCON */
+#define DW8 (0x0)
+#define DW16 (0x1)
+#define DW32 (0x2)
+#define WAIT (0x1<<2)
+#define UBLB (0x1<<3)
+
+#define B1_BWSCON (DW16)
+#define B2_BWSCON (DW32)
+#define B3_BWSCON (DW32)
+#define B4_BWSCON (DW16 + WAIT + UBLB)
+#define B5_BWSCON (DW8 + UBLB)
+#define B6_BWSCON (DW32)
+#define B7_BWSCON (DW32)
+
+/* BANK0CON */
+#define B0_Tacs 0x0 /* 0clk */
+#define B0_Tcos 0x0 /* 0clk */
+#define B0_Tacc 0x5 /* 8clk */
+#define B0_Tcoh 0x0 /* 0clk */
+#define B0_Tah 0x0 /* 0clk */
+#define B0_Tacp 0x0 /* page mode is not used */
+#define B0_PMC 0x0 /* page mode disabled */
+
+/* BANK1CON */
+#define B1_Tacs 0x0 /* 0clk */
+#define B1_Tcos 0x0 /* 0clk */
+#define B1_Tacc 0x5 /* 8clk */
+#define B1_Tcoh 0x0 /* 0clk */
+#define B1_Tah 0x0 /* 0clk */
+#define B1_Tacp 0x0 /* page mode is not used */
+#define B1_PMC 0x0 /* page mode disabled */
+
+#define B2_Tacs 0x3 /* 4clk */
+#define B2_Tcos 0x3 /* 4clk */
+#define B2_Tacc 0x7 /* 14clk */
+#define B2_Tcoh 0x3 /* 4clk */
+#define B2_Tah 0x3 /* 4clk */
+#define B2_Tacp 0x0 /* page mode is not used */
+#define B2_PMC 0x0 /* page mode disabled */
+
+#define B3_Tacs 0x3 /* 4clk */
+#define B3_Tcos 0x3 /* 4clk */
+#define B3_Tacc 0x7 /* 14clk */
+#define B3_Tcoh 0x3 /* 4clk */
+#define B3_Tah 0x3 /* 4clk */
+#define B3_Tacp 0x0 /* page mode is not used */
+#define B3_PMC 0x0 /* page mode disabled */
+
+#define B4_Tacs 0x3 /* 4clk */
+#define B4_Tcos 0x1 /* 1clk */
+#define B4_Tacc 0x7 /* 14clk */
+#define B4_Tcoh 0x1 /* 1clk */
+#define B4_Tah 0x0 /* 0clk */
+#define B4_Tacp 0x0 /* page mode is not used */
+#define B4_PMC 0x0 /* page mode disabled */
+
+#define B5_Tacs 0x0 /* 0clk */
+#define B5_Tcos 0x3 /* 4clk */
+#define B5_Tacc 0x5 /* 8clk */
+#define B5_Tcoh 0x2 /* 2clk */
+#define B5_Tah 0x1 /* 1clk */
+#define B5_Tacp 0x0 /* page mode is not used */
+#define B5_PMC 0x0 /* page mode disabled */
+
+#define B6_MT 0x3 /* SDRAM */
+#define B6_Trcd 0x1 /* 3clk */
+#define B6_SCAN 0x2 /* 10bit */
+
+#define B7_MT 0x3 /* SDRAM */
+#define B7_Trcd 0x1 /* 3clk */
+#define B7_SCAN 0x2 /* 10bit */
+
+/* REFRESH parameter */
+#define REFEN 0x1 /* Refresh enable */
+#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
+#define Trp 0x0 /* 2clk */
+#define Trc 0x3 /* 7clk */
+#define Tchr 0x2 /* 3clk */
+#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
+/**************************************/
+
+_TEXT_BASE:
+ .word TEXT_BASE
+
+.globl memsetup
+memsetup:
+ /* memory control configuration */
+ /* make r0 relative the current location so that it */
+ /* reads SMRDATA out of FLASH rather than memory ! */
+ ldr r0, =SMRDATA
+ ldr r1, _TEXT_BASE
+ sub r0, r0, r1
+ ldr r1, =BWSCON /* Bus Width Status Controller */
+ add r2, r0, #13*4
+0:
+ ldr r3, [r0], #4
+ str r3, [r1], #4
+ cmp r2, r0
+ bne 0b
+
+ /* everything is fine now */
+ mov pc, lr
+
+ .ltorg
+/* the literal pools origin */
+
+SMRDATA:
+ .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
+ .word 0x32
+ .word 0x30
+ .word 0x30
diff --git a/board/mpl/vcma9/u-boot.lds b/board/mpl/vcma9/u-boot.lds
new file mode 100644
index 000000000..8c9c218cc
--- /dev/null
+++ b/board/mpl/vcma9/u-boot.lds
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm920t/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ armboot_end_data = .;
+
+ . = ALIGN(4);
+ .bss : { *(.bss) }
+
+ armboot_end = .;
+}
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
new file mode 100644
index 000000000..8e3552e2b
--- /dev/null
+++ b/board/mpl/vcma9/vcma9.c
@@ -0,0 +1,248 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <s3c2410.h>
+#include <i2c.h>
+
+#include "vcma9.h"
+#include "../common/common_util.h"
+
+/* ------------------------------------------------------------------------- */
+
+#define FCLK_SPEED 1
+
+#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
+#define M_MDIV 0xC3
+#define M_PDIV 0x4
+#define M_SDIV 0x1
+#elif FCLK_SPEED==1 /* Fout = 202.8MHz */
+#define M_MDIV 0xA1
+#define M_PDIV 0x3
+#define M_SDIV 0x1
+#endif
+
+#define USB_CLOCK 1
+
+#if USB_CLOCK==0
+#define U_M_MDIV 0xA1
+#define U_M_PDIV 0x3
+#define U_M_SDIV 0x1
+#elif USB_CLOCK==1
+#define U_M_MDIV 0x48
+#define U_M_PDIV 0x3
+#define U_M_SDIV 0x2
+#endif
+
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ /* to reduce PLL lock time, adjust the LOCKTIME register */
+ rLOCKTIME = 0xFFFFFF;
+
+ /* configure MPLL */
+ rMPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+ /* some delay between MPLL and UPLL */
+ delay (4000);
+
+ /* configure UPLL */
+ rUPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+
+ /* some delay between MPLL and UPLL */
+ delay (8000);
+
+ /* set up the I/O ports */
+ rGPACON = 0x007FFFFF;
+ rGPBCON = 0x002AAAAA;
+ rGPBUP = 0x000002BF;
+ rGPCCON = 0xAAAAAAAA;
+ rGPCUP = 0x0000FFFF;
+ rGPDCON = 0xAAAAAAAA;
+ rGPDUP = 0x0000FFFF;
+ rGPECON = 0xAAAAAAAA;
+ rGPEUP = 0x000037F7;
+ rGPFCON = 0x00000000;
+ rGPFUP = 0x00000000;
+ rGPGCON = 0xFFEAFF5A;
+ rGPGUP = 0x0000F0DC;
+ rGPHCON = 0x0028AAAA;
+ rGPHUP = 0x00000656;
+
+ /* setup correct IRQ modes for NIC */
+ rEXTINT2 = (rEXTINT2 & ~(7<<8)) | (4<<8); /* rising edge mode */
+
+ /* init serial */
+ gd->baudrate = CONFIG_BAUDRATE;
+ gd->have_console = 1;
+ serial_init();
+
+ /* arch number of VCMA9-Board */
+ gd->bd->bi_arch_number = 227;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x30000100;
+
+ icache_enable();
+ dcache_enable();
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+/*
+ * Get some Board/PLD Info
+ */
+
+static uchar Get_PLD_ID(void)
+{
+ return(*(volatile uchar *)PLD_ID_REG);
+}
+
+static uchar Get_PLD_BOARD(void)
+{
+ return(*(volatile uchar *)PLD_BOARD_REG);
+}
+
+static uchar Get_PLD_Version(void)
+{
+ return((Get_PLD_ID() >> 4) & 0x0F);
+}
+
+static uchar Get_PLD_Revision(void)
+{
+ return(Get_PLD_ID() & 0x0F);
+}
+
+static int Get_Board_Config(void)
+{
+ uchar config = Get_PLD_BOARD() & 0x03;
+
+ if (config == 3)
+ return 1;
+ else
+ return 0;
+}
+
+static uchar Get_Board_PCB(void)
+{
+ return(((Get_PLD_BOARD() >> 4) & 0x03) + 'A');
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard(void)
+{
+ unsigned char s[50];
+ unsigned char bc, var, rc;
+ int i;
+ backup_t *b = (backup_t *) s;
+
+ puts("Board: ");
+
+ i = getenv_r("serial#", s, 32);
+ if ((i < 0) || strncmp (s, "VCMA9", 5)) {
+ get_backup_values (b);
+ if (strncmp (b->signature, "MPL\0", 4) != 0) {
+ puts ("### No HW ID - assuming VCMA9");
+ } else {
+ b->serial_name[5] = 0;
+ printf ("%s-%d Rev %c SN: %s", b->serial_name, Get_Board_Config(),
+ Get_Board_PCB(), &b->serial_name[6]);
+ }
+ } else {
+ s[5] = 0;
+ printf ("%s-%d Rev %c SN: %s", s, Get_Board_Config(), Get_Board_PCB(),
+ &s[6]);
+ }
+ printf("\n");
+ return(0);
+}
+
+
+
+void print_vcma9_rev(void)
+{
+ printf("Board: VCMA9-%d Rev: %c (PLD Ver: %d, Rev: %d)\n",
+ Get_Board_Config(), Get_Board_PCB(),
+ Get_PLD_Version(), Get_PLD_Revision());
+}
+
+
+int last_stage_init(void)
+{
+ print_vcma9_rev();
+ show_stdio_dev();
+ check_env();
+ return 0;
+}
+
+/***************************************************************************
+ * some helping routines
+ */
+
+int overwrite_console(void)
+{
+ /* return TRUE if console should be overwritten */
+ return 0;
+}
+
+
+/************************************************************************
+* Print VCMA9 Info
+************************************************************************/
+void print_vcma9_info(void)
+{
+ print_vcma9_rev();
+}
+
+
diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
new file mode 100644
index 000000000..bc0e3a460
--- /dev/null
+++ b/board/mpl/vcma9/vcma9.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, d.mueller@elsoft.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+ /****************************************************************************
+ * Global routines used for VCMA9
+ *****************************************************************************/
+
+
+extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
+
+void print_vcma9_info(void);
+
+
+#define PLD_BASE_ADDRESS 0x2C000100
+#define PLD_ID_REG (PLD_BASE_ADDRESS + 0)
+#define PLD_NIC_REG (PLD_BASE_ADDRESS + 1)
+#define PLD_CAN_REG (PLD_BASE_ADDRESS + 2)
+#define PLD_MISC_REG (PLD_BASE_ADDRESS + 3)
+#define PLD_GPCD_REG (PLD_BASE_ADDRESS + 4)
+#define PLD_BOARD_REG (PLD_BASE_ADDRESS + 5)
+
+
+
diff --git a/board/trab/flash.c b/board/trab/flash.c
index a4f164b46..d86c4bf77 100644
--- a/board/trab/flash.c
+++ b/board/trab/flash.c
@@ -124,11 +124,10 @@ void flash_print_info (flash_info_t * info)
switch (info->flash_id & FLASH_VENDMASK) {
case (FLASH_MAN_AMD & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
+ printf ("AMD "); break;
+ case (FLASH_MAN_FUJ & FLASH_VENDMASK):
+ printf ("FUJITSU "); break;
+ default: printf ("Unknown Vendor "); break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
@@ -477,7 +476,9 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
case AMD_MANUFACT:
info->flash_id = FLASH_MAN_AMD;
break;
-
+ case FUJ_MANUFACT:
+ info->flash_id = FLASH_MAN_FUJ;
+ break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
diff --git a/board/trab/trab.c b/board/trab/trab.c
index 111c86141..e3e8553eb 100644
--- a/board/trab/trab.c
+++ b/board/trab/trab.c
@@ -30,6 +30,13 @@
/* ------------------------------------------------------------------------- */
+#ifdef CFG_BRIGHTNESS
+static void spi_init(void);
+static void wait_transmit_done(void);
+static void tsc2000_write(unsigned int page, unsigned int reg,
+ unsigned int data);
+static void tsc2000_set_brightness(void);
+#endif
#ifdef CONFIG_MODEM_SUPPORT
static int key_pressed(void);
extern void disable_putc(void);
@@ -104,6 +111,10 @@ int board_init ()
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x0c000100;
+ /* Make sure both buzzers are turned off */
+ rPDCON |= 0x5400;
+ rPDDAT &= ~0xE0;
+
#ifdef CONFIG_VFD
vfd_init_clocks();
#endif /* CONFIG_VFD */
@@ -164,6 +175,9 @@ int misc_init_r (void)
free (str);
}
+#ifdef CFG_BRIGHTNESS
+ tsc2000_set_brightness();
+#endif
return (0);
}
@@ -288,3 +302,74 @@ static int key_pressed(void)
return (compare_magic(KBD_DATA, CONFIG_MODEM_KEY_MAGIC) == 0);
}
#endif /* CONFIG_MODEM_SUPPORT */
+
+#ifdef CFG_BRIGHTNESS
+
+#define SET_CS_TOUCH (rPDDAT &= 0x5FF)
+#define CLR_CS_TOUCH (rPDDAT |= 0x200)
+
+static void spi_init(void)
+{
+ int i;
+
+ /* Configure I/O ports. */
+ rPDCON = (rPDCON & 0xF3FFFF) | 0x040000;
+ rPGCON = (rPGCON & 0x0F3FFF) | 0x008000;
+ rPGCON = (rPGCON & 0x0CFFFF) | 0x020000;
+ rPGCON = (rPGCON & 0x03FFFF) | 0x080000;
+
+ CLR_CS_TOUCH;
+
+ rSPPRE = 0x1F; /* Baudrate ca. 514kHz */
+ rSPPIN = 0x01; /* SPI-MOSI holds Level after last bit */
+ rSPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0, CPHA=1 */
+
+ /* Dummy byte ensures clock to be low. */
+ for (i = 0; i < 10; i++) {
+ rSPTDAT = 0xFF;
+ }
+}
+
+static void wait_transmit_done(void)
+{
+ while (!(rSPSTA & 0x01)); /* wait until transfer is done */
+}
+
+static void tsc2000_write(unsigned int page, unsigned int reg,
+ unsigned int data)
+{
+ unsigned int command;
+
+ SET_CS_TOUCH;
+ command = 0x0000;
+ command |= (page << 11);
+ command |= (reg << 5);
+
+ rSPTDAT = (command & 0xFF00) >> 8;
+ wait_transmit_done();
+ rSPTDAT = (command & 0x00FF);
+ wait_transmit_done();
+ rSPTDAT = (data & 0xFF00) >> 8;
+ wait_transmit_done();
+ rSPTDAT = (data & 0x00FF);
+ wait_transmit_done();
+
+ CLR_CS_TOUCH;
+}
+
+static void tsc2000_set_brightness(void)
+{
+ uchar tmp[10];
+ int i, br;
+
+ spi_init();
+ tsc2000_write(1, 2, 0x0); /* Power up DAC */
+
+ i = getenv_r("brightness", tmp, sizeof(tmp));
+ br = (i > 0)
+ ? (int) simple_strtoul (tmp, NULL, 10)
+ : CFG_BRIGHTNESS;
+
+ tsc2000_write(0, 0xb, br & 0xff);
+}
+#endif
diff --git a/board/trab/vfd.c b/board/trab/vfd.c
index fa1194ca7..5e601ef79 100644
--- a/board/trab/vfd.c
+++ b/board/trab/vfd.c
@@ -55,7 +55,6 @@
#define BLAU 0x0C
#define VIOLETT 0X0D
-ulong vfdbase;
ulong frame_buf_size;
#define frame_buf_offs 4
@@ -86,7 +85,7 @@ void init_grid_ctrl(void)
else
val = ~0;
- for (adr = vfdbase; adr <= (vfdbase+7168); adr += 4) {
+ for (adr = gd->fb_base; adr <= (gd->fb_base+7168); adr += 4) {
(*(volatile ulong*)(adr)) = val;
}
@@ -100,7 +99,7 @@ void init_grid_ctrl(void)
/* wrap arround if offset (see manual S3C2400) */
if (bit>=frame_buf_size*8)
bit = bit - (frame_buf_size * 8);
- adr = vfdbase + (bit/32) * 4 + (3 - (bit%32) / 8);
+ adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
bit_nr = bit % 8;
bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
temp=(*(volatile unsigned char*)(adr));
@@ -117,7 +116,7 @@ void init_grid_ctrl(void)
/* wrap arround if offset (see manual S3C2400) */
if (bit>=frame_buf_size*8)
bit = bit-(frame_buf_size*8);
- adr = vfdbase+(bit/32)*4+(3-(bit%32)/8);
+ adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
bit_nr = bit%8;
bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
temp=(*(volatile unsigned char*)(adr));
@@ -138,7 +137,7 @@ void init_grid_ctrl(void)
/* wrap arround if offset (see manual S3C2400) */
if (bit>=frame_buf_size*8)
bit = bit - (frame_buf_size * 8);
- adr = vfdbase + (bit/32) * 4 + (3 - (bit%32) / 8);
+ adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
bit_nr = bit % 8;
bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
temp=(*(volatile unsigned char*)(adr));
@@ -154,7 +153,7 @@ void init_grid_ctrl(void)
/* wrap arround if offset (see manual S3C2400) */
if (bit>=frame_buf_size*8)
bit = bit-(frame_buf_size*8);
- adr = vfdbase+(bit/32)*4+(3-(bit%32)/8);
+ adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
bit_nr = bit%8;
bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
temp=(*(volatile unsigned char*)(adr));
@@ -254,7 +253,7 @@ void create_vfd_table(void)
for(color=0;color<2;color++) {
for(display=0;display<4;display++) {
for(entry=0;entry<2;entry++) {
- unsigned long adr = vfdbase;
+ unsigned long adr = gd->fb_base;
unsigned int bit_nr = 0;
if (vfd_table[x][y][color][display][entry]) {
@@ -266,7 +265,7 @@ void create_vfd_table(void)
*/
if (pixel>=frame_buf_size*8)
pixel = pixel-(frame_buf_size*8);
- adr = vfdbase+(pixel/32)*4+(3-(pixel%32)/8);
+ adr = gd->fb_base+(pixel/32)*4+(3-(pixel%32)/8);
bit_nr = pixel%8;
bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
}
@@ -375,7 +374,7 @@ int vfd_init_clocks(void)
rPCCON = (rPCCON & 0xFFFFFF00)| 0x000000AA;
/* Port-Pins als LCD-Ausgang */
rPDCON = (rPDCON & 0xFFFFFF03)| 0x000000A8;
-#ifdef WITH_VFRAME
+#ifdef CFG_WITH_VFRAME
/* mit VFRAME zum Messen */
rPDCON = (rPDCON & 0xFFFFFF00)| 0x000000AA;
#endif
@@ -385,10 +384,18 @@ int vfd_init_clocks(void)
rLCDCON4 = 0x00000001;
rLCDCON5 = 0x00000440;
rLCDCON1 = 0x00000B75;
+
+ return 0;
}
/*
* initialize LCD-Controller of the S3C2400 for using VFDs
+ *
+ * VFD detection depends on the board revision:
+ * starting from Rev. 200 a type code can be read from the data pins,
+ * driven by some pull-up resistors; all earlier systems must be
+ * manually configured. The type is set in the "vfd_type" environment
+ * variable.
*/
int drv_vfd_init(void)
{
@@ -406,21 +413,15 @@ int drv_vfd_init(void)
/* try to determine display type from the value
* defined by pull-ups
*/
- rPCUP = (rPCUP | 0x000F); /* activate GPC0...GPC3 pullups */
+ rPCUP = (rPCUP & 0xFFF0); /* activate GPC0...GPC3 pullups */
rPCCON = (rPCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as inputs */
+ udelay(10); /* allow signals to settle */
vfd_id = (~rPCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
debug("Detecting Revison of WA4-VFD: ID=0x%X\n", vfd_id);
switch (vfd_id) {
- case 0: /* board revision <= Rev.100 */
-/*-----*/
- gd->vfd_inv_data = 0;
- if (0)
- gd->vfd_type = VFD_TYPE_MN11236;
- else
- gd->vfd_type = VFD_TYPE_T119C;
-/*-----*/
+ case 0: /* board revision < Rev.200 */
if ((tmp = getenv ("vfd_type")) == NULL) {
break;
}
@@ -435,7 +436,7 @@ int drv_vfd_init(void)
gd->vfd_inv_data = 0;
break;
- default: /* default to MN11236, data inverted */
+ default: /* default to MN11236, data inverted */
gd->vfd_type = VFD_TYPE_MN11236;
gd->vfd_inv_data = 1;
setenv ("vfd_type", "MN11236");
@@ -446,7 +447,7 @@ int drv_vfd_init(void)
"unknown",
gd->vfd_inv_data ? ", inverted data" : "");
- vfdbase = gd->fb_base;
+ gd->fb_base = gd->fb_base;
create_vfd_table();
init_grid_ctrl();
@@ -463,9 +464,9 @@ int drv_vfd_init(void)
* see manual S3C2400
*/
/* frame buffer startadr */
- rLCDSADDR1 = vfdbase >> 1;
+ rLCDSADDR1 = gd->fb_base >> 1;
/* frame buffer endadr */
- rLCDSADDR2 = (vfdbase + frame_buf_size) >> 1;
+ rLCDSADDR2 = (gd->fb_base + frame_buf_size) >> 1;
rLCDSADDR3 = ((256/4));
debug ("LCDSADDR1: %lX\n", rLCDSADDR1);
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 2ac576307..f3f960393 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -623,7 +623,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
*/
(*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
}
-#endif /* CONFIG_ARM */
+#endif /* CONFIG_PPC */
static void
do_bootm_netbsd (cmd_tbl_t *cmdtp, int flag,
diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c
index abe62094c..c0ee5de2e 100644
--- a/cpu/mpc8xx/cpu_init.c
+++ b/cpu/mpc8xx/cpu_init.c
@@ -68,6 +68,14 @@ void cpu_init_f (volatile immap_t * immr)
immr->im_sitk.sitk_piscrk = KAPWR_KEY;
immr->im_sit.sit_piscr = CFG_PISCR;
+ /* System integration timers. Don't change EBDF! (15-27) */
+
+ immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
+ reg = immr->im_clkrst.car_sccr;
+ reg &= SCCR_MASK;
+ reg |= CFG_SCCR;
+ immr->im_clkrst.car_sccr = reg;
+
/* PLL (CPU clock) settings (15-30) */
immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
@@ -88,14 +96,6 @@ void cpu_init_f (volatile immap_t * immr)
#endif
immr->im_clkrst.car_plprcr = reg;
- /* System integration timers. Don't change EBDF! (15-27) */
-
- immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
- reg = immr->im_clkrst.car_sccr;
- reg &= SCCR_MASK;
- reg |= CFG_SCCR;
- immr->im_clkrst.car_sccr = reg;
-
/*
* Memory Controller:
*/
diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c
index 7d8db9bf4..4bf0bbd99 100644
--- a/cpu/ppc4xx/i2c.c
+++ b/cpu/ppc4xx/i2c.c
@@ -422,4 +422,23 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
return (i2c_transfer( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
}
+/*-----------------------------------------------------------------------
+ * Read a register
+ */
+uchar i2c_reg_read(uchar i2c_addr, uchar reg)
+{
+ char buf;
+
+ i2c_read(i2c_addr, reg, 1, &buf, 1);
+
+ return(buf);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a register
+ */
+void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
+{
+ i2c_write(i2c_addr, reg, 1, &val, 1);
+}
#endif /* CONFIG_HARD_I2C */
diff --git a/cpu/xscale/start.S b/cpu/xscale/start.S
index 3d9784ebf..95b30e44e 100644
--- a/cpu/xscale/start.S
+++ b/cpu/xscale/start.S
@@ -4,8 +4,10 @@
* Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
* Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
* Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
- * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
- * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
+ * Copyright (C) 2001 Alex Züpke <azu@sysgo.de>
+ * Copyright (C) 2002 Kyle Harris <kharris@nexus-tech.net>
+ * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
+ * Copyright (C) 2003 Kai-Uwe Bloehm <kai-uwe.bloem@auerswald.de>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -26,8 +28,6 @@
* MA 02111-1307 USA
*/
-
-
#include <config.h>
#include <version.h>
@@ -136,13 +136,16 @@ reset:
bl cpu_init_crit /* we do sys-critical inits */
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
+relocate: /* relocate U-Boot to RAM */
+ adr r0, _start /* r0 <- current position of code */
+ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
+ cmp r0, r1 /* don't reloc during debug */
+ beq stack_setup
+
ldr r2, _armboot_start
ldr r3, _armboot_end
- sub r2, r3, r2 /* r2 <- size of armboot */
- ldr r1, _TEXT_BASE
- add r2, r0, r2 /* r2 <- source end address */
+ sub r2, r3, r2 /* r2 <- size of armboot */
+ add r2, r0, r2 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
@@ -151,6 +154,9 @@ copy_loop:
ble copy_loop
/* Set up the stack */
+
+stack_setup:
+
ldr r0, _uboot_reloc /* upper 128 KiB: relocated uboot */
sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
/* FIXME: bdinfo should be here */
@@ -183,7 +189,7 @@ _start_armboot: .word start_armboot
/* */
/****************************************************************************/
- /* Interrupt-Controller base address */
+/* Interrupt-Controller base address */
IC_BASE: .word 0x40d00000
#define ICMR 0x04
@@ -191,19 +197,19 @@ IC_BASE: .word 0x40d00000
RST_BASE: .word 0x40f00030
#define RCSR 0x00
- /* Operating System Timer */
+/* Operating System Timer */
OSTIMER_BASE: .word 0x40a00000
#define OSMR3 0x0C
#define OSCR 0x10
#define OWER 0x18
#define OIER 0x1C
- /* Clock Manager Registers */
-#ifdef CFG_CPUSPEED
+/* Clock Manager Registers */
CC_BASE: .word 0x41300000
#define CCCR 0x00
cpuspeed: .word CFG_CPUSPEED
-#endif
+
+
/* RS: ??? */
.macro CPWAIT
mrc p15,0,r0,c2,c0,0
@@ -219,13 +225,16 @@ cpu_init_crit:
mov r1, #0x00
str r1, [r0, #ICMR]
-#ifdef CFG_CPUSPEED
+#if defined(CFG_CPUSPEED)
+
/* set clock speed */
ldr r0, CC_BASE
ldr r1, cpuspeed
str r1, [r0, #CCCR]
- mov r0, #3
+ mov r0, #2
mcr p14, 0, r0, c6, c0, 0
+
+setspeed_done:
#endif
/*
@@ -429,15 +438,21 @@ fiq:
#endif
-/************************************************************************/
-/* */
-/* Reset function: the PXA250 has no reset function, so we have to */
-/* perform a watchdog timeout to cause a reset. */
-/* */
-/************************************************************************/
+/****************************************************************************/
+/* */
+/* Reset function: the PXA250 doesn't have a reset function, so we have to */
+/* perform a watchdog timeout for a soft reset. */
+/* */
+/****************************************************************************/
+
.align 5
.globl reset_cpu
+
+ /* FIXME: this code is PXA250 specific. How is this handled on */
+ /* other XScale processors? */
+
reset_cpu:
+
/* We set OWE:WME (watchdog enable) and wait until timeout happens */
ldr r0, OSTIMER_BASE
@@ -456,3 +471,4 @@ reset_cpu:
reset_endless:
b reset_endless
+
diff --git a/drivers/Makefile b/drivers/Makefile
index 65de8b5c3..3278cec03 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -32,7 +32,7 @@ OBJS = 3c589.o 5701rls.o bcm570x.o bcm570x_autoneg.o \
eepro100.o i8042.o inca-ip_sw.o \
natsemi.o ns16550.o ns8382x.o ns87308.o \
pci.o pci_auto.o pci_indirect.o \
- pcnet.o sed13806.o serial.o \
+ pcnet.o s3c24x0_i2c.o sed13806.o serial.o \
smc91111.o smiLynxEM.o sym53c8xx.o \
tigon3.o w83c553f.o
diff --git a/drivers/cs8900.c b/drivers/cs8900.c
index 7165d60bd..224ab9590 100644
--- a/drivers/cs8900.c
+++ b/drivers/cs8900.c
@@ -272,6 +272,44 @@ retry:
return 0;
}
+static void cs8900_e2prom_ready(void)
+{
+ while(get_reg(PP_SelfST) & SI_BUSY);
+}
+
+/***********************************************************/
+/* read a 16-bit word out of the EEPROM */
+/***********************************************************/
+
+int cs8900_e2prom_read(unsigned char addr, unsigned short *value)
+{
+ cs8900_e2prom_ready();
+ put_reg(PP_EECMD, EEPROM_READ_CMD | addr);
+ cs8900_e2prom_ready();
+ *value = get_reg(PP_EEData);
+
+ return 0;
+}
+
+
+/***********************************************************/
+/* write a 16-bit word into the EEPROM */
+/***********************************************************/
+
+void cs8900_e2prom_write(unsigned char addr, unsigned short value)
+{
+ cs8900_e2prom_ready();
+ put_reg(PP_EECMD, EEPROM_WRITE_EN);
+ cs8900_e2prom_ready();
+ put_reg(PP_EEData, value);
+ put_reg(PP_EECMD, EEPROM_WRITE_CMD | addr);
+ cs8900_e2prom_ready();
+ put_reg(PP_EECMD, EEPROM_WRITE_DIS);
+ cs8900_e2prom_ready();
+
+ return 0;
+}
+
#endif /* COMMANDS & CFG_NET */
#endif /* CONFIG_DRIVER_CS8900 */
diff --git a/drivers/cs8900.h b/drivers/cs8900.h
index 0a35ba6c7..dbfda3c15 100644
--- a/drivers/cs8900.h
+++ b/drivers/cs8900.h
@@ -250,7 +250,9 @@
#define EEPROM_WRITE_DIS 0x0000
#define EEPROM_WRITE_CMD 0x0100
#define EEPROM_READ_CMD 0x0200
+#define EEPROM_ERASE_CMD 0x0300
-
+extern int cs8900_e2prom_read(uchar, ushort *);
+extern void cs8900_e2prom_write(uchar, ushort);
#endif /* CONFIG_DRIVER_CS8900 */
diff --git a/drivers/inca-ip_sw.c b/drivers/inca-ip_sw.c
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/drivers/inca-ip_sw.c
diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c
index 00177cc28..38b59ecdb 100644
--- a/drivers/pci_auto.c
+++ b/drivers/pci_auto.c
@@ -314,6 +314,16 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
break;
+ case PCI_CLASS_BRIDGE_CARDBUS:
+ /* just do a minimal setup of the bridge, let the OS take care of the rest */
+ pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io);
+
+ DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
+ PCI_DEV(dev));
+
+ hose->current_busno++;
+ break;
+
default:
pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
break;
diff --git a/drivers/s3c24x0_i2c.c b/drivers/s3c24x0_i2c.c
new file mode 100644
index 000000000..bf435c983
--- /dev/null
+++ b/drivers/s3c24x0_i2c.c
@@ -0,0 +1,409 @@
+/*
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, d.mueller@elsoft.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This code should work for both the S3C2400 and the S3C2410
+ * as they seem to have the same I2C controller inside.
+ * The different address mapping is handled by the s3c24xx.h files below.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_DRIVER_S3C24X0_I2C
+
+#if defined(CONFIG_S3C2400)
+#include <s3c2400.h>
+#elif defined(CONFIG_S3C2410)
+#include <s3c2410.h>
+#endif
+#include <i2c.h>
+
+#ifdef CONFIG_HARD_I2C
+
+#define IIC_WRITE 0
+#define IIC_READ 1
+
+#define IIC_OK 0
+#define IIC_NOK 1
+#define IIC_NACK 2
+#define IIC_NOK_LA 3 /* Lost arbitration */
+#define IIC_NOK_TOUT 4 /* time out */
+
+#define IICSTAT_BSY 0x20 /* Busy bit */
+#define IICSTAT_NACK 0x01 /* Nack bit */
+#define IICCON_IRPND 0x10 /* Interrupt pending bit */
+#define IIC_MODE_MT 0xC0 /* Master Transmit Mode */
+#define IIC_MODE_MR 0x80 /* Master Receive Mode */
+#define IIC_START_STOP 0x20 /* START / STOP */
+#define IIC_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
+
+#define IIC_TIMEOUT 1 /* 1 seconde */
+
+
+static int GetIICSDA(void)
+{
+ return (rGPEDAT & 0x8000) >> 15;
+}
+
+static void SetIICSDA(int x)
+{
+ rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15;
+}
+
+static void SetIICSCL(int x)
+{
+ rGPEDAT = (rGPEDAT & ~0x4000) | (x&1) << 14;
+}
+
+
+static int WaitForXfer(void)
+{
+ int i, status;
+
+ i = IIC_TIMEOUT * 1000;
+ status = rIICCON;
+ while ((i > 0) && !(status & IICCON_IRPND)) {
+ udelay(1000);
+ status = rIICCON;
+ i--;
+ }
+
+ return(status & IICCON_IRPND) ? IIC_OK : IIC_NOK_TOUT;
+}
+
+static int IsACK(void)
+{
+ return(!(rIICSTAT & IICSTAT_NACK));
+}
+
+static void ReadWriteByte(void)
+{
+ rIICCON &= ~IICCON_IRPND;
+}
+
+void i2c_init (int speed, int slaveadd)
+{
+ ulong freq, pres = 16, div;
+ int i, status;
+
+ /* wait for some time to give previous transfer a chance to finish */
+
+ i = IIC_TIMEOUT * 1000;
+ status = rIICSTAT;
+ while ((i > 0) && (status & IICSTAT_BSY)) {
+ udelay(1000);
+ status = rIICSTAT;
+ i--;
+ }
+
+ if ((status & IICSTAT_BSY) || GetIICSDA() == 0) {
+ ulong old_gpecon = rGPECON;
+ /* bus still busy probably by (most) previously interrupted transfer */
+
+ /* set IICSDA and IICSCL (GPE15, GPE14) to GPIO */
+ rGPECON = (rGPECON & ~0xF0000000) | 0x10000000;
+
+ /* toggle IICSCL until bus idle */
+ SetIICSCL(0); udelay(1000);
+ i = 10;
+ while ((i > 0) && (GetIICSDA() != 1)) {
+ SetIICSCL(1); udelay(1000);
+ SetIICSCL(0); udelay(1000);
+ i--;
+ }
+ SetIICSCL(1); udelay(1000);
+
+ /* restore pin functions */
+ rGPECON = old_gpecon;
+ }
+
+ /* calculate prescaler and divisor values */
+ freq = get_PCLK();
+ if ((freq / pres / (16+1)) > speed)
+ /* set prescaler to 512 */
+ pres = 512;
+
+ div = 0;
+ while ((freq / pres / (div+1)) > speed)
+ div++;
+
+ /* set prescaler, divisor according to freq, also set
+ ACKGEN, IRQ */
+ rIICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0);
+
+ /* init to SLAVE REVEIVE and set slaveaddr */
+ rIICSTAT = 0;
+ rIICADD = slaveadd;
+ /* program Master Transmit (and implicit STOP) */
+ rIICSTAT = IIC_MODE_MT | IIC_TXRX_ENA;
+
+}
+
+/*
+ cmd_type is 0 for write 1 for read.
+
+ addr_len can take any value from 0-255, it is only limited
+ by the char, we could make it larger if needed. If it is
+ 0 we skip the address write cycle.
+
+*/
+static
+int i2c_transfer(unsigned char cmd_type,
+ unsigned char chip,
+ unsigned char addr[],
+ unsigned char addr_len,
+ unsigned char data[],
+ unsigned short data_len)
+{
+ int i, status, result;
+
+ if (data == 0 || data_len == 0) {
+ /*Don't support data transfer of no length or to address 0*/
+ printf( "i2c_transfer: bad call\n" );
+ return IIC_NOK;
+ }
+
+ //CheckDelay();
+
+ /* Check I2C bus idle */
+ i = IIC_TIMEOUT * 1000;
+ status = rIICSTAT;
+ while ((i > 0) && (status & IICSTAT_BSY)) {
+ udelay(1000);
+ status = rIICSTAT;
+ i--;
+ }
+
+
+ if (status & IICSTAT_BSY) {
+ result = IIC_NOK_TOUT;
+ return(result);
+ }
+
+ rIICCON |= 0x80;
+
+ result = IIC_OK;
+
+ switch (cmd_type) {
+ case IIC_WRITE:
+ if (addr && addr_len) {
+ rIICDS = chip;
+ /* send START */
+ rIICSTAT = IIC_MODE_MT | IIC_TXRX_ENA | IIC_START_STOP;
+ i = 0;
+ while ((i < addr_len) && (result == IIC_OK)) {
+ result = WaitForXfer();
+ rIICDS = addr[i];
+ ReadWriteByte();
+ i++;
+ }
+ i = 0;
+ while ((i < data_len) && (result == IIC_OK)) {
+ result = WaitForXfer();
+ rIICDS = data[i];
+ ReadWriteByte();
+ i++;
+ }
+ } else {
+ rIICDS = chip;
+ /* send START */
+ rIICSTAT = IIC_MODE_MT | IIC_TXRX_ENA | IIC_START_STOP;
+ i = 0;
+ while ((i < data_len) && (result = IIC_OK)) {
+ result = WaitForXfer();
+ rIICDS = data[i];
+ ReadWriteByte();
+ i++;
+ }
+ }
+
+ if (result == IIC_OK)
+ result = WaitForXfer();
+
+ /* send STOP */
+ rIICSTAT = IIC_MODE_MR | IIC_TXRX_ENA;
+ ReadWriteByte();
+ break;
+
+ case IIC_READ:
+ if (addr && addr_len) {
+ rIICSTAT = IIC_MODE_MT | IIC_TXRX_ENA;
+ rIICDS = chip;
+ /* send START */
+ rIICSTAT |= IIC_START_STOP;
+ result = WaitForXfer();
+ if (IsACK()) {
+ i = 0;
+ while ((i < addr_len) && (result == IIC_OK)) {
+ rIICDS = addr[i];
+ ReadWriteByte();
+ result = WaitForXfer();
+ i++;
+ }
+
+ rIICDS = chip;
+ /* resend START */
+ rIICSTAT = IIC_MODE_MR | IIC_TXRX_ENA | IIC_START_STOP;
+ ReadWriteByte();
+ result = WaitForXfer();
+ i = 0;
+ while ((i < data_len) && (result == IIC_OK)) {
+ /* disable ACK for final READ */
+ if (i == data_len - 1)
+ rIICCON &= ~0x80;
+ ReadWriteByte();
+ result = WaitForXfer();
+ data[i] = rIICDS;
+ i++;
+ }
+ } else {
+ result = IIC_NACK;
+ }
+
+ } else {
+ rIICSTAT = IIC_MODE_MR | IIC_TXRX_ENA;
+ rIICDS = chip;
+ /* send START */
+ rIICSTAT |= IIC_START_STOP;
+ result = WaitForXfer();
+
+ if (IsACK()) {
+ i = 0;
+ while ((i < data_len) && (result == IIC_OK)) {
+ /* disable ACK for final READ */
+ if (i == data_len - 1)
+ rIICCON &= ~0x80;
+ ReadWriteByte();
+ result = WaitForXfer();
+ data[i] = rIICDS;
+ i++;
+ }
+ } else {
+ result = IIC_NACK;
+ }
+ }
+
+ /* send STOP */
+ rIICSTAT = IIC_MODE_MR | IIC_TXRX_ENA;
+ ReadWriteByte();
+ break;
+
+ default:
+ printf( "i2c_transfer: bad call\n" );
+ result = IIC_NOK;
+ break;
+ }
+
+ return (result);
+}
+
+int i2c_probe (uchar chip)
+{
+ uchar buf[1];
+
+ buf[0] = 0;
+
+ /*
+ * What is needed is to send the chip address and verify that the
+ * address was <ACK>ed (i.e. there was a chip at that address which
+ * drove the data line low).
+ */
+ return(i2c_transfer (IIC_READ, chip << 1, 0, 0, buf, 1) != IIC_OK);
+}
+
+int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
+{
+ uchar xaddr[4];
+ int ret;
+
+ if ( alen > 4 ) {
+ printf ("I2C read: addr len %d not supported\n", alen);
+ return 1;
+ }
+
+ if ( alen > 0 ) {
+ xaddr[0] = (addr >> 24) & 0xFF;
+ xaddr[1] = (addr >> 16) & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
+ }
+
+
+#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
+ /*
+ * EEPROM chips that implement "address overflow" are ones
+ * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+ * address and the extra bits end up in the "chip address"
+ * bit slots. This makes a 24WC08 (1Kbyte) chip look like
+ * four 256 byte chips.
+ *
+ * Note that we consider the length of the address field to
+ * still be one byte because the extra address bits are
+ * hidden in the chip address.
+ */
+ if( alen > 0 )
+ chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
+#endif
+ if( (ret = i2c_transfer(IIC_READ, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
+ printf( "I2c read: failed %d\n", ret);
+ return 1;
+ }
+ return 0;
+}
+
+int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
+{
+ uchar xaddr[4];
+
+ if ( alen > 4 ) {
+ printf ("I2C write: addr len %d not supported\n", alen);
+ return 1;
+ }
+
+ if ( alen > 0 ) {
+ xaddr[0] = (addr >> 24) & 0xFF;
+ xaddr[1] = (addr >> 16) & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
+ }
+
+#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
+ /*
+ * EEPROM chips that implement "address overflow" are ones
+ * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+ * address and the extra bits end up in the "chip address"
+ * bit slots. This makes a 24WC08 (1Kbyte) chip look like
+ * four 256 byte chips.
+ *
+ * Note that we consider the length of the address field to
+ * still be one byte because the extra address bits are
+ * hidden in the chip address.
+ */
+ if( alen > 0 )
+ chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
+#endif
+ return (i2c_transfer(IIC_WRITE, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
+}
+
+#endif /* CONFIG_HARD_I2C */
+
+#endif /* CONFIG_DRIVER_S3C24X0_I2C */
diff --git a/include/asm-arm/arch-xscale/bitfield.h b/include/asm-arm/arch-xscale/bitfield.h
new file mode 100644
index 000000000..f1f0e3387
--- /dev/null
+++ b/include/asm-arm/arch-xscale/bitfield.h
@@ -0,0 +1,113 @@
+/*
+ * FILE bitfield.h
+ *
+ * Version 1.1
+ * Author Copyright (c) Marc A. Viredaz, 1998
+ * DEC Western Research Laboratory, Palo Alto, CA
+ * Date April 1998 (April 1997)
+ * System Advanced RISC Machine (ARM)
+ * Language C or ARM Assembly
+ * Purpose Definition of macros to operate on bit fields.
+ */
+
+
+
+#ifndef __BITFIELD_H
+#define __BITFIELD_H
+
+#ifndef __ASSEMBLY__
+#define UData(Data) ((unsigned long) (Data))
+#else
+#define UData(Data) (Data)
+#endif
+
+
+/*
+ * MACRO: Fld
+ *
+ * Purpose
+ * The macro "Fld" encodes a bit field, given its size and its shift value
+ * with respect to bit 0.
+ *
+ * Note
+ * A more intuitive way to encode bit fields would have been to use their
+ * mask. However, extracting size and shift value information from a bit
+ * field's mask is cumbersome and might break the assembler (255-character
+ * line-size limit).
+ *
+ * Input
+ * Size Size of the bit field, in number of bits.
+ * Shft Shift value of the bit field with respect to bit 0.
+ *
+ * Output
+ * Fld Encoded bit field.
+ */
+
+#define Fld(Size, Shft) (((Size) << 16) + (Shft))
+
+
+/*
+ * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit
+ *
+ * Purpose
+ * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return
+ * the size, shift value, mask, aligned mask, and first bit of a
+ * bit field.
+ *
+ * Input
+ * Field Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ * FSize Size of the bit field, in number of bits.
+ * FShft Shift value of the bit field with respect to bit 0.
+ * FMsk Mask for the bit field.
+ * FAlnMsk Mask for the bit field, aligned on bit 0.
+ * F1stBit First bit of the bit field.
+ */
+
+#define FSize(Field) ((Field) >> 16)
+#define FShft(Field) ((Field) & 0x0000FFFF)
+#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field))
+#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1)
+#define F1stBit(Field) (UData (1) << FShft (Field))
+
+
+/*
+ * MACRO: FInsrt
+ *
+ * Purpose
+ * The macro "FInsrt" inserts a value into a bit field by shifting the
+ * former appropriately.
+ *
+ * Input
+ * Value Bit-field value.
+ * Field Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ * FInsrt Bit-field value positioned appropriately.
+ */
+
+#define FInsrt(Value, Field) \
+ (UData (Value) << FShft (Field))
+
+
+/*
+ * MACRO: FExtr
+ *
+ * Purpose
+ * The macro "FExtr" extracts the value of a bit field by masking and
+ * shifting it appropriately.
+ *
+ * Input
+ * Data Data containing the bit-field to be extracted.
+ * Field Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ * FExtr Bit-field value.
+ */
+
+#define FExtr(Data, Field) \
+ ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
+
+
+#endif /* __BITFIELD_H */
diff --git a/include/asm-arm/arch-xscale/hardware.h b/include/asm-arm/arch-xscale/hardware.h
new file mode 100644
index 000000000..b84ea48df
--- /dev/null
+++ b/include/asm-arm/arch-xscale/hardware.h
@@ -0,0 +1,153 @@
+/*
+ * linux/include/asm-arm/arch-pxa/hardware.h
+ *
+ * Author: Nicolas Pitre
+ * Created: Jun 15, 2001
+ * Copyright: MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Note: This file was taken from linux-2.4.19-rmk4-pxa1
+ *
+ * - 2003/01/20 implementation specifics activated
+ * Robert Schwebel <r.schwebel@pengutronix.de>
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <linux/config.h>
+#include <asm/mach-types.h>
+
+
+/*
+ * These are statically mapped PCMCIA IO space for designs using it as a
+ * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc.
+ * The actual PCMCIA code is mapping required IO region at run time.
+ */
+#define PCMCIA_IO_0_BASE 0xf6000000
+#define PCMCIA_IO_1_BASE 0xf7000000
+
+
+/*
+ * We requires absolute addresses.
+ */
+#define PCIO_BASE 0
+
+/*
+ * Workarounds for at least 2 errata so far require this.
+ * The mapping is set in mach-pxa/generic.c.
+ */
+#define UNCACHED_PHYS_0 0xff000000
+#define UNCACHED_ADDR UNCACHED_PHYS_0
+
+/*
+ * Intel PXA internal I/O mappings:
+ *
+ * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff
+ * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff
+ * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff
+ */
+
+/* FIXME: Only this does work for u-boot... find out why... [RS] */
+#define UBOOT_REG_FIX 1
+
+#ifndef UBOOT_REG_FIX
+#ifndef __ASSEMBLY__
+
+#define io_p2v(x) ( ((x) | 0xbe000000) ^ (~((x) >> 1) & 0x06000000) )
+#define io_v2p( x ) ( ((x) & 0x41ffffff) ^ ( ((x) & 0x06000000) << 1) )
+
+/*
+ * This __REG() version gives the same results as the one above, except
+ * that we are fooling gcc somehow so it generates far better and smaller
+ * assembly code for access to contigous registers. It's a shame that gcc
+ * doesn't guess this by itself.
+ */
+#include <asm/types.h>
+typedef struct { volatile u32 offset[4096]; } __regbase;
+# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
+# define __REG(x) __REGP(io_p2v(x))
+#endif
+
+/* Let's kick gcc's ass again... */
+# define __REG2(x,y) \
+ ( __builtin_constant_p(y) ? (__REG((x) + (y))) \
+ : (*(volatile u32 *)((u32)&__REG(x) + (y))) )
+
+# define __PREG(x) (io_v2p((u32)&(x)))
+
+#else
+
+# define __REG(x) io_p2v(x)
+# define __PREG(x) io_v2p(x)
+
+#endif
+#endif /* UBOOT_REG_FIX */
+
+#ifdef UBOOT_REG_FIX
+# undef io_p2v
+# undef __REG
+# ifndef __ASSEMBLY__
+# define io_p2v(PhAdd) (PhAdd)
+# define __REG(x) (*((volatile u32 *)io_p2v(x)))
+# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y)))
+# else
+# define __REG(x) (x)
+#endif /* UBOOT_REG_FIX */
+
+#include "pxa-regs.h"
+
+#ifndef __ASSEMBLY__
+
+/*
+ * GPIO edge detection for IRQs:
+ * IRQs are generated on Falling-Edge, Rising-Edge, or both.
+ * This must be called *before* the corresponding IRQ is registered.
+ * Use this instead of directly setting GRER/GFER.
+ */
+#define GPIO_FALLING_EDGE 1
+#define GPIO_RISING_EDGE 2
+#define GPIO_BOTH_EDGES 3
+extern void set_GPIO_IRQ_edge( int gpio_nr, int edge_mask );
+
+/*
+ * Handy routine to set GPIO alternate functions
+ */
+extern void set_GPIO_mode( int gpio_mode );
+
+/*
+ * return current lclk frequency in units of 10kHz
+ */
+extern unsigned int get_lclk_frequency_10khz(void);
+
+#endif
+
+
+/*
+ * Implementation specifics
+ */
+
+#ifdef CONFIG_ARCH_LUBBOCK
+#include "lubbock.h"
+#endif
+
+#ifdef CONFIG_ARCH_PXA_IDP
+#include "idp.h"
+#endif
+
+#ifdef CONFIG_ARCH_PXA_CERF
+#include "cerf.h"
+#endif
+
+#ifdef CONFIG_ARCH_CSB226
+#include "csb226.h"
+#endif
+
+#ifdef CONFIG_ARCH_INNOKOM
+#include "innokom.h"
+#endif
+
+#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
new file mode 100644
index 000000000..08cb0f51c
--- /dev/null
+++ b/include/asm-arm/mach-types.h
@@ -0,0 +1,3367 @@
+/*
+ * This was automagically generated from mach-types!
+ * Do NOT edit
+ */
+
+#ifndef __ASM_ARM_MACH_TYPE_H
+#define __ASM_ARM_MACH_TYPE_H
+
+#include <linux/config.h>
+
+#ifndef __ASSEMBLY__
+/* The type of machine we're running on */
+extern unsigned int __machine_arch_type;
+#endif
+
+/* see arch/arm/kernel/arch.c for a description of these */
+#define MACH_TYPE_EBSA110 0
+#define MACH_TYPE_RISCPC 1
+#define MACH_TYPE_NEXUSPCI 3
+#define MACH_TYPE_EBSA285 4
+#define MACH_TYPE_NETWINDER 5
+#define MACH_TYPE_CATS 6
+#define MACH_TYPE_TBOX 7
+#define MACH_TYPE_CO285 8
+#define MACH_TYPE_CLPS7110 9
+#define MACH_TYPE_ARCHIMEDES 10
+#define MACH_TYPE_A5K 11
+#define MACH_TYPE_ETOILE 12
+#define MACH_TYPE_LACIE_NAS 13
+#define MACH_TYPE_CLPS7500 14
+#define MACH_TYPE_SHARK 15
+#define MACH_TYPE_BRUTUS 16
+#define MACH_TYPE_PERSONAL_SERVER 17
+#define MACH_TYPE_ITSY 18
+#define MACH_TYPE_L7200 19
+#define MACH_TYPE_PLEB 20
+#define MACH_TYPE_INTEGRATOR 21
+#define MACH_TYPE_H3600 22
+#define MACH_TYPE_IXP1200 23
+#define MACH_TYPE_P720T 24
+#define MACH_TYPE_ASSABET 25
+#define MACH_TYPE_VICTOR 26
+#define MACH_TYPE_LART 27
+#define MACH_TYPE_RANGER 28
+#define MACH_TYPE_GRAPHICSCLIENT 29
+#define MACH_TYPE_XP860 30
+#define MACH_TYPE_CERF 31
+#define MACH_TYPE_NANOENGINE 32
+#define MACH_TYPE_FPIC 33
+#define MACH_TYPE_EXTENEX1 34
+#define MACH_TYPE_SHERMAN 35
+#define MACH_TYPE_ACCELENT_SA 36
+#define MACH_TYPE_ACCELENT_L7200 37
+#define MACH_TYPE_NETPORT 38
+#define MACH_TYPE_PANGOLIN 39
+#define MACH_TYPE_YOPY 40
+#define MACH_TYPE_COOLIDGE 41
+#define MACH_TYPE_HUW_WEBPANEL 42
+#define MACH_TYPE_SPOTME 43
+#define MACH_TYPE_FREEBIRD 44
+#define MACH_TYPE_TI925 45
+#define MACH_TYPE_RISCSTATION 46
+#define MACH_TYPE_CAVY 47
+#define MACH_TYPE_JORNADA720 48
+#define MACH_TYPE_OMNIMETER 49
+#define MACH_TYPE_EDB7211 50
+#define MACH_TYPE_CITYGO 51
+#define MACH_TYPE_PFS168 52
+#define MACH_TYPE_SPOT 53
+#define MACH_TYPE_FLEXANET 54
+#define MACH_TYPE_WEBPAL 55
+#define MACH_TYPE_LINPDA 56
+#define MACH_TYPE_ANAKIN 57
+#define MACH_TYPE_MVI 58
+#define MACH_TYPE_JUPITER 59
+#define MACH_TYPE_PSIONW 60
+#define MACH_TYPE_ALN 61
+#define MACH_TYPE_CAMELOT 62
+#define MACH_TYPE_GDS2200 63
+#define MACH_TYPE_PSION_SERIES7 64
+#define MACH_TYPE_XFILE 65
+#define MACH_TYPE_ACCELENT_EP9312 66
+#define MACH_TYPE_IC200 67
+#define MACH_TYPE_CREDITLART 68
+#define MACH_TYPE_HTM 69
+#define MACH_TYPE_IQ80310 70
+#define MACH_TYPE_FREEBOT 71
+#define MACH_TYPE_ENTEL 72
+#define MACH_TYPE_ENP3510 73
+#define MACH_TYPE_TRIZEPS 74
+#define MACH_TYPE_NESA 75
+#define MACH_TYPE_VENUS 76
+#define MACH_TYPE_TARDIS 77
+#define MACH_TYPE_MERCURY 78
+#define MACH_TYPE_EMPEG 79
+#define MACH_TYPE_I80200FCC 80
+#define MACH_TYPE_ITT_CPB 81
+#define MACH_TYPE_SVC 82
+#define MACH_TYPE_ALPHA2 84
+#define MACH_TYPE_ALPHA1 85
+#define MACH_TYPE_NETARM 86
+#define MACH_TYPE_SIMPAD 87
+#define MACH_TYPE_PDA1 88
+#define MACH_TYPE_LUBBOCK 89
+#define MACH_TYPE_ANIKO 90
+#define MACH_TYPE_CLEP7212 91
+#define MACH_TYPE_CS89712 92
+#define MACH_TYPE_WEARARM 93
+#define MACH_TYPE_POSSIO_PX 94
+#define MACH_TYPE_SIDEARM 95
+#define MACH_TYPE_STORK 96
+#define MACH_TYPE_SHANNON 97
+#define MACH_TYPE_ACE 98
+#define MACH_TYPE_BALLYARM 99
+#define MACH_TYPE_SIMPUTER 100
+#define MACH_TYPE_NEXTERM 101
+#define MACH_TYPE_SA1100_ELF 102
+#define MACH_TYPE_GATOR 103
+#define MACH_TYPE_GRANITE 104
+#define MACH_TYPE_CONSUS 105
+#define MACH_TYPE_AAED2000 106
+#define MACH_TYPE_CDB89712 107
+#define MACH_TYPE_GRAPHICSMASTER 108
+#define MACH_TYPE_ADSBITSY 109
+#define MACH_TYPE_PXA_IDP 110
+#define MACH_TYPE_PLCE 111
+#define MACH_TYPE_PT_SYSTEM3 112
+#define MACH_TYPE_MEDALB 113
+#define MACH_TYPE_EAGLE 114
+#define MACH_TYPE_DSC21 115
+#define MACH_TYPE_DSC24 116
+#define MACH_TYPE_TI5472 117
+#define MACH_TYPE_AUTCPU12 118
+#define MACH_TYPE_UENGINE 119
+#define MACH_TYPE_BLUESTEM 120
+#define MACH_TYPE_XINGU8 121
+#define MACH_TYPE_BUSHSTB 122
+#define MACH_TYPE_EPSILON1 123
+#define MACH_TYPE_BALLOON 124
+#define MACH_TYPE_PUPPY 125
+#define MACH_TYPE_ELROY 126
+#define MACH_TYPE_GMS720 127
+#define MACH_TYPE_S24X 128
+#define MACH_TYPE_JTEL_CLEP7312 129
+#define MACH_TYPE_CX821XX 130
+#define MACH_TYPE_EDB7312 131
+#define MACH_TYPE_BSA1110 132
+#define MACH_TYPE_POWERPIN 133
+#define MACH_TYPE_OPENARM 134
+#define MACH_TYPE_WHITECHAPEL 135
+#define MACH_TYPE_H3100 136
+#define MACH_TYPE_H3800 137
+#define MACH_TYPE_BLUE_V1 138
+#define MACH_TYPE_PXA_CERF 139
+#define MACH_TYPE_ARM7TEVB 140
+#define MACH_TYPE_D7400 141
+#define MACH_TYPE_PIRANHA 142
+#define MACH_TYPE_SBCAMELOT 143
+#define MACH_TYPE_KINGS 144
+#define MACH_TYPE_SMDK2400 145
+#define MACH_TYPE_COLLIE 146
+#define MACH_TYPE_IDR 147
+#define MACH_TYPE_BADGE4 148
+#define MACH_TYPE_WEBNET 149
+#define MACH_TYPE_D7300 150
+#define MACH_TYPE_CEP 151
+#define MACH_TYPE_FORTUNET 152
+#define MACH_TYPE_VC547X 153
+#define MACH_TYPE_FILEWALKER 154
+#define MACH_TYPE_NETGATEWAY 155
+#define MACH_TYPE_SYMBOL2800 156
+#define MACH_TYPE_SUNS 157
+#define MACH_TYPE_FRODO 158
+#define MACH_TYPE_MACH_TYTE_MS301 159
+#define MACH_TYPE_MX1ADS 160
+#define MACH_TYPE_H7201 161
+#define MACH_TYPE_H7202 162
+#define MACH_TYPE_AMICO 163
+#define MACH_TYPE_IAM 164
+#define MACH_TYPE_TT530 165
+#define MACH_TYPE_SAM2400 166
+#define MACH_TYPE_JORNADA56X 167
+#define MACH_TYPE_ACTIVE 168
+#define MACH_TYPE_IQ80321 169
+#define MACH_TYPE_WID 170
+#define MACH_TYPE_SABINAL 171
+#define MACH_TYPE_IXP425_MATACUMBE 172
+#define MACH_TYPE_MINIPRINT 173
+#define MACH_TYPE_ADM510X 174
+#define MACH_TYPE_SVS200 175
+#define MACH_TYPE_ATG_TCU 176
+#define MACH_TYPE_JORNADA820 177
+#define MACH_TYPE_S3C44B0 178
+#define MACH_TYPE_MARGIS2 179
+#define MACH_TYPE_KS8695 180
+#define MACH_TYPE_BRH 181
+#define MACH_TYPE_S3C2410 182
+#define MACH_TYPE_POSSIO_PX30 183
+#define MACH_TYPE_S3C2800 184
+#define MACH_TYPE_FLEETWOOD 185
+#define MACH_TYPE_OMAHA 186
+#define MACH_TYPE_TA7 187
+#define MACH_TYPE_NOVA 188
+#define MACH_TYPE_HMK 189
+#define MACH_TYPE_INPHINITY 190
+#define MACH_TYPE_FESTER 191
+#define MACH_TYPE_GPI 192
+#define MACH_TYPE_SMDK2410 193
+#define MACH_TYPE_PREMIUM 194
+#define MACH_TYPE_NEXIO 195
+#define MACH_TYPE_BITBOX 196
+#define MACH_TYPE_G200 197
+#define MACH_TYPE_GILL 198
+#define MACH_TYPE_PXA_MERCURY 199
+#define MACH_TYPE_CEIVA 200
+#define MACH_TYPE_FRET 201
+#define MACH_TYPE_EMAILPHONE 202
+#define MACH_TYPE_H3900 203
+#define MACH_TYPE_PXA1 204
+#define MACH_TYPE_KOAN369 205
+#define MACH_TYPE_COGENT 206
+#define MACH_TYPE_ESL_SIMPUTER 207
+#define MACH_TYPE_ESL_SIMPUTER_CLR 208
+#define MACH_TYPE_ESL_SIMPUTER_BW 209
+#define MACH_TYPE_HHP_CRADLE 210
+#define MACH_TYPE_HE500 211
+#define MACH_TYPE_INHANDELF2 212
+#define MACH_TYPE_INHANDFTIP 213
+#define MACH_TYPE_DNP1110 214
+#define MACH_TYPE_PNP1110 215
+#define MACH_TYPE_CSB226 216
+#define MACH_TYPE_ARNOLD 217
+#define MACH_TYPE_PSIBOARD 218
+#define MACH_TYPE_JZ8028 219
+#define MACH_TYPE_IPAQ3 220
+#define MACH_TYPE_FORTE 221
+#define MACH_TYPE_ACAM 222
+#define MACH_TYPE_ABOX 223
+#define MACH_TYPE_ATMEL 224
+#define MACH_TYPE_SITSANG 225
+#define MACH_TYPE_CPU1110LCDNET 226
+#define MACH_TYPE_MPL_VCMA9 227
+#define MACH_TYPE_OPUS_A1 228
+#define MACH_TYPE_DAYTONA 229
+#define MACH_TYPE_KILLBEAR 230
+#define MACH_TYPE_YOHO 231
+#define MACH_TYPE_JASPER 232
+#define MACH_TYPE_DSC25 233
+#define MACH_TYPE_INNOVATOR 234
+#define MACH_TYPE_RAMSES 235
+#define MACH_TYPE_S28X 236
+#define MACH_TYPE_MPORT3 237
+#define MACH_TYPE_PXA_EAGLE250 238
+#define MACH_TYPE_PDB 239
+#define MACH_TYPE_BLUE_2G 240
+#define MACH_TYPE_BLUEARCH 241
+#define MACH_TYPE_IXMB2400 242
+#define MACH_TYPE_IXMB2800 243
+#define MACH_TYPE_EXPLORER 244
+#define MACH_TYPE_IXDP425 245
+#define MACH_TYPE_CHIMP 246
+#define MACH_TYPE_STORK_NEST 247
+#define MACH_TYPE_STORK_EGG 248
+#define MACH_TYPE_WISMO 249
+#define MACH_TYPE_EZLINX 250
+#define MACH_TYPE_AT91 251
+#define MACH_TYPE_ORION 252
+#define MACH_TYPE_NEPTUNE 253
+#define MACH_TYPE_HACKKIT 254
+#define MACH_TYPE_PXA_WINS30 255
+#define MACH_TYPE_LAVINNA 256
+#define MACH_TYPE_PXA_UENGINE 257
+#define MACH_TYPE_INNOKOM 258
+
+#ifdef CONFIG_ARCH_EBSA110
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EBSA110
+# endif
+# define machine_is_ebsa110() (machine_arch_type == MACH_TYPE_EBSA110)
+#else
+# define machine_is_ebsa110() (0)
+#endif
+
+#ifdef CONFIG_ARCH_RPC
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_RISCPC
+# endif
+# define machine_is_riscpc() (machine_arch_type == MACH_TYPE_RISCPC)
+#else
+# define machine_is_riscpc() (0)
+#endif
+
+#ifdef CONFIG_ARCH_NEXUSPCI
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NEXUSPCI
+# endif
+# define machine_is_nexuspci() (machine_arch_type == MACH_TYPE_NEXUSPCI)
+#else
+# define machine_is_nexuspci() (0)
+#endif
+
+#ifdef CONFIG_ARCH_EBSA285
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EBSA285
+# endif
+# define machine_is_ebsa285() (machine_arch_type == MACH_TYPE_EBSA285)
+#else
+# define machine_is_ebsa285() (0)
+#endif
+
+#ifdef CONFIG_ARCH_NETWINDER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NETWINDER
+# endif
+# define machine_is_netwinder() (machine_arch_type == MACH_TYPE_NETWINDER)
+#else
+# define machine_is_netwinder() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CATS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CATS
+# endif
+# define machine_is_cats() (machine_arch_type == MACH_TYPE_CATS)
+#else
+# define machine_is_cats() (0)
+#endif
+
+#ifdef CONFIG_ARCH_TBOX
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TBOX
+# endif
+# define machine_is_tbox() (machine_arch_type == MACH_TYPE_TBOX)
+#else
+# define machine_is_tbox() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CO285
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CO285
+# endif
+# define machine_is_co285() (machine_arch_type == MACH_TYPE_CO285)
+#else
+# define machine_is_co285() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CLPS7110
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CLPS7110
+# endif
+# define machine_is_clps7110() (machine_arch_type == MACH_TYPE_CLPS7110)
+#else
+# define machine_is_clps7110() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ARC
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ARCHIMEDES
+# endif
+# define machine_is_archimedes() (machine_arch_type == MACH_TYPE_ARCHIMEDES)
+#else
+# define machine_is_archimedes() (0)
+#endif
+
+#ifdef CONFIG_ARCH_A5K
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_A5K
+# endif
+# define machine_is_a5k() (machine_arch_type == MACH_TYPE_A5K)
+#else
+# define machine_is_a5k() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ETOILE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ETOILE
+# endif
+# define machine_is_etoile() (machine_arch_type == MACH_TYPE_ETOILE)
+#else
+# define machine_is_etoile() (0)
+#endif
+
+#ifdef CONFIG_ARCH_LACIE_NAS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_LACIE_NAS
+# endif
+# define machine_is_lacie_nas() (machine_arch_type == MACH_TYPE_LACIE_NAS)
+#else
+# define machine_is_lacie_nas() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CLPS7500
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CLPS7500
+# endif
+# define machine_is_clps7500() (machine_arch_type == MACH_TYPE_CLPS7500)
+#else
+# define machine_is_clps7500() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SHARK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SHARK
+# endif
+# define machine_is_shark() (machine_arch_type == MACH_TYPE_SHARK)
+#else
+# define machine_is_shark() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BRUTUS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BRUTUS
+# endif
+# define machine_is_brutus() (machine_arch_type == MACH_TYPE_BRUTUS)
+#else
+# define machine_is_brutus() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PERSONAL_SERVER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PERSONAL_SERVER
+# endif
+# define machine_is_personal_server() (machine_arch_type == MACH_TYPE_PERSONAL_SERVER)
+#else
+# define machine_is_personal_server() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ITSY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ITSY
+# endif
+# define machine_is_itsy() (machine_arch_type == MACH_TYPE_ITSY)
+#else
+# define machine_is_itsy() (0)
+#endif
+
+#ifdef CONFIG_ARCH_L7200
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_L7200
+# endif
+# define machine_is_l7200() (machine_arch_type == MACH_TYPE_L7200)
+#else
+# define machine_is_l7200() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PLEB
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PLEB
+# endif
+# define machine_is_pleb() (machine_arch_type == MACH_TYPE_PLEB)
+#else
+# define machine_is_pleb() (0)
+#endif
+
+#ifdef CONFIG_ARCH_INTEGRATOR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_INTEGRATOR
+# endif
+# define machine_is_integrator() (machine_arch_type == MACH_TYPE_INTEGRATOR)
+#else
+# define machine_is_integrator() (0)
+#endif
+
+#ifdef CONFIG_SA1100_H3600
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_H3600
+# endif
+# define machine_is_h3600() (machine_arch_type == MACH_TYPE_H3600)
+#else
+# define machine_is_h3600() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IXP1200
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IXP1200
+# endif
+# define machine_is_ixp1200() (machine_arch_type == MACH_TYPE_IXP1200)
+#else
+# define machine_is_ixp1200() (0)
+#endif
+
+#ifdef CONFIG_ARCH_P720T
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_P720T
+# endif
+# define machine_is_p720t() (machine_arch_type == MACH_TYPE_P720T)
+#else
+# define machine_is_p720t() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ASSABET
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ASSABET
+# endif
+# define machine_is_assabet() (machine_arch_type == MACH_TYPE_ASSABET)
+#else
+# define machine_is_assabet() (0)
+#endif
+
+#ifdef CONFIG_SA1100_VICTOR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_VICTOR
+# endif
+# define machine_is_victor() (machine_arch_type == MACH_TYPE_VICTOR)
+#else
+# define machine_is_victor() (0)
+#endif
+
+#ifdef CONFIG_SA1100_LART
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_LART
+# endif
+# define machine_is_lart() (machine_arch_type == MACH_TYPE_LART)
+#else
+# define machine_is_lart() (0)
+#endif
+
+#ifdef CONFIG_SA1100_RANGER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_RANGER
+# endif
+# define machine_is_ranger() (machine_arch_type == MACH_TYPE_RANGER)
+#else
+# define machine_is_ranger() (0)
+#endif
+
+#ifdef CONFIG_SA1100_GRAPHICSCLIENT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GRAPHICSCLIENT
+# endif
+# define machine_is_graphicsclient() (machine_arch_type == MACH_TYPE_GRAPHICSCLIENT)
+#else
+# define machine_is_graphicsclient() (0)
+#endif
+
+#ifdef CONFIG_SA1100_XP860
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_XP860
+# endif
+# define machine_is_xp860() (machine_arch_type == MACH_TYPE_XP860)
+#else
+# define machine_is_xp860() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CERF
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CERF
+# endif
+# define machine_is_cerf() (machine_arch_type == MACH_TYPE_CERF)
+#else
+# define machine_is_cerf() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NANOENGINE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NANOENGINE
+# endif
+# define machine_is_nanoengine() (machine_arch_type == MACH_TYPE_NANOENGINE)
+#else
+# define machine_is_nanoengine() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FPIC
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FPIC
+# endif
+# define machine_is_fpic() (machine_arch_type == MACH_TYPE_FPIC)
+#else
+# define machine_is_fpic() (0)
+#endif
+
+#ifdef CONFIG_SA1100_EXTENEX1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EXTENEX1
+# endif
+# define machine_is_extenex1() (machine_arch_type == MACH_TYPE_EXTENEX1)
+#else
+# define machine_is_extenex1() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SHERMAN
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SHERMAN
+# endif
+# define machine_is_sherman() (machine_arch_type == MACH_TYPE_SHERMAN)
+#else
+# define machine_is_sherman() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ACCELENT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ACCELENT_SA
+# endif
+# define machine_is_accelent_sa() (machine_arch_type == MACH_TYPE_ACCELENT_SA)
+#else
+# define machine_is_accelent_sa() (0)
+#endif
+
+#ifdef CONFIG_ARCH_L7200_ACCELENT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ACCELENT_L7200
+# endif
+# define machine_is_accelent_l7200() (machine_arch_type == MACH_TYPE_ACCELENT_L7200)
+#else
+# define machine_is_accelent_l7200() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NETPORT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NETPORT
+# endif
+# define machine_is_netport() (machine_arch_type == MACH_TYPE_NETPORT)
+#else
+# define machine_is_netport() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PANGOLIN
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PANGOLIN
+# endif
+# define machine_is_pangolin() (machine_arch_type == MACH_TYPE_PANGOLIN)
+#else
+# define machine_is_pangolin() (0)
+#endif
+
+#ifdef CONFIG_SA1100_YOPY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_YOPY
+# endif
+# define machine_is_yopy() (machine_arch_type == MACH_TYPE_YOPY)
+#else
+# define machine_is_yopy() (0)
+#endif
+
+#ifdef CONFIG_SA1100_COOLIDGE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_COOLIDGE
+# endif
+# define machine_is_coolidge() (machine_arch_type == MACH_TYPE_COOLIDGE)
+#else
+# define machine_is_coolidge() (0)
+#endif
+
+#ifdef CONFIG_SA1100_HUW_WEBPANEL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_HUW_WEBPANEL
+# endif
+# define machine_is_huw_webpanel() (machine_arch_type == MACH_TYPE_HUW_WEBPANEL)
+#else
+# define machine_is_huw_webpanel() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SPOTME
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SPOTME
+# endif
+# define machine_is_spotme() (machine_arch_type == MACH_TYPE_SPOTME)
+#else
+# define machine_is_spotme() (0)
+#endif
+
+#ifdef CONFIG_ARCH_FREEBIRD
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FREEBIRD
+# endif
+# define machine_is_freebird() (machine_arch_type == MACH_TYPE_FREEBIRD)
+#else
+# define machine_is_freebird() (0)
+#endif
+
+#ifdef CONFIG_ARCH_TI925
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TI925
+# endif
+# define machine_is_ti925() (machine_arch_type == MACH_TYPE_TI925)
+#else
+# define machine_is_ti925() (0)
+#endif
+
+#ifdef CONFIG_ARCH_RISCSTATION
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_RISCSTATION
+# endif
+# define machine_is_riscstation() (machine_arch_type == MACH_TYPE_RISCSTATION)
+#else
+# define machine_is_riscstation() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CAVY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CAVY
+# endif
+# define machine_is_cavy() (machine_arch_type == MACH_TYPE_CAVY)
+#else
+# define machine_is_cavy() (0)
+#endif
+
+#ifdef CONFIG_SA1100_JORNADA720
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JORNADA720
+# endif
+# define machine_is_jornada720() (machine_arch_type == MACH_TYPE_JORNADA720)
+#else
+# define machine_is_jornada720() (0)
+#endif
+
+#ifdef CONFIG_SA1100_OMNIMETER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_OMNIMETER
+# endif
+# define machine_is_omnimeter() (machine_arch_type == MACH_TYPE_OMNIMETER)
+#else
+# define machine_is_omnimeter() (0)
+#endif
+
+#ifdef CONFIG_ARCH_EDB7211
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EDB7211
+# endif
+# define machine_is_edb7211() (machine_arch_type == MACH_TYPE_EDB7211)
+#else
+# define machine_is_edb7211() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CITYGO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CITYGO
+# endif
+# define machine_is_citygo() (machine_arch_type == MACH_TYPE_CITYGO)
+#else
+# define machine_is_citygo() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PFS168
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PFS168
+# endif
+# define machine_is_pfs168() (machine_arch_type == MACH_TYPE_PFS168)
+#else
+# define machine_is_pfs168() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SPOT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SPOT
+# endif
+# define machine_is_spot() (machine_arch_type == MACH_TYPE_SPOT)
+#else
+# define machine_is_spot() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FLEXANET
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FLEXANET
+# endif
+# define machine_is_flexanet() (machine_arch_type == MACH_TYPE_FLEXANET)
+#else
+# define machine_is_flexanet() (0)
+#endif
+
+#ifdef CONFIG_ARCH_WEBPAL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_WEBPAL
+# endif
+# define machine_is_webpal() (machine_arch_type == MACH_TYPE_WEBPAL)
+#else
+# define machine_is_webpal() (0)
+#endif
+
+#ifdef CONFIG_SA1100_LINPDA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_LINPDA
+# endif
+# define machine_is_linpda() (machine_arch_type == MACH_TYPE_LINPDA)
+#else
+# define machine_is_linpda() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ANAKIN
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ANAKIN
+# endif
+# define machine_is_anakin() (machine_arch_type == MACH_TYPE_ANAKIN)
+#else
+# define machine_is_anakin() (0)
+#endif
+
+#ifdef CONFIG_SA1100_MVI
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MVI
+# endif
+# define machine_is_mvi() (machine_arch_type == MACH_TYPE_MVI)
+#else
+# define machine_is_mvi() (0)
+#endif
+
+#ifdef CONFIG_SA1100_JUPITER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JUPITER
+# endif
+# define machine_is_jupiter() (machine_arch_type == MACH_TYPE_JUPITER)
+#else
+# define machine_is_jupiter() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PSIONW
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PSIONW
+# endif
+# define machine_is_psionw() (machine_arch_type == MACH_TYPE_PSIONW)
+#else
+# define machine_is_psionw() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ALN
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ALN
+# endif
+# define machine_is_aln() (machine_arch_type == MACH_TYPE_ALN)
+#else
+# define machine_is_aln() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CAMELOT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CAMELOT
+# endif
+# define machine_is_epxa() (machine_arch_type == MACH_TYPE_CAMELOT)
+#else
+# define machine_is_epxa() (0)
+#endif
+
+#ifdef CONFIG_SA1100_GDS2200
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GDS2200
+# endif
+# define machine_is_gds2200() (machine_arch_type == MACH_TYPE_GDS2200)
+#else
+# define machine_is_gds2200() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PSION_SERIES7
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PSION_SERIES7
+# endif
+# define machine_is_psion_series7() (machine_arch_type == MACH_TYPE_PSION_SERIES7)
+#else
+# define machine_is_psion_series7() (0)
+#endif
+
+#ifdef CONFIG_SA1100_XFILE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_XFILE
+# endif
+# define machine_is_xfile() (machine_arch_type == MACH_TYPE_XFILE)
+#else
+# define machine_is_xfile() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ACCELENT_EP9312
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ACCELENT_EP9312
+# endif
+# define machine_is_accelent_ep9312() (machine_arch_type == MACH_TYPE_ACCELENT_EP9312)
+#else
+# define machine_is_accelent_ep9312() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IC200
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IC200
+# endif
+# define machine_is_ic200() (machine_arch_type == MACH_TYPE_IC200)
+#else
+# define machine_is_ic200() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CREDITLART
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CREDITLART
+# endif
+# define machine_is_creditlart() (machine_arch_type == MACH_TYPE_CREDITLART)
+#else
+# define machine_is_creditlart() (0)
+#endif
+
+#ifdef CONFIG_SA1100_HTM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_HTM
+# endif
+# define machine_is_htm() (machine_arch_type == MACH_TYPE_HTM)
+#else
+# define machine_is_htm() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IQ80310
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IQ80310
+# endif
+# define machine_is_iq80310() (machine_arch_type == MACH_TYPE_IQ80310)
+#else
+# define machine_is_iq80310() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FREEBOT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FREEBOT
+# endif
+# define machine_is_freebot() (machine_arch_type == MACH_TYPE_FREEBOT)
+#else
+# define machine_is_freebot() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ENTEL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ENTEL
+# endif
+# define machine_is_entel() (machine_arch_type == MACH_TYPE_ENTEL)
+#else
+# define machine_is_entel() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ENP3510
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ENP3510
+# endif
+# define machine_is_enp3510() (machine_arch_type == MACH_TYPE_ENP3510)
+#else
+# define machine_is_enp3510() (0)
+#endif
+
+#ifdef CONFIG_SA1100_TRIZEPS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TRIZEPS
+# endif
+# define machine_is_trizeps() (machine_arch_type == MACH_TYPE_TRIZEPS)
+#else
+# define machine_is_trizeps() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NESA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NESA
+# endif
+# define machine_is_nesa() (machine_arch_type == MACH_TYPE_NESA)
+#else
+# define machine_is_nesa() (0)
+#endif
+
+#ifdef CONFIG_ARCH_VENUS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_VENUS
+# endif
+# define machine_is_venus() (machine_arch_type == MACH_TYPE_VENUS)
+#else
+# define machine_is_venus() (0)
+#endif
+
+#ifdef CONFIG_ARCH_TARDIS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TARDIS
+# endif
+# define machine_is_tardis() (machine_arch_type == MACH_TYPE_TARDIS)
+#else
+# define machine_is_tardis() (0)
+#endif
+
+#ifdef CONFIG_ARCH_MERCURY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MERCURY
+# endif
+# define machine_is_mercury() (machine_arch_type == MACH_TYPE_MERCURY)
+#else
+# define machine_is_mercury() (0)
+#endif
+
+#ifdef CONFIG_SA1100_EMPEG
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EMPEG
+# endif
+# define machine_is_empeg() (machine_arch_type == MACH_TYPE_EMPEG)
+#else
+# define machine_is_empeg() (0)
+#endif
+
+#ifdef CONFIG_ARCH_I80200FCC
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_I80200FCC
+# endif
+# define machine_is_adi_evb() (machine_arch_type == MACH_TYPE_I80200FCC)
+#else
+# define machine_is_adi_evb() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ITT_CPB
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ITT_CPB
+# endif
+# define machine_is_itt_cpb() (machine_arch_type == MACH_TYPE_ITT_CPB)
+#else
+# define machine_is_itt_cpb() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SVC
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SVC
+# endif
+# define machine_is_svc() (machine_arch_type == MACH_TYPE_SVC)
+#else
+# define machine_is_svc() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ALPHA2
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ALPHA2
+# endif
+# define machine_is_alpha2() (machine_arch_type == MACH_TYPE_ALPHA2)
+#else
+# define machine_is_alpha2() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ALPHA1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ALPHA1
+# endif
+# define machine_is_alpha1() (machine_arch_type == MACH_TYPE_ALPHA1)
+#else
+# define machine_is_alpha1() (0)
+#endif
+
+#ifdef CONFIG_ARCH_NETARM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NETARM
+# endif
+# define machine_is_netarm() (machine_arch_type == MACH_TYPE_NETARM)
+#else
+# define machine_is_netarm() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SIMPAD
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SIMPAD
+# endif
+# define machine_is_simpad() (machine_arch_type == MACH_TYPE_SIMPAD)
+#else
+# define machine_is_simpad() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PDA1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PDA1
+# endif
+# define machine_is_pda1() (machine_arch_type == MACH_TYPE_PDA1)
+#else
+# define machine_is_pda1() (0)
+#endif
+
+#ifdef CONFIG_ARCH_LUBBOCK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_LUBBOCK
+# endif
+# define machine_is_lubbock() (machine_arch_type == MACH_TYPE_LUBBOCK)
+#else
+# define machine_is_lubbock() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ANIKO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ANIKO
+# endif
+# define machine_is_aniko() (machine_arch_type == MACH_TYPE_ANIKO)
+#else
+# define machine_is_aniko() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CLEP7212
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CLEP7212
+# endif
+# define machine_is_clep7212() (machine_arch_type == MACH_TYPE_CLEP7212)
+#else
+# define machine_is_clep7212() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CS89712
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CS89712
+# endif
+# define machine_is_cs89712() (machine_arch_type == MACH_TYPE_CS89712)
+#else
+# define machine_is_cs89712() (0)
+#endif
+
+#ifdef CONFIG_SA1100_WEARARM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_WEARARM
+# endif
+# define machine_is_weararm() (machine_arch_type == MACH_TYPE_WEARARM)
+#else
+# define machine_is_weararm() (0)
+#endif
+
+#ifdef CONFIG_SA1100_POSSIO_PX
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_POSSIO_PX
+# endif
+# define machine_is_possio_px() (machine_arch_type == MACH_TYPE_POSSIO_PX)
+#else
+# define machine_is_possio_px() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SIDEARM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SIDEARM
+# endif
+# define machine_is_sidearm() (machine_arch_type == MACH_TYPE_SIDEARM)
+#else
+# define machine_is_sidearm() (0)
+#endif
+
+#ifdef CONFIG_SA1100_STORK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_STORK
+# endif
+# define machine_is_stork() (machine_arch_type == MACH_TYPE_STORK)
+#else
+# define machine_is_stork() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SHANNON
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SHANNON
+# endif
+# define machine_is_shannon() (machine_arch_type == MACH_TYPE_SHANNON)
+#else
+# define machine_is_shannon() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ACE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ACE
+# endif
+# define machine_is_ace() (machine_arch_type == MACH_TYPE_ACE)
+#else
+# define machine_is_ace() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BALLYARM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BALLYARM
+# endif
+# define machine_is_ballyarm() (machine_arch_type == MACH_TYPE_BALLYARM)
+#else
+# define machine_is_ballyarm() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SIMPUTER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SIMPUTER
+# endif
+# define machine_is_simputer() (machine_arch_type == MACH_TYPE_SIMPUTER)
+#else
+# define machine_is_simputer() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NEXTERM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NEXTERM
+# endif
+# define machine_is_nexterm() (machine_arch_type == MACH_TYPE_NEXTERM)
+#else
+# define machine_is_nexterm() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SA1100_ELF
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SA1100_ELF
+# endif
+# define machine_is_sa1100_elf() (machine_arch_type == MACH_TYPE_SA1100_ELF)
+#else
+# define machine_is_sa1100_elf() (0)
+#endif
+
+#ifdef CONFIG_SA1100_GATOR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GATOR
+# endif
+# define machine_is_gator() (machine_arch_type == MACH_TYPE_GATOR)
+#else
+# define machine_is_gator() (0)
+#endif
+
+#ifdef CONFIG_ARCH_GRANITE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GRANITE
+# endif
+# define machine_is_granite() (machine_arch_type == MACH_TYPE_GRANITE)
+#else
+# define machine_is_granite() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CONSUS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CONSUS
+# endif
+# define machine_is_consus() (machine_arch_type == MACH_TYPE_CONSUS)
+#else
+# define machine_is_consus() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AAED2000
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AAED2000
+# endif
+# define machine_is_aaed2000() (machine_arch_type == MACH_TYPE_AAED2000)
+#else
+# define machine_is_aaed2000() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CDB89712
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CDB89712
+# endif
+# define machine_is_cdb89712() (machine_arch_type == MACH_TYPE_CDB89712)
+#else
+# define machine_is_cdb89712() (0)
+#endif
+
+#ifdef CONFIG_SA1100_GRAPHICSMASTER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GRAPHICSMASTER
+# endif
+# define machine_is_graphicsmaster() (machine_arch_type == MACH_TYPE_GRAPHICSMASTER)
+#else
+# define machine_is_graphicsmaster() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ADSBITSY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ADSBITSY
+# endif
+# define machine_is_adsbitsy() (machine_arch_type == MACH_TYPE_ADSBITSY)
+#else
+# define machine_is_adsbitsy() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA_IDP
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA_IDP
+# endif
+# define machine_is_pxa_idp() (machine_arch_type == MACH_TYPE_PXA_IDP)
+#else
+# define machine_is_pxa_idp() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PLCE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PLCE
+# endif
+# define machine_is_plce() (machine_arch_type == MACH_TYPE_PLCE)
+#else
+# define machine_is_plce() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PT_SYSTEM3
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PT_SYSTEM3
+# endif
+# define machine_is_pt_system3() (machine_arch_type == MACH_TYPE_PT_SYSTEM3)
+#else
+# define machine_is_pt_system3() (0)
+#endif
+
+#ifdef CONFIG_ARCH_MEDALB
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MEDALB
+# endif
+# define machine_is_murphy() (machine_arch_type == MACH_TYPE_MEDALB)
+#else
+# define machine_is_murphy() (0)
+#endif
+
+#ifdef CONFIG_ARCH_EAGLE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EAGLE
+# endif
+# define machine_is_eagle() (machine_arch_type == MACH_TYPE_EAGLE)
+#else
+# define machine_is_eagle() (0)
+#endif
+
+#ifdef CONFIG_ARCH_DSC21
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_DSC21
+# endif
+# define machine_is_dsc21() (machine_arch_type == MACH_TYPE_DSC21)
+#else
+# define machine_is_dsc21() (0)
+#endif
+
+#ifdef CONFIG_ARCH_DSC24
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_DSC24
+# endif
+# define machine_is_dsc24() (machine_arch_type == MACH_TYPE_DSC24)
+#else
+# define machine_is_dsc24() (0)
+#endif
+
+#ifdef CONFIG_ARCH_TI5472
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TI5472
+# endif
+# define machine_is_ti5472() (machine_arch_type == MACH_TYPE_TI5472)
+#else
+# define machine_is_ti5472() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AUTCPU12
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AUTCPU12
+# endif
+# define machine_is_autcpu12() (machine_arch_type == MACH_TYPE_AUTCPU12)
+#else
+# define machine_is_autcpu12() (0)
+#endif
+
+#ifdef CONFIG_ARCH_UENGINE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_UENGINE
+# endif
+# define machine_is_uengine() (machine_arch_type == MACH_TYPE_UENGINE)
+#else
+# define machine_is_uengine() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BLUESTEM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BLUESTEM
+# endif
+# define machine_is_bluestem() (machine_arch_type == MACH_TYPE_BLUESTEM)
+#else
+# define machine_is_bluestem() (0)
+#endif
+
+#ifdef CONFIG_ARCH_XINGU8
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_XINGU8
+# endif
+# define machine_is_xingu8() (machine_arch_type == MACH_TYPE_XINGU8)
+#else
+# define machine_is_xingu8() (0)
+#endif
+
+#ifdef CONFIG_ARCH_BUSHSTB
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BUSHSTB
+# endif
+# define machine_is_bushstb() (machine_arch_type == MACH_TYPE_BUSHSTB)
+#else
+# define machine_is_bushstb() (0)
+#endif
+
+#ifdef CONFIG_SA1100_EPSILON1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EPSILON1
+# endif
+# define machine_is_epsilon1() (machine_arch_type == MACH_TYPE_EPSILON1)
+#else
+# define machine_is_epsilon1() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BALLOON
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BALLOON
+# endif
+# define machine_is_balloon() (machine_arch_type == MACH_TYPE_BALLOON)
+#else
+# define machine_is_balloon() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PUPPY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PUPPY
+# endif
+# define machine_is_puppy() (machine_arch_type == MACH_TYPE_PUPPY)
+#else
+# define machine_is_puppy() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ELROY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ELROY
+# endif
+# define machine_is_elroy() (machine_arch_type == MACH_TYPE_ELROY)
+#else
+# define machine_is_elroy() (0)
+#endif
+
+#ifdef CONFIG_ARCH_GMS720
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GMS720
+# endif
+# define machine_is_gms720() (machine_arch_type == MACH_TYPE_GMS720)
+#else
+# define machine_is_gms720() (0)
+#endif
+
+#ifdef CONFIG_ARCH_S24X
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_S24X
+# endif
+# define machine_is_s24x() (machine_arch_type == MACH_TYPE_S24X)
+#else
+# define machine_is_s24x() (0)
+#endif
+
+#ifdef CONFIG_ARCH_JTEL_CLEP7312
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JTEL_CLEP7312
+# endif
+# define machine_is_jtel_clep7312() (machine_arch_type == MACH_TYPE_JTEL_CLEP7312)
+#else
+# define machine_is_jtel_clep7312() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CX821XX
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CX821XX
+# endif
+# define machine_is_cx821xx() (machine_arch_type == MACH_TYPE_CX821XX)
+#else
+# define machine_is_cx821xx() (0)
+#endif
+
+#ifdef CONFIG_ARCH_EDB7312
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EDB7312
+# endif
+# define machine_is_edb7312() (machine_arch_type == MACH_TYPE_EDB7312)
+#else
+# define machine_is_edb7312() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BSA1110
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BSA1110
+# endif
+# define machine_is_bsa1110() (machine_arch_type == MACH_TYPE_BSA1110)
+#else
+# define machine_is_bsa1110() (0)
+#endif
+
+#ifdef CONFIG_ARCH_POWERPIN
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_POWERPIN
+# endif
+# define machine_is_powerpin() (machine_arch_type == MACH_TYPE_POWERPIN)
+#else
+# define machine_is_powerpin() (0)
+#endif
+
+#ifdef CONFIG_ARCH_OPENARM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_OPENARM
+# endif
+# define machine_is_openarm() (machine_arch_type == MACH_TYPE_OPENARM)
+#else
+# define machine_is_openarm() (0)
+#endif
+
+#ifdef CONFIG_SA1100_WHITECHAPEL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_WHITECHAPEL
+# endif
+# define machine_is_whitechapel() (machine_arch_type == MACH_TYPE_WHITECHAPEL)
+#else
+# define machine_is_whitechapel() (0)
+#endif
+
+#ifdef CONFIG_SA1100_H3100
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_H3100
+# endif
+# define machine_is_h3100() (machine_arch_type == MACH_TYPE_H3100)
+#else
+# define machine_is_h3100() (0)
+#endif
+
+#ifdef CONFIG_SA1100_H3800
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_H3800
+# endif
+# define machine_is_h3800() (machine_arch_type == MACH_TYPE_H3800)
+#else
+# define machine_is_h3800() (0)
+#endif
+
+#ifdef CONFIG_ARCH_BLUE_V1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BLUE_V1
+# endif
+# define machine_is_blue_v1() (machine_arch_type == MACH_TYPE_BLUE_V1)
+#else
+# define machine_is_blue_v1() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA_CERF
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA_CERF
+# endif
+# define machine_is_pxa_cerf() (machine_arch_type == MACH_TYPE_PXA_CERF)
+#else
+# define machine_is_pxa_cerf() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ARM7TEVB
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ARM7TEVB
+# endif
+# define machine_is_arm7tevb() (machine_arch_type == MACH_TYPE_ARM7TEVB)
+#else
+# define machine_is_arm7tevb() (0)
+#endif
+
+#ifdef CONFIG_SA1100_D7400
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_D7400
+# endif
+# define machine_is_d7400() (machine_arch_type == MACH_TYPE_D7400)
+#else
+# define machine_is_d7400() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PIRANHA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PIRANHA
+# endif
+# define machine_is_piranha() (machine_arch_type == MACH_TYPE_PIRANHA)
+#else
+# define machine_is_piranha() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SBCAMELOT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SBCAMELOT
+# endif
+# define machine_is_sbcamelot() (machine_arch_type == MACH_TYPE_SBCAMELOT)
+#else
+# define machine_is_sbcamelot() (0)
+#endif
+
+#ifdef CONFIG_SA1100_KINGS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_KINGS
+# endif
+# define machine_is_kings() (machine_arch_type == MACH_TYPE_KINGS)
+#else
+# define machine_is_kings() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SMDK2400
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SMDK2400
+# endif
+# define machine_is_smdk2400() (machine_arch_type == MACH_TYPE_SMDK2400)
+#else
+# define machine_is_smdk2400() (0)
+#endif
+
+#ifdef CONFIG_ARCH_COLLIE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_COLLIE
+# endif
+# define machine_is_collie() (machine_arch_type == MACH_TYPE_COLLIE)
+#else
+# define machine_is_collie() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IDR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IDR
+# endif
+# define machine_is_idr() (machine_arch_type == MACH_TYPE_IDR)
+#else
+# define machine_is_idr() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BADGE4
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BADGE4
+# endif
+# define machine_is_badge4() (machine_arch_type == MACH_TYPE_BADGE4)
+#else
+# define machine_is_badge4() (0)
+#endif
+
+#ifdef CONFIG_ARCH_WEBNET
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_WEBNET
+# endif
+# define machine_is_webnet() (machine_arch_type == MACH_TYPE_WEBNET)
+#else
+# define machine_is_webnet() (0)
+#endif
+
+#ifdef CONFIG_SA1100_D7300
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_D7300
+# endif
+# define machine_is_d7300() (machine_arch_type == MACH_TYPE_D7300)
+#else
+# define machine_is_d7300() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CEP
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CEP
+# endif
+# define machine_is_cep() (machine_arch_type == MACH_TYPE_CEP)
+#else
+# define machine_is_cep() (0)
+#endif
+
+#ifdef CONFIG_ARCH_FORTUNET
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FORTUNET
+# endif
+# define machine_is_fortunet() (machine_arch_type == MACH_TYPE_FORTUNET)
+#else
+# define machine_is_fortunet() (0)
+#endif
+
+#ifdef CONFIG_ARCH_VC547X
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_VC547X
+# endif
+# define machine_is_vc547x() (machine_arch_type == MACH_TYPE_VC547X)
+#else
+# define machine_is_vc547x() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FILEWALKER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FILEWALKER
+# endif
+# define machine_is_filewalker() (machine_arch_type == MACH_TYPE_FILEWALKER)
+#else
+# define machine_is_filewalker() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NETGATEWAY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NETGATEWAY
+# endif
+# define machine_is_netgateway() (machine_arch_type == MACH_TYPE_NETGATEWAY)
+#else
+# define machine_is_netgateway() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SYMBOL2800
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SYMBOL2800
+# endif
+# define machine_is_symbol2800() (machine_arch_type == MACH_TYPE_SYMBOL2800)
+#else
+# define machine_is_symbol2800() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SUNS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SUNS
+# endif
+# define machine_is_suns() (machine_arch_type == MACH_TYPE_SUNS)
+#else
+# define machine_is_suns() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FRODO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FRODO
+# endif
+# define machine_is_frodo() (machine_arch_type == MACH_TYPE_FRODO)
+#else
+# define machine_is_frodo() (0)
+#endif
+
+#ifdef CONFIG_SA1100_MACH_TYTE_MS301
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MACH_TYTE_MS301
+# endif
+# define machine_is_ms301() (machine_arch_type == MACH_TYPE_MACH_TYTE_MS301)
+#else
+# define machine_is_ms301() (0)
+#endif
+
+#ifdef CONFIG_ARCH_MX1ADS
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MX1ADS
+# endif
+# define machine_is_mx1ads() (machine_arch_type == MACH_TYPE_MX1ADS)
+#else
+# define machine_is_mx1ads() (0)
+#endif
+
+#ifdef CONFIG_ARCH_H7201
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_H7201
+# endif
+# define machine_is_h7201() (machine_arch_type == MACH_TYPE_H7201)
+#else
+# define machine_is_h7201() (0)
+#endif
+
+#ifdef CONFIG_ARCH_H7202
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_H7202
+# endif
+# define machine_is_h7202() (machine_arch_type == MACH_TYPE_H7202)
+#else
+# define machine_is_h7202() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AMICO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AMICO
+# endif
+# define machine_is_amico() (machine_arch_type == MACH_TYPE_AMICO)
+#else
+# define machine_is_amico() (0)
+#endif
+
+#ifdef CONFIG_SA1100_IAM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IAM
+# endif
+# define machine_is_iam() (machine_arch_type == MACH_TYPE_IAM)
+#else
+# define machine_is_iam() (0)
+#endif
+
+#ifdef CONFIG_SA1100_TT530
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TT530
+# endif
+# define machine_is_tt530() (machine_arch_type == MACH_TYPE_TT530)
+#else
+# define machine_is_tt530() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SAM2400
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SAM2400
+# endif
+# define machine_is_sam2400() (machine_arch_type == MACH_TYPE_SAM2400)
+#else
+# define machine_is_sam2400() (0)
+#endif
+
+#ifdef CONFIG_SA1100_JORNADA56X
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JORNADA56X
+# endif
+# define machine_is_jornada56x() (machine_arch_type == MACH_TYPE_JORNADA56X)
+#else
+# define machine_is_jornada56x() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ACTIVE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ACTIVE
+# endif
+# define machine_is_active() (machine_arch_type == MACH_TYPE_ACTIVE)
+#else
+# define machine_is_active() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IQ80321
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IQ80321
+# endif
+# define machine_is_iq80321() (machine_arch_type == MACH_TYPE_IQ80321)
+#else
+# define machine_is_iq80321() (0)
+#endif
+
+#ifdef CONFIG_SA1100_WID
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_WID
+# endif
+# define machine_is_wid() (machine_arch_type == MACH_TYPE_WID)
+#else
+# define machine_is_wid() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SABINAL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SABINAL
+# endif
+# define machine_is_sabinal() (machine_arch_type == MACH_TYPE_SABINAL)
+#else
+# define machine_is_sabinal() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IXP425_MATACUMBE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IXP425_MATACUMBE
+# endif
+# define machine_is_ixp425_matacumbe() (machine_arch_type == MACH_TYPE_IXP425_MATACUMBE)
+#else
+# define machine_is_ixp425_matacumbe() (0)
+#endif
+
+#ifdef CONFIG_SA1100_MINIPRINT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MINIPRINT
+# endif
+# define machine_is_miniprint() (machine_arch_type == MACH_TYPE_MINIPRINT)
+#else
+# define machine_is_miniprint() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ADM510X
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ADM510X
+# endif
+# define machine_is_adm510x() (machine_arch_type == MACH_TYPE_ADM510X)
+#else
+# define machine_is_adm510x() (0)
+#endif
+
+#ifdef CONFIG_SA1100_SVS200
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SVS200
+# endif
+# define machine_is_svs200() (machine_arch_type == MACH_TYPE_SVS200)
+#else
+# define machine_is_svs200() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ATG_TCU
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ATG_TCU
+# endif
+# define machine_is_atg_tcu() (machine_arch_type == MACH_TYPE_ATG_TCU)
+#else
+# define machine_is_atg_tcu() (0)
+#endif
+
+#ifdef CONFIG_SA1100_JORNADA820
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JORNADA820
+# endif
+# define machine_is_jornada820() (machine_arch_type == MACH_TYPE_JORNADA820)
+#else
+# define machine_is_jornada820() (0)
+#endif
+
+#ifdef CONFIG_ARCH_S3C44B0
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_S3C44B0
+# endif
+# define machine_is_s3c44b0() (machine_arch_type == MACH_TYPE_S3C44B0)
+#else
+# define machine_is_s3c44b0() (0)
+#endif
+
+#ifdef CONFIG_ARCH_MARGIS2
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MARGIS2
+# endif
+# define machine_is_margis2() (machine_arch_type == MACH_TYPE_MARGIS2)
+#else
+# define machine_is_margis2() (0)
+#endif
+
+#ifdef CONFIG_ARCH_KS8695
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_KS8695
+# endif
+# define machine_is_ks8695() (machine_arch_type == MACH_TYPE_KS8695)
+#else
+# define machine_is_ks8695() (0)
+#endif
+
+#ifdef CONFIG_ARCH_BRH
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BRH
+# endif
+# define machine_is_brh() (machine_arch_type == MACH_TYPE_BRH)
+#else
+# define machine_is_brh() (0)
+#endif
+
+#ifdef CONFIG_ARCH_S3C2410
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_S3C2410
+# endif
+# define machine_is_s3c2410() (machine_arch_type == MACH_TYPE_S3C2410)
+#else
+# define machine_is_s3c2410() (0)
+#endif
+
+#ifdef CONFIG_ARCH_POSSIO_PX30
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_POSSIO_PX30
+# endif
+# define machine_is_possio_px30() (machine_arch_type == MACH_TYPE_POSSIO_PX30)
+#else
+# define machine_is_possio_px30() (0)
+#endif
+
+#ifdef CONFIG_ARCH_S3C2800
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_S3C2800
+# endif
+# define machine_is_s3c2800() (machine_arch_type == MACH_TYPE_S3C2800)
+#else
+# define machine_is_s3c2800() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FLEETWOOD
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FLEETWOOD
+# endif
+# define machine_is_fleetwood() (machine_arch_type == MACH_TYPE_FLEETWOOD)
+#else
+# define machine_is_fleetwood() (0)
+#endif
+
+#ifdef CONFIG_ARCH_OMAHA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_OMAHA
+# endif
+# define machine_is_omaha() (machine_arch_type == MACH_TYPE_OMAHA)
+#else
+# define machine_is_omaha() (0)
+#endif
+
+#ifdef CONFIG_ARCH_TA7
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_TA7
+# endif
+# define machine_is_ta7() (machine_arch_type == MACH_TYPE_TA7)
+#else
+# define machine_is_ta7() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NOVA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NOVA
+# endif
+# define machine_is_nova() (machine_arch_type == MACH_TYPE_NOVA)
+#else
+# define machine_is_nova() (0)
+#endif
+
+#ifdef CONFIG_ARCH_HMK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_HMK
+# endif
+# define machine_is_hmk() (machine_arch_type == MACH_TYPE_HMK)
+#else
+# define machine_is_hmk() (0)
+#endif
+
+#ifdef CONFIG_ARCH_INPHINITY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_INPHINITY
+# endif
+# define machine_is_inphinity() (machine_arch_type == MACH_TYPE_INPHINITY)
+#else
+# define machine_is_inphinity() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FESTER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FESTER
+# endif
+# define machine_is_fester() (machine_arch_type == MACH_TYPE_FESTER)
+#else
+# define machine_is_fester() (0)
+#endif
+
+#ifdef CONFIG_ARCH_GPI
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GPI
+# endif
+# define machine_is_gpi() (machine_arch_type == MACH_TYPE_GPI)
+#else
+# define machine_is_gpi() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SMDK2410
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SMDK2410
+# endif
+# define machine_is_smdk2410() (machine_arch_type == MACH_TYPE_SMDK2410)
+#else
+# define machine_is_smdk2410() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PREMIUM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PREMIUM
+# endif
+# define machine_is_premium() (machine_arch_type == MACH_TYPE_PREMIUM)
+#else
+# define machine_is_premium() (0)
+#endif
+
+#ifdef CONFIG_SA1100_NEXIO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NEXIO
+# endif
+# define machine_is_nexio() (machine_arch_type == MACH_TYPE_NEXIO)
+#else
+# define machine_is_nexio() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BITBOX
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BITBOX
+# endif
+# define machine_is_bitbox() (machine_arch_type == MACH_TYPE_BITBOX)
+#else
+# define machine_is_bitbox() (0)
+#endif
+
+#ifdef CONFIG_SA1100_G200
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_G200
+# endif
+# define machine_is_g200() (machine_arch_type == MACH_TYPE_G200)
+#else
+# define machine_is_g200() (0)
+#endif
+
+#ifdef CONFIG_SA1100_GILL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_GILL
+# endif
+# define machine_is_gill() (machine_arch_type == MACH_TYPE_GILL)
+#else
+# define machine_is_gill() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA_MERCURY
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA_MERCURY
+# endif
+# define machine_is_pxa_mercury() (machine_arch_type == MACH_TYPE_PXA_MERCURY)
+#else
+# define machine_is_pxa_mercury() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CEIVA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CEIVA
+# endif
+# define machine_is_ceiva() (machine_arch_type == MACH_TYPE_CEIVA)
+#else
+# define machine_is_ceiva() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FRET
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FRET
+# endif
+# define machine_is_fret() (machine_arch_type == MACH_TYPE_FRET)
+#else
+# define machine_is_fret() (0)
+#endif
+
+#ifdef CONFIG_SA1100_EMAILPHONE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EMAILPHONE
+# endif
+# define machine_is_emailphone() (machine_arch_type == MACH_TYPE_EMAILPHONE)
+#else
+# define machine_is_emailphone() (0)
+#endif
+
+#ifdef CONFIG_ARCH_H3900
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_H3900
+# endif
+# define machine_is_h3900() (machine_arch_type == MACH_TYPE_H3900)
+#else
+# define machine_is_h3900() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA1
+# endif
+# define machine_is_pxa1() (machine_arch_type == MACH_TYPE_PXA1)
+#else
+# define machine_is_pxa1() (0)
+#endif
+
+#ifdef CONFIG_SA1100_KOAN369
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_KOAN369
+# endif
+# define machine_is_koan369() (machine_arch_type == MACH_TYPE_KOAN369)
+#else
+# define machine_is_koan369() (0)
+#endif
+
+#ifdef CONFIG_ARCH_COGENT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_COGENT
+# endif
+# define machine_is_cogent() (machine_arch_type == MACH_TYPE_COGENT)
+#else
+# define machine_is_cogent() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ESL_SIMPUTER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ESL_SIMPUTER
+# endif
+# define machine_is_esl_simputer() (machine_arch_type == MACH_TYPE_ESL_SIMPUTER)
+#else
+# define machine_is_esl_simputer() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ESL_SIMPUTER_CLR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ESL_SIMPUTER_CLR
+# endif
+# define machine_is_esl_simputer_clr() (machine_arch_type == MACH_TYPE_ESL_SIMPUTER_CLR)
+#else
+# define machine_is_esl_simputer_clr() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ESL_SIMPUTER_BW
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ESL_SIMPUTER_BW
+# endif
+# define machine_is_esl_simputer_bw() (machine_arch_type == MACH_TYPE_ESL_SIMPUTER_BW)
+#else
+# define machine_is_esl_simputer_bw() (0)
+#endif
+
+#ifdef CONFIG_ARCH_HHP_CRADLE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_HHP_CRADLE
+# endif
+# define machine_is_hhp_cradle() (machine_arch_type == MACH_TYPE_HHP_CRADLE)
+#else
+# define machine_is_hhp_cradle() (0)
+#endif
+
+#ifdef CONFIG_ARCH_HE500
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_HE500
+# endif
+# define machine_is_he500() (machine_arch_type == MACH_TYPE_HE500)
+#else
+# define machine_is_he500() (0)
+#endif
+
+#ifdef CONFIG_SA1100_INHANDELF2
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_INHANDELF2
+# endif
+# define machine_is_inhandelf2() (machine_arch_type == MACH_TYPE_INHANDELF2)
+#else
+# define machine_is_inhandelf2() (0)
+#endif
+
+#ifdef CONFIG_SA1100_INHANDFTIP
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_INHANDFTIP
+# endif
+# define machine_is_inhandftip() (machine_arch_type == MACH_TYPE_INHANDFTIP)
+#else
+# define machine_is_inhandftip() (0)
+#endif
+
+#ifdef CONFIG_SA1100_DNP1110
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_DNP1110
+# endif
+# define machine_is_dnp1110() (machine_arch_type == MACH_TYPE_DNP1110)
+#else
+# define machine_is_dnp1110() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PNP1110
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PNP1110
+# endif
+# define machine_is_pnp1110() (machine_arch_type == MACH_TYPE_PNP1110)
+#else
+# define machine_is_pnp1110() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CSB226
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CSB226
+# endif
+# define machine_is_csb226() (machine_arch_type == MACH_TYPE_CSB226)
+#else
+# define machine_is_csb226() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ARNOLD
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ARNOLD
+# endif
+# define machine_is_arnold() (machine_arch_type == MACH_TYPE_ARNOLD)
+#else
+# define machine_is_arnold() (0)
+#endif
+
+#ifdef CONFIG_SA1100_PSIBOARD
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PSIBOARD
+# endif
+# define machine_is_psiboard() (machine_arch_type == MACH_TYPE_PSIBOARD)
+#else
+# define machine_is_psiboard() (0)
+#endif
+
+#ifdef CONFIG_ARCH_JZ8028
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JZ8028
+# endif
+# define machine_is_jz8028() (machine_arch_type == MACH_TYPE_JZ8028)
+#else
+# define machine_is_jz8028() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IPAQ3
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IPAQ3
+# endif
+# define machine_is_ipaq3() (machine_arch_type == MACH_TYPE_IPAQ3)
+#else
+# define machine_is_ipaq3() (0)
+#endif
+
+#ifdef CONFIG_SA1100_FORTE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_FORTE
+# endif
+# define machine_is_forte() (machine_arch_type == MACH_TYPE_FORTE)
+#else
+# define machine_is_forte() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ACAM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ACAM
+# endif
+# define machine_is_acam() (machine_arch_type == MACH_TYPE_ACAM)
+#else
+# define machine_is_acam() (0)
+#endif
+
+#ifdef CONFIG_SA1100_ABOX
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ABOX
+# endif
+# define machine_is_abox() (machine_arch_type == MACH_TYPE_ABOX)
+#else
+# define machine_is_abox() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ATMEL
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ATMEL
+# endif
+# define machine_is_atmel() (machine_arch_type == MACH_TYPE_ATMEL)
+#else
+# define machine_is_atmel() (0)
+#endif
+
+#ifdef CONFIG_ARCH_SITSANG
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SITSANG
+# endif
+# define machine_is_sitsang() (machine_arch_type == MACH_TYPE_SITSANG)
+#else
+# define machine_is_sitsang() (0)
+#endif
+
+#ifdef CONFIG_SA1100_CPU1110LCDNET
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CPU1110LCDNET
+# endif
+# define machine_is_cpu1110lcdnet() (machine_arch_type == MACH_TYPE_CPU1110LCDNET)
+#else
+# define machine_is_cpu1110lcdnet() (0)
+#endif
+
+#ifdef CONFIG_ARCH_MPL_VCMA9
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MPL_VCMA9
+# endif
+# define machine_is_mpl_vcma9() (machine_arch_type == MACH_TYPE_MPL_VCMA9)
+#else
+# define machine_is_mpl_vcma9() (0)
+#endif
+
+#ifdef CONFIG_ARCH_OPUS_A1
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_OPUS_A1
+# endif
+# define machine_is_opus_a1() (machine_arch_type == MACH_TYPE_OPUS_A1)
+#else
+# define machine_is_opus_a1() (0)
+#endif
+
+#ifdef CONFIG_ARCH_DAYTONA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_DAYTONA
+# endif
+# define machine_is_daytona() (machine_arch_type == MACH_TYPE_DAYTONA)
+#else
+# define machine_is_daytona() (0)
+#endif
+
+#ifdef CONFIG_SA1100_KILLBEAR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_KILLBEAR
+# endif
+# define machine_is_killbear() (machine_arch_type == MACH_TYPE_KILLBEAR)
+#else
+# define machine_is_killbear() (0)
+#endif
+
+#ifdef CONFIG_ARCH_YOHO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_YOHO
+# endif
+# define machine_is_yoho() (machine_arch_type == MACH_TYPE_YOHO)
+#else
+# define machine_is_yoho() (0)
+#endif
+
+#ifdef CONFIG_ARCH_JASPER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_JASPER
+# endif
+# define machine_is_jasper() (machine_arch_type == MACH_TYPE_JASPER)
+#else
+# define machine_is_jasper() (0)
+#endif
+
+#ifdef CONFIG_ARCH_DSC25
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_DSC25
+# endif
+# define machine_is_dsc25() (machine_arch_type == MACH_TYPE_DSC25)
+#else
+# define machine_is_dsc25() (0)
+#endif
+
+#ifdef CONFIG_ARCH_INNOVATOR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_INNOVATOR
+# endif
+# define machine_is_innovator() (machine_arch_type == MACH_TYPE_INNOVATOR)
+#else
+# define machine_is_innovator() (0)
+#endif
+
+#ifdef CONFIG_ARCH_RAMSES
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_RAMSES
+# endif
+# define machine_is_ramses() (machine_arch_type == MACH_TYPE_RAMSES)
+#else
+# define machine_is_ramses() (0)
+#endif
+
+#ifdef CONFIG_ARCH_S28X
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_S28X
+# endif
+# define machine_is_s28x() (machine_arch_type == MACH_TYPE_S28X)
+#else
+# define machine_is_s28x() (0)
+#endif
+
+#ifdef CONFIG_ARCH_MPORT3
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_MPORT3
+# endif
+# define machine_is_mport3() (machine_arch_type == MACH_TYPE_MPORT3)
+#else
+# define machine_is_mport3() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA_EAGLE250
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA_EAGLE250
+# endif
+# define machine_is_pxa_eagle250() (machine_arch_type == MACH_TYPE_PXA_EAGLE250)
+#else
+# define machine_is_pxa_eagle250() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PDB
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PDB
+# endif
+# define machine_is_pdb() (machine_arch_type == MACH_TYPE_PDB)
+#else
+# define machine_is_pdb() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BLUE_2G
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BLUE_2G
+# endif
+# define machine_is_blue_2g() (machine_arch_type == MACH_TYPE_BLUE_2G)
+#else
+# define machine_is_blue_2g() (0)
+#endif
+
+#ifdef CONFIG_SA1100_BLUEARCH
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_BLUEARCH
+# endif
+# define machine_is_bluearch() (machine_arch_type == MACH_TYPE_BLUEARCH)
+#else
+# define machine_is_bluearch() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IXMB2400
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IXMB2400
+# endif
+# define machine_is_ixdp2400() (machine_arch_type == MACH_TYPE_IXMB2400)
+#else
+# define machine_is_ixdp2400() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IXMB2800
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IXMB2800
+# endif
+# define machine_is_ixdp2800() (machine_arch_type == MACH_TYPE_IXMB2800)
+#else
+# define machine_is_ixdp2800() (0)
+#endif
+
+#ifdef CONFIG_SA1100_EXPLORER
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EXPLORER
+# endif
+# define machine_is_explorer() (machine_arch_type == MACH_TYPE_EXPLORER)
+#else
+# define machine_is_explorer() (0)
+#endif
+
+#ifdef CONFIG_ARCH_IXDP425
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_IXDP425
+# endif
+# define machine_is_ixdp425() (machine_arch_type == MACH_TYPE_IXDP425)
+#else
+# define machine_is_ixdp425() (0)
+#endif
+
+#ifdef CONFIG_ARCH_CHIMP
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_CHIMP
+# endif
+# define machine_is_chimp() (machine_arch_type == MACH_TYPE_CHIMP)
+#else
+# define machine_is_chimp() (0)
+#endif
+
+#ifdef CONFIG_ARCH_STORK_NEST
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_STORK_NEST
+# endif
+# define machine_is_stork_nest() (machine_arch_type == MACH_TYPE_STORK_NEST)
+#else
+# define machine_is_stork_nest() (0)
+#endif
+
+#ifdef CONFIG_ARCH_STORK_EGG
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_STORK_EGG
+# endif
+# define machine_is_stork_egg() (machine_arch_type == MACH_TYPE_STORK_EGG)
+#else
+# define machine_is_stork_egg() (0)
+#endif
+
+#ifdef CONFIG_SA1100_WISMO
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_WISMO
+# endif
+# define machine_is_wismo() (machine_arch_type == MACH_TYPE_WISMO)
+#else
+# define machine_is_wismo() (0)
+#endif
+
+#ifdef CONFIG_ARCH_EZLINX
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_EZLINX
+# endif
+# define machine_is_ezlinx() (machine_arch_type == MACH_TYPE_EZLINX)
+#else
+# define machine_is_ezlinx() (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AT91
+# endif
+# define machine_is_at91() (machine_arch_type == MACH_TYPE_AT91)
+#else
+# define machine_is_at91() (0)
+#endif
+
+#ifdef CONFIG_ARCH_ORION
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ORION
+# endif
+# define machine_is_orion() (machine_arch_type == MACH_TYPE_ORION)
+#else
+# define machine_is_orion() (0)
+#endif
+
+#ifdef CONFIG_ARCH_NEPTUNE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_NEPTUNE
+# endif
+# define machine_is_neptune() (machine_arch_type == MACH_TYPE_NEPTUNE)
+#else
+# define machine_is_neptune() (0)
+#endif
+
+#ifdef CONFIG_SA1100_HACKKIT
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_HACKKIT
+# endif
+# define machine_is_hackkit() (machine_arch_type == MACH_TYPE_HACKKIT)
+#else
+# define machine_is_hackkit() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA_WINS30
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA_WINS30
+# endif
+# define machine_is_pxa_wins30() (machine_arch_type == MACH_TYPE_PXA_WINS30)
+#else
+# define machine_is_pxa_wins30() (0)
+#endif
+
+#ifdef CONFIG_SA1100_LAVINNA
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_LAVINNA
+# endif
+# define machine_is_lavinna() (machine_arch_type == MACH_TYPE_LAVINNA)
+#else
+# define machine_is_lavinna() (0)
+#endif
+
+#ifdef CONFIG_ARCH_PXA_UENGINE
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_PXA_UENGINE
+# endif
+# define machine_is_pxa_uengine() (machine_arch_type == MACH_TYPE_PXA_UENGINE)
+#else
+# define machine_is_pxa_uengine() (0)
+#endif
+
+#ifdef CONFIG_ARCH_INNOKOM
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_INNOKOM
+# endif
+# define machine_is_innokom() (machine_arch_type == MACH_TYPE_INNOKOM)
+#else
+# define machine_is_innokom() (0)
+#endif
+
+/*
+ * These have not yet been registered
+ */
+
+#ifndef machine_arch_type
+#define machine_arch_type __machine_arch_type
+#endif
+
+#endif
diff --git a/include/cmd_bsp.h b/include/cmd_bsp.h
index e4b10414b..aab9c3677 100644
--- a/include/cmd_bsp.h
+++ b/include/cmd_bsp.h
@@ -112,7 +112,19 @@ int do_pip405 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int do_mip405 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#endif /* CONFIG_MIP405 */
-/* -------------------------------------------------------------------- */
+/* ----- VCMA9 -----------------------------------------------------------------
+ */
+#if defined(CONFIG_VCMA9)
+
+#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \
+ "vcma9", 4, 6, 1, do_vcma9, \
+ "vcma9 - VCMA9 specific Cmds\n", \
+ "flash mem [SrcAddr] - updates U-Boot with image in memory\n" \
+),
+int do_vcma9 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+#endif /* CONFIG_VCMA9 */
+/* ----------------------------------------------------------------------------*/
/* ----- DASA_SIM ----------------------------------------------------- */
#if defined(CONFIG_DASA_SIM)
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
new file mode 100644
index 000000000..a73281c02
--- /dev/null
+++ b/include/configs/VCMA9.h
@@ -0,0 +1,209 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ * Gary Jennejohn <gj@denx.de>
+ * David Mueller <d.mueller@elsoft.ch>
+ *
+ * Configuation settings for the MPL VCMA9 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * If we are developing, we might want to start armboot from ram
+ * so we MUST NOT initialize critical regs like mem-timing ...
+ */
+#define CONFIG_INIT_CRITICAL /* undef for developing */
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
+#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
+#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
+
+/* input clock of PLL */
+#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
+
+#define USE_920T_MMU 1
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+#define CONFIG_COMMANDS \
+ (CONFIG_CMD_DFL | \
+ CFG_CMD_CACHE | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_I2C | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_ELF | \
+ CFG_CMD_BSP)
+
+/* this must be included after the definiton of CONFIG_COMMANDS */
+#include <cmd_confdefs.h>
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+/***********************************************************
+ * I2C stuff:
+ * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
+ * address 0x50 with 16bit addressing
+ ***********************************************************/
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#define CFG_I2C_SPEED 100000 /* I2C speed */
+#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
+
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
+#define CFG_ENV_OFFSET 0x000 /* environment starts at offset 0 */
+#define CFG_ENV_SIZE 0x800 /* 2KB should be more than enough */
+
+#undef CFG_I2C_EEPROM_ADDR_OVERFLOW
+#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
+
+#define CFG_MONITOR_LEN (256 * 1024)
+#define CFG_MALLOC_LEN (128 * 1024)
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
+#define CS8900_BASE 0x20000300
+#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
+
+#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 9600
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 10.0.0.110
+#define CONFIG_SERVERIP 10.0.0.1
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+/* what's this ? it's not used anywhere */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "VCMA9 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
+#define CFG_ALT_MEMTEST
+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
+
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+/* we configure PWM Timer 4 to 1us ~ 1MHz */
+/*#define CFG_HZ 1000000 */
+#define CFG_HZ 1562500
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
+#if 0
+#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
+#endif
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#ifdef CONFIG_AMD_LV800
+#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
+#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
+#endif
+#ifdef CONFIG_AMD_LV400
+#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
+#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
+#endif
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
+
+#if 0
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+#endif
+
+#define MULTI_PURPOSE_SOCKET_ADDR 0
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/trab.h b/include/configs/trab.h
index 61a643adc..4ac9cc4a7 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -274,4 +274,7 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+/* Initial value of the on-board touch screen brightness */
+#define CFG_BRIGHTNESS 0x20
+
#endif /* __CONFIG_H */
diff --git a/lib_arm/board.c b/lib_arm/board.c
index 5b7bb6e37..244c0b5b6 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -173,7 +173,9 @@ init_fnc_t *init_sequence[] = {
display_banner, /* say that we are here */
dram_init, /* configure available RAM banks */
display_dram_config,
-
+#if defined(CONFIG_VCMA9)
+ checkboard,
+#endif
NULL,
};
@@ -269,8 +271,6 @@ void start_armboot (void)
board_post_init ();
#endif
-printf ("### FB @ %08lX vfd_type=0x%02X vfd_data_lines_inv=%d\n",gd->fb_base,gd->vfd_type,gd->vfd_inv_data);
-
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {
main_loop ();
diff --git a/rtc/Makefile b/rtc/Makefile
index 0e1fd0f0d..5d6c7f557 100644
--- a/rtc/Makefile
+++ b/rtc/Makefile
@@ -27,7 +27,8 @@ include $(TOPDIR)/config.mk
LIB = librtc.a
-OBJS = date.o ds1302.o ds1306.o ds1337.o ds1556.o ds174x.o \
+OBJS = date.o \
+ ds1302.o ds1306.o ds1307.o ds1337.o ds1556.o ds174x.o \
m41t11.o m48t35ax.o mc146818.o mk48t59.o \
mpc8xx.o pcf8563.o
diff --git a/rtc/ds1307.c b/rtc/ds1307.c
new file mode 100644
index 000000000..247494c34
--- /dev/null
+++ b/rtc/ds1307.c
@@ -0,0 +1,203 @@
+/*
+ * (C) Copyright 2001, 2002, 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * Keith Outwater, keith_outwater@mvis.com`
+ * Steven Scholz, steven.scholz@imc-berlin.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
+ * DS1307 Real Time Clock (RTC).
+ *
+ * based on ds1337.c
+ */
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+#include <i2c.h>
+
+#if defined(CONFIG_RTC_DS1307) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+
+/*---------------------------------------------------------------------*/
+#undef DEBUG_RTC
+
+#ifdef DEBUG_RTC
+#define DEBUGR(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGR(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+#ifndef CFG_I2C_RTC_ADDR
+# define CFG_I2C_RTC_ADDR 0x68
+#endif
+
+#if CFG_I2C_SPEED > 100000
+# error The DS1307 is specified only up to 100kHz!
+#endif
+
+/*
+ * RTC register addresses
+ */
+#define RTC_SEC_REG_ADDR 0x00
+#define RTC_MIN_REG_ADDR 0x01
+#define RTC_HR_REG_ADDR 0x02
+#define RTC_DAY_REG_ADDR 0x03
+#define RTC_DATE_REG_ADDR 0x04
+#define RTC_MON_REG_ADDR 0x05
+#define RTC_YR_REG_ADDR 0x06
+#define RTC_CTL_REG_ADDR 0x07
+
+#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
+
+#define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */
+#define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */
+#define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */
+#define RTC_CTL_BIT_OUT 0x80 /* Output Control */
+
+static uchar rtc_read (uchar reg);
+static void rtc_write (uchar reg, uchar val);
+static uchar bin2bcd (unsigned int n);
+static unsigned bcd2bin (uchar c);
+
+/*
+ * Get the current time from the RTC
+ */
+void rtc_get (struct rtc_time *tmp)
+{
+ uchar sec, min, hour, mday, wday, mon, year;
+
+ sec = rtc_read (RTC_SEC_REG_ADDR);
+ min = rtc_read (RTC_MIN_REG_ADDR);
+ hour = rtc_read (RTC_HR_REG_ADDR);
+ wday = rtc_read (RTC_DAY_REG_ADDR);
+ mday = rtc_read (RTC_DATE_REG_ADDR);
+ mon = rtc_read (RTC_MON_REG_ADDR);
+ year = rtc_read (RTC_YR_REG_ADDR);
+
+ DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
+ "hr: %02x min: %02x sec: %02x\n",
+ year, mon, mday, wday, hour, min, sec);
+
+ if (sec & RTC_SEC_BIT_CH) {
+ printf ("### Warning: RTC oscillator has stopped\n");
+ /* clear the CH flag */
+ rtc_write (RTC_SEC_REG_ADDR,
+ rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
+ }
+
+ tmp->tm_sec = bcd2bin (sec & 0x7F);
+ tmp->tm_min = bcd2bin (min & 0x7F);
+ tmp->tm_hour = bcd2bin (hour & 0x3F);
+ tmp->tm_mday = bcd2bin (mday & 0x3F);
+ tmp->tm_mon = bcd2bin (mon & 0x1F);
+ tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
+ tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
+ tmp->tm_yday = 0;
+ tmp->tm_isdst= 0;
+
+ DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+}
+
+
+/*
+ * Set the RTC
+ */
+void rtc_set (struct rtc_time *tmp)
+{
+ DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+ if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
+ printf("WARNING: year should be between 1970 and 2069!\n");
+
+ rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
+ rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
+ rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
+ rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
+ rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
+ rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
+ rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
+}
+
+
+/*
+ * Reset the RTC. We setting the date back to 1970-01-01.
+ * We also enable the oscillator output on the SQW/OUT pin and program
+ * it for 32,768 Hz output. Note that according to the datasheet, turning
+ * on the square wave output increases the current drain on the backup
+ * battery to something between 480nA and 800nA.
+ */
+void rtc_reset (void)
+{
+ struct rtc_time tmp;
+
+ rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
+ rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0);
+
+ tmp.tm_year = 1970;
+ tmp.tm_mon = 1;
+ tmp.tm_mday= 1;
+ tmp.tm_hour = 0;
+ tmp.tm_min = 0;
+ tmp.tm_sec = 0;
+
+ rtc_set(&tmp);
+
+ printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
+ tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
+ tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
+
+ return;
+}
+
+
+/*
+ * Helper functions
+ */
+
+static
+uchar rtc_read (uchar reg)
+{
+ return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
+}
+
+
+static void rtc_write (uchar reg, uchar val)
+{
+ i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
+}
+
+static unsigned bcd2bin (uchar n)
+{
+ return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
+}
+
+static unsigned char bin2bcd (unsigned int n)
+{
+ return (((n / 10) << 4) | (n % 10));
+}
+
+#endif /* CONFIG_RTC_DS1307 && (CFG_COMMANDS & CFG_CMD_DATE) */