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authorStefano Babic <sbabic@denx.de>2012-02-22 00:24:33 +0000
committerJohn Rigby <john.rigby@linaro.org>2012-05-02 19:44:13 -0600
commitb644bcd2faebee133a7d80e095abc1490c8a6b25 (patch)
treec83f11a02dcfa4af7c74d217a58cdd24759dc866
parentc4a60b0558e41c9ed5801b02ff6dfc3e6daff76a (diff)
downloadu-boot-linaro-stable-b644bcd2faebee133a7d80e095abc1490c8a6b25.tar.gz
Define UART4 and UART5 base addresses
Signed-off-by: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/include/asm/arch-mx5/imx-regs.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4fa66587a..07296b538 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -93,6 +93,7 @@
#define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000)
#define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000)
#define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000)
+#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000F0000)
#endif
/*
* AIPS 2
@@ -133,6 +134,10 @@
#define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000)
#define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000)
+#if defined(CONFIG_MX53)
+#define UART5_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000)
+#endif
+
/*
* WEIM CSnGCR1
*/