diff options
| author | robertcnelson@gmail.com <robertcnelson@gmail.com> | 2012-01-27 07:09:42 +0000 |
|---|---|---|
| committer | John Rigby <john.rigby@linaro.org> | 2012-03-01 01:37:10 -0700 |
| commit | 8df579560e8e098668931b5125b37c3b1dbc0e57 (patch) | |
| tree | 8f77e7ea6d21e2dd1bc03a05ed67f990f2474c95 | |
| parent | 4709a04c3a9b35fb64ed37fc14c3b691aa3b8c11 (diff) | |
The logic for the rev C4 boards was missing one of the cases
(variant with Micron NAND and 2x128MB).
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
| -rw-r--r-- | board/ti/beagle/beagle.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 2dd863b41..1288fa2cb 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -188,6 +188,13 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; + } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { + /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ + *mcfg = MICRON_V_MCFG_165(128 << 20); + *ctrla = MICRON_V_ACTIMA_165; + *ctrlb = MICRON_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); |