diff options
| author | Greg Ungerer <greg.ungerer@opengear.com> | 2011-09-09 22:23:18 +1000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-09-10 00:12:15 +0200 |
| commit | a34ebbdafe33e8078d58242062db0ec2554b8a73 (patch) | |
| tree | a7e64b9007493fcb5d7d3b3be806529580f721c5 | |
| parent | 3a52cfa5cc402c06bb80ce46eedb5496150d4046 (diff) | |
CM4000: fix missing RAM definitions for OpenGear boards
The OpenGear boards CM4008, CM4116 and CM4148 need their DRAM base
and RAM stack base addresses defined.
Fixes:
board.c: In function ‘__dram_init_banksize’:
board.c:227: error: ‘CONFIG_SYS_SDRAM_BASE’ undeclared (first use in this function)
board.c:227: error: (Each undeclared identifier is reported only once
board.c:227: error: for each function it appears in.)
board.c: In function ‘board_init_f’:
board.c:270: error: ‘CONFIG_SYS_INIT_SP_ADDR’ undeclared (first use in this function)
board.c:303: error: ‘CONFIG_SYS_SDRAM_BASE’ undeclared (first use in this function)
Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
| -rw-r--r-- | include/configs/cm4008.h | 3 | ||||
| -rw-r--r-- | include/configs/cm41xx.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index 6e4a3b451..81e4de45d 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -114,6 +114,9 @@ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ #define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index dca7d54c6..785ab0a62 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -114,6 +114,9 @@ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ #define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ |