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authorJason Chen <b02280@freescale.com>2012-01-12 15:36:26 +0800
committerJohn Rigby <john.rigby@linaro.org>2012-04-19 02:18:33 -0600
commit152ad8815e75b62b402ac4b093ef2903cc9f0f0d (patch)
treed0e582ebe0e0373bb1d6752b7bfc5def3bd43c81
parentac9d95ef043a3cf222c7a39ff7d23d63394bcee9 (diff)
downloadu-boot-linaro-next-152ad8815e75b62b402ac4b093ef2903cc9f0f0d.tar.gz
arm: imx6q: add axi cache and qos setting
Signed-off-by: Jason Chen <b02280@freescale.com> Signed-off-by: Eric Miao <eric.miao@linaro.org>
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 543b2cc6d..53d671f1f 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -77,10 +77,21 @@ void init_aips(void)
writel(0x00000000, &aips2->opacr4);
}
+void init_axi_cache_qos(void)
+{
+ /* enable AXI cache for VDOA/VPU/IPU */
+ writel(0xf00000ff, IOMUXC_BASE_ADDR + 0x010);
+ /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+ writel(0x007f007f, IOMUXC_BASE_ADDR + 0x018);
+ writel(0x007f007f, IOMUXC_BASE_ADDR + 0x01c);
+}
+
int arch_cpu_init(void)
{
init_aips();
+ init_axi_cache_qos();
+
return 0;
}
#endif