From 564c10ceb423145ec683927119f8d5a544e55b8b Mon Sep 17 00:00:00 2001 From: Vincent Belliard Date: Tue, 6 Feb 2018 08:21:16 -0800 Subject: Update vrint instructions. Change-Id: Ia310e797155ae5861405481d5855e42086306252 --- src/aarch32/assembler-aarch32.cc | 413 +++++++++------- src/aarch32/assembler-aarch32.h | 131 +++-- src/aarch32/disasm-aarch32.cc | 884 +++++++++++++++++----------------- src/aarch32/disasm-aarch32.h | 47 +- src/aarch32/macro-assembler-aarch32.h | 394 ++++++++++++--- 5 files changed, 1107 insertions(+), 762 deletions(-) diff --git a/src/aarch32/assembler-aarch32.cc b/src/aarch32/assembler-aarch32.cc index 138a3c29..5f636981 100644 --- a/src/aarch32/assembler-aarch32.cc +++ b/src/aarch32/assembler-aarch32.cc @@ -1309,6 +1309,21 @@ class Dt_size_16 : public EncodingValue { }; Dt_size_16::Dt_size_16(DataType dt) { + switch (dt.GetValue()) { + case F32: + SetEncodingValue(0x2); + break; + default: + break; + } +} + +class Dt_size_17 : public EncodingValue { + public: + explicit Dt_size_17(DataType dt); +}; + +Dt_size_17::Dt_size_17(DataType dt) { switch (dt.GetValue()) { case I8: SetEncodingValue(0x0); @@ -24171,482 +24186,530 @@ void Assembler::vrhadd( Delegate(kVrhadd, &Assembler::vrhadd, cond, dt, rd, rn, rm); } -void Assembler::vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrinta(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTA{}.F32.F32
, ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0500U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTA{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20500U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } - // VRINTA{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTA{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xfeb80b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTA{}.F32.F32
, ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0500U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTA{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20500U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } - // VRINTA{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTA{}.F64
, ; A1 + if (dt.Is(F64)) { EmitA32(0xfeb80b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrinta, &Assembler::vrinta, dt1, dt2, rd, rm); + Delegate(kVrinta, &Assembler::vrinta, dt, rd, rm); } -void Assembler::vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { +void Assembler::vrinta(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTA{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0540U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTA{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20540U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTA{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0540U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTA{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20540U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrinta, &Assembler::vrinta, dt1, dt2, rd, rm); + Delegate(kVrinta, &Assembler::vrinta, dt, rd, rm); } -void Assembler::vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrinta(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); if (IsUsingT32()) { - // VRINTA{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTA{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xfeb80a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTA{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTA{}.F32 , ; A1 + if (dt.Is(F32)) { EmitA32(0xfeb80a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrinta, &Assembler::vrinta, dt1, dt2, rd, rm); + Delegate(kVrinta, &Assembler::vrinta, dt, rd, rm); } -void Assembler::vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrintm(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTM{}.F32.F32
, ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0680U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTM{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20680U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } - // VRINTM{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTM{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xfebb0b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTM{}.F32.F32
, ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0680U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTM{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20680U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } - // VRINTM{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTM{}.F64
, ; A1 + if (dt.Is(F64)) { EmitA32(0xfebb0b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintm, &Assembler::vrintm, dt1, dt2, rd, rm); + Delegate(kVrintm, &Assembler::vrintm, dt, rd, rm); } -void Assembler::vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { +void Assembler::vrintm(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTM{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba06c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTM{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb206c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTM{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba06c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTM{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b206c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintm, &Assembler::vrintm, dt1, dt2, rd, rm); + Delegate(kVrintm, &Assembler::vrintm, dt, rd, rm); } -void Assembler::vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrintm(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); if (IsUsingT32()) { - // VRINTM{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTM{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xfebb0a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTM{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTM{}.F32 , ; A1 + if (dt.Is(F32)) { EmitA32(0xfebb0a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintm, &Assembler::vrintm, dt1, dt2, rd, rm); + Delegate(kVrintm, &Assembler::vrintm, dt, rd, rm); } -void Assembler::vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrintn(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTN{}.F32.F32
, ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0400U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTN{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20400U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } - // VRINTN{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTN{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xfeb90b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTN{}.F32.F32
, ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0400U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTN{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20400U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } - // VRINTN{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTN{}.F64
, ; A1 + if (dt.Is(F64)) { EmitA32(0xfeb90b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintn, &Assembler::vrintn, dt1, dt2, rd, rm); + Delegate(kVrintn, &Assembler::vrintn, dt, rd, rm); } -void Assembler::vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { +void Assembler::vrintn(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTN{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0440U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTN{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20440U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTN{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0440U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTN{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20440U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintn, &Assembler::vrintn, dt1, dt2, rd, rm); + Delegate(kVrintn, &Assembler::vrintn, dt, rd, rm); } -void Assembler::vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrintn(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); if (IsUsingT32()) { - // VRINTN{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTN{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xfeb90a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTN{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTN{}.F32 , ; A1 + if (dt.Is(F32)) { EmitA32(0xfeb90a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintn, &Assembler::vrintn, dt1, dt2, rd, rm); + Delegate(kVrintn, &Assembler::vrintn, dt, rd, rm); } -void Assembler::vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrintp(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTP{}.F32.F32
, ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0780U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTP{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20780U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } - // VRINTP{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTP{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xfeba0b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTP{}.F32.F32
, ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0780U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTP{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20780U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } - // VRINTP{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTP{}.F64
, ; A1 + if (dt.Is(F64)) { EmitA32(0xfeba0b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintp, &Assembler::vrintp, dt1, dt2, rd, rm); + Delegate(kVrintp, &Assembler::vrintp, dt, rd, rm); } -void Assembler::vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { +void Assembler::vrintp(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTP{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba07c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTP{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb207c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTP{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba07c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTP{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b207c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintp, &Assembler::vrintp, dt1, dt2, rd, rm); + Delegate(kVrintp, &Assembler::vrintp, dt, rd, rm); } -void Assembler::vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrintp(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); if (IsUsingT32()) { - // VRINTP{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTP{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xfeba0a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTP{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTP{}.F32 , ; A1 + if (dt.Is(F32)) { EmitA32(0xfeba0a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintp, &Assembler::vrintp, dt1, dt2, rd, rm); + Delegate(kVrintp, &Assembler::vrintp, dt, rd, rm); } -void Assembler::vrintr( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrintr(Condition cond, + DataType dt, + SRegister rd, + SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(cond); if (IsUsingT32()) { - // VRINTR{}{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTR{}{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xeeb60a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTR{}{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32) && cond.IsNotNever()) { + // VRINTR{}{}.F32 , ; A1 + if (dt.Is(F32) && cond.IsNotNever()) { EmitA32(0x0eb60a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintr, &Assembler::vrintr, cond, dt1, dt2, rd, rm); + Delegate(kVrintr, &Assembler::vrintr, cond, dt, rd, rm); } -void Assembler::vrintr( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrintr(Condition cond, + DataType dt, + DRegister rd, + DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(cond); if (IsUsingT32()) { - // VRINTR{}{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTR{}{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xeeb60b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTR{}{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64) && cond.IsNotNever()) { + // VRINTR{}{}.F64
, ; A1 + if (dt.Is(F64) && cond.IsNotNever()) { EmitA32(0x0eb60b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintr, &Assembler::vrintr, cond, dt1, dt2, rd, rm); + Delegate(kVrintr, &Assembler::vrintr, cond, dt, rd, rm); } -void Assembler::vrintx( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrintx(Condition cond, + DataType dt, + DRegister rd, + DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(cond); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTX{}.F32.F32
, ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0480U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTX{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20480U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } - // VRINTX{}{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTX{}{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xeeb70b40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTX{}.F32.F32
, ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0480U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTX{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20480U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } - // VRINTX{}{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64) && cond.IsNotNever()) { + // VRINTX{}{}.F64
, ; A1 + if (dt.Is(F64) && cond.IsNotNever()) { EmitA32(0x0eb70b40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintx, &Assembler::vrintx, cond, dt1, dt2, rd, rm); + Delegate(kVrintx, &Assembler::vrintx, cond, dt, rd, rm); } -void Assembler::vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { +void Assembler::vrintx(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTX{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba04c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTX{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb204c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTX{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba04c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTX{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b204c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintx, &Assembler::vrintx, dt1, dt2, rd, rm); + Delegate(kVrintx, &Assembler::vrintx, dt, rd, rm); } -void Assembler::vrintx( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrintx(Condition cond, + DataType dt, + SRegister rd, + SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(cond); if (IsUsingT32()) { - // VRINTX{}{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTX{}{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xeeb70a40U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTX{}{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32) && cond.IsNotNever()) { + // VRINTX{}{}.F32 , ; A1 + if (dt.Is(F32) && cond.IsNotNever()) { EmitA32(0x0eb70a40U | (cond.GetCondition() << 28) | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintx, &Assembler::vrintx, cond, dt1, dt2, rd, rm); + Delegate(kVrintx, &Assembler::vrintx, cond, dt, rd, rm); } -void Assembler::vrintz( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Assembler::vrintz(Condition cond, + DataType dt, + DRegister rd, + DRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(cond); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTZ{}.F32.F32
, ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba0580U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTZ{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb20580U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } - // VRINTZ{}{}.F64.F64
, ; T1 - if (dt1.Is(F64) && dt2.Is(F64)) { + // VRINTZ{}{}.F64
, ; T1 + if (dt.Is(F64)) { EmitT32_32(0xeeb60bc0U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTZ{}.F32.F32
, ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba0580U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTZ{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b20580U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } - // VRINTZ{}{}.F64.F64
, ; A1 - if (dt1.Is(F64) && dt2.Is(F64) && cond.IsNotNever()) { + // VRINTZ{}{}.F64
, ; A1 + if (dt.Is(F64) && cond.IsNotNever()) { EmitA32(0x0eb60bc0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintz, &Assembler::vrintz, cond, dt1, dt2, rd, rm); + Delegate(kVrintz, &Assembler::vrintz, cond, dt, rd, rm); } -void Assembler::vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { +void Assembler::vrintz(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(al); + Dt_size_16 encoded_dt(dt); if (IsUsingT32()) { - // VRINTZ{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitT32_32(0xffba05c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTZ{}.
, ; T1 + if (encoded_dt.IsValid()) { + EmitT32_32(0xffb205c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTZ{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32)) { - EmitA32(0xf3ba05c0U | rd.Encode(22, 12) | rm.Encode(5, 0)); + // VRINTZ{}.
, ; A1 + if (encoded_dt.IsValid()) { + EmitA32(0xf3b205c0U | (encoded_dt.GetEncodingValue() << 18) | + rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintz, &Assembler::vrintz, dt1, dt2, rd, rm); + Delegate(kVrintz, &Assembler::vrintz, dt, rd, rm); } -void Assembler::vrintz( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Assembler::vrintz(Condition cond, + DataType dt, + SRegister rd, + SRegister rm) { VIXL_ASSERT(AllowAssembler()); CheckIT(cond); if (IsUsingT32()) { - // VRINTZ{}{}.F32.F32 , ; T1 - if (dt1.Is(F32) && dt2.Is(F32)) { + // VRINTZ{}{}.F32 , ; T1 + if (dt.Is(F32)) { EmitT32_32(0xeeb60ac0U | rd.Encode(22, 12) | rm.Encode(5, 0)); AdvanceIT(); return; } } else { - // VRINTZ{}{}.F32.F32 , ; A1 - if (dt1.Is(F32) && dt2.Is(F32) && cond.IsNotNever()) { + // VRINTZ{}{}.F32 , ; A1 + if (dt.Is(F32) && cond.IsNotNever()) { EmitA32(0x0eb60ac0U | (cond.GetCondition() << 28) | rd.Encode(22, 12) | rm.Encode(5, 0)); return; } } - Delegate(kVrintz, &Assembler::vrintz, cond, dt1, dt2, rd, rm); + Delegate(kVrintz, &Assembler::vrintz, cond, dt, rd, rm); } void Assembler::vrshl( @@ -25440,7 +25503,7 @@ void Assembler::vshll(Condition cond, if (operand.GetNeonImmediate().CanConvert()) { uint32_t imm = operand.GetNeonImmediate().GetImmediate(); Dt_imm6_4 encoded_dt(dt); - Dt_size_16 encoded_dt_2(dt); + Dt_size_17 encoded_dt_2(dt); if (IsUsingT32()) { // VSHLL{}{}. , , # ; T1 if (encoded_dt.IsValid() && (imm >= 1) && (imm <= dt.GetSize() - 1)) { diff --git a/src/aarch32/assembler-aarch32.h b/src/aarch32/assembler-aarch32.h index b748086f..bb7df840 100644 --- a/src/aarch32/assembler-aarch32.h +++ b/src/aarch32/assembler-aarch32.h @@ -259,6 +259,9 @@ class Assembler : public internal::AssemblerBase { EncodingSize size, Register rd, Location* location); + typedef void (Assembler::*InstructionDtQQ)(DataType dt, + QRegister rd, + QRegister rm); typedef void (Assembler::*InstructionCondSizeL)(Condition cond, EncodingSize size, Location* location); @@ -611,6 +614,12 @@ class Assembler : public internal::AssemblerBase { DRegister rd, QRegister rm, const QOperand& operand); + typedef void (Assembler::*InstructionDtDD)(DataType dt, + DRegister rd, + DRegister rm); + typedef void (Assembler::*InstructionDtSS)(DataType dt, + SRegister rd, + SRegister rm); typedef void (Assembler::*InstructionCondDtQDDop)(Condition cond, DataType dt, QRegister rd, @@ -684,6 +693,16 @@ class Assembler : public internal::AssemblerBase { VIXL_ASSERT((type == kAdr) || (type == kLdr)); UnimplementedDelegate(type); } + virtual void Delegate(InstructionType type, + InstructionDtQQ /*instruction*/, + DataType /*dt*/, + QRegister /*rd*/, + QRegister /*rm*/) { + USE(type); + VIXL_ASSERT((type == kVrinta) || (type == kVrintm) || (type == kVrintn) || + (type == kVrintp) || (type == kVrintx) || (type == kVrintz)); + UnimplementedDelegate(type); + } virtual void Delegate(InstructionType type, InstructionCondSizeL /*instruction*/, Condition /*cond*/, @@ -1129,7 +1148,8 @@ class Assembler : public internal::AssemblerBase { (type == kVcnt) || (type == kVneg) || (type == kVpadal) || (type == kVpaddl) || (type == kVqabs) || (type == kVqneg) || (type == kVrecpe) || (type == kVrev16) || (type == kVrev32) || - (type == kVrev64) || (type == kVrsqrte) || (type == kVsqrt) || + (type == kVrev64) || (type == kVrintr) || (type == kVrintx) || + (type == kVrintz) || (type == kVrsqrte) || (type == kVsqrt) || (type == kVswp) || (type == kVtrn) || (type == kVuzp) || (type == kVzip)); UnimplementedDelegate(type); @@ -1156,7 +1176,8 @@ class Assembler : public internal::AssemblerBase { SRegister /*rd*/, SRegister /*rm*/) { USE(type); - VIXL_ASSERT((type == kVabs) || (type == kVneg) || (type == kVsqrt)); + VIXL_ASSERT((type == kVabs) || (type == kVneg) || (type == kVrintr) || + (type == kVrintx) || (type == kVrintz) || (type == kVsqrt)); UnimplementedDelegate(type); } virtual void Delegate(InstructionType type, @@ -1317,8 +1338,7 @@ class Assembler : public internal::AssemblerBase { DRegister /*rd*/, DRegister /*rm*/) { USE(type); - VIXL_ASSERT((type == kVcvt) || (type == kVrintr) || (type == kVrintx) || - (type == kVrintz)); + VIXL_ASSERT((type == kVcvt)); UnimplementedDelegate(type); } virtual void Delegate(InstructionType type, @@ -1363,8 +1383,7 @@ class Assembler : public internal::AssemblerBase { SRegister /*rm*/) { USE(type); VIXL_ASSERT((type == kVcvt) || (type == kVcvtb) || (type == kVcvtr) || - (type == kVcvtt) || (type == kVrintr) || (type == kVrintx) || - (type == kVrintz)); + (type == kVcvtt)); UnimplementedDelegate(type); } virtual void Delegate(InstructionType type, @@ -1375,8 +1394,7 @@ class Assembler : public internal::AssemblerBase { DRegister /*rm*/) { USE(type); VIXL_ASSERT((type == kVcvta) || (type == kVcvtm) || (type == kVcvtn) || - (type == kVcvtp) || (type == kVrinta) || (type == kVrintm) || - (type == kVrintn) || (type == kVrintp)); + (type == kVcvtp)); UnimplementedDelegate(type); } virtual void Delegate(InstructionType type, @@ -1387,9 +1405,7 @@ class Assembler : public internal::AssemblerBase { QRegister /*rm*/) { USE(type); VIXL_ASSERT((type == kVcvta) || (type == kVcvtm) || (type == kVcvtn) || - (type == kVcvtp) || (type == kVrinta) || (type == kVrintm) || - (type == kVrintn) || (type == kVrintp) || (type == kVrintx) || - (type == kVrintz)); + (type == kVcvtp)); UnimplementedDelegate(type); } virtual void Delegate(InstructionType type, @@ -1400,8 +1416,7 @@ class Assembler : public internal::AssemblerBase { SRegister /*rm*/) { USE(type); VIXL_ASSERT((type == kVcvta) || (type == kVcvtm) || (type == kVcvtn) || - (type == kVcvtp) || (type == kVrinta) || (type == kVrintm) || - (type == kVrintn) || (type == kVrintp)); + (type == kVcvtp)); UnimplementedDelegate(type); } virtual void Delegate(InstructionType type, @@ -1817,6 +1832,26 @@ class Assembler : public internal::AssemblerBase { (type == kVshrn)); UnimplementedDelegate(type); } + virtual void Delegate(InstructionType type, + InstructionDtDD /*instruction*/, + DataType /*dt*/, + DRegister /*rd*/, + DRegister /*rm*/) { + USE(type); + VIXL_ASSERT((type == kVrinta) || (type == kVrintm) || (type == kVrintn) || + (type == kVrintp)); + UnimplementedDelegate(type); + } + virtual void Delegate(InstructionType type, + InstructionDtSS /*instruction*/, + DataType /*dt*/, + SRegister /*rd*/, + SRegister /*rm*/) { + USE(type); + VIXL_ASSERT((type == kVrinta) || (type == kVrintm) || (type == kVrintn) || + (type == kVrintp)); + UnimplementedDelegate(type); + } virtual void Delegate(InstructionType type, InstructionCondDtQDDop /*instruction*/, Condition /*cond*/, @@ -5513,68 +5548,62 @@ class Assembler : public internal::AssemblerBase { vrhadd(al, dt, rd, rn, rm); } - void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrinta(DataType dt, DRegister rd, DRegister rm); - void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrinta(DataType dt, QRegister rd, QRegister rm); - void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrinta(DataType dt, SRegister rd, SRegister rm); - void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintm(DataType dt, DRegister rd, DRegister rm); - void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintm(DataType dt, QRegister rd, QRegister rm); - void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintm(DataType dt, SRegister rd, SRegister rm); - void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintn(DataType dt, DRegister rd, DRegister rm); - void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintn(DataType dt, QRegister rd, QRegister rm); - void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintn(DataType dt, SRegister rd, SRegister rm); - void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintp(DataType dt, DRegister rd, DRegister rm); - void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintp(DataType dt, QRegister rd, QRegister rm); - void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintp(DataType dt, SRegister rd, SRegister rm); - void vrintr( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); - void vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { - vrintr(al, dt1, dt2, rd, rm); + void vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm); + void vrintr(DataType dt, SRegister rd, SRegister rm) { + vrintr(al, dt, rd, rm); } - void vrintr( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); - void vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { - vrintr(al, dt1, dt2, rd, rm); + void vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm); + void vrintr(DataType dt, DRegister rd, DRegister rm) { + vrintr(al, dt, rd, rm); } - void vrintx( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); - void vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { - vrintx(al, dt1, dt2, rd, rm); + void vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm); + void vrintx(DataType dt, DRegister rd, DRegister rm) { + vrintx(al, dt, rd, rm); } - void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintx(DataType dt, QRegister rd, QRegister rm); - void vrintx( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); - void vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { - vrintx(al, dt1, dt2, rd, rm); + void vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm); + void vrintx(DataType dt, SRegister rd, SRegister rm) { + vrintx(al, dt, rd, rm); } - void vrintz( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); - void vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { - vrintz(al, dt1, dt2, rd, rm); + void vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm); + void vrintz(DataType dt, DRegister rd, DRegister rm) { + vrintz(al, dt, rd, rm); } - void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintz(DataType dt, QRegister rd, QRegister rm); - void vrintz( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); - void vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { - vrintz(al, dt1, dt2, rd, rm); + void vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm); + void vrintz(DataType dt, SRegister rd, SRegister rm) { + vrintz(al, dt, rd, rm); } void vrshl( diff --git a/src/aarch32/disasm-aarch32.cc b/src/aarch32/disasm-aarch32.cc index 62de38a3..5c6e8052 100644 --- a/src/aarch32/disasm-aarch32.cc +++ b/src/aarch32/disasm-aarch32.cc @@ -812,6 +812,14 @@ DataTypeValue Dt_size_15_Decode(uint32_t value) { } DataTypeValue Dt_size_16_Decode(uint32_t value) { + switch (value) { + case 0x2: + return F32; + } + return kDataTypeValueInvalid; +} + +DataTypeValue Dt_size_17_Decode(uint32_t value) { switch (value) { case 0x0: return I8; @@ -6153,158 +6161,128 @@ void Disassembler::vrhadd( os() << rn << ", " << rm; } -void Disassembler::vrinta(DataType dt1, - DataType dt2, - DRegister rd, - DRegister rm) { +void Disassembler::vrinta(DataType dt, DRegister rd, DRegister rm) { os().SetCurrentInstruction(kVrinta, kFpNeon); - os() << ToCString(kVrinta) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrinta) << dt << " " << rd << ", " << rm; } -void Disassembler::vrinta(DataType dt1, - DataType dt2, - QRegister rd, - QRegister rm) { +void Disassembler::vrinta(DataType dt, QRegister rd, QRegister rm) { os().SetCurrentInstruction(kVrinta, kFpNeon); - os() << ToCString(kVrinta) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrinta) << dt << " " << rd << ", " << rm; } -void Disassembler::vrinta(DataType dt1, - DataType dt2, - SRegister rd, - SRegister rm) { +void Disassembler::vrinta(DataType dt, SRegister rd, SRegister rm) { os().SetCurrentInstruction(kVrinta, kFpNeon); - os() << ToCString(kVrinta) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrinta) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintm(DataType dt1, - DataType dt2, - DRegister rd, - DRegister rm) { +void Disassembler::vrintm(DataType dt, DRegister rd, DRegister rm) { os().SetCurrentInstruction(kVrintm, kFpNeon); - os() << ToCString(kVrintm) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintm) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintm(DataType dt1, - DataType dt2, - QRegister rd, - QRegister rm) { +void Disassembler::vrintm(DataType dt, QRegister rd, QRegister rm) { os().SetCurrentInstruction(kVrintm, kFpNeon); - os() << ToCString(kVrintm) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintm) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintm(DataType dt1, - DataType dt2, - SRegister rd, - SRegister rm) { +void Disassembler::vrintm(DataType dt, SRegister rd, SRegister rm) { os().SetCurrentInstruction(kVrintm, kFpNeon); - os() << ToCString(kVrintm) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintm) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintn(DataType dt1, - DataType dt2, - DRegister rd, - DRegister rm) { +void Disassembler::vrintn(DataType dt, DRegister rd, DRegister rm) { os().SetCurrentInstruction(kVrintn, kFpNeon); - os() << ToCString(kVrintn) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintn) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintn(DataType dt1, - DataType dt2, - QRegister rd, - QRegister rm) { +void Disassembler::vrintn(DataType dt, QRegister rd, QRegister rm) { os().SetCurrentInstruction(kVrintn, kFpNeon); - os() << ToCString(kVrintn) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintn) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintn(DataType dt1, - DataType dt2, - SRegister rd, - SRegister rm) { +void Disassembler::vrintn(DataType dt, SRegister rd, SRegister rm) { os().SetCurrentInstruction(kVrintn, kFpNeon); - os() << ToCString(kVrintn) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintn) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintp(DataType dt1, - DataType dt2, - DRegister rd, - DRegister rm) { +void Disassembler::vrintp(DataType dt, DRegister rd, DRegister rm) { os().SetCurrentInstruction(kVrintp, kFpNeon); - os() << ToCString(kVrintp) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintp) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintp(DataType dt1, - DataType dt2, - QRegister rd, - QRegister rm) { +void Disassembler::vrintp(DataType dt, QRegister rd, QRegister rm) { os().SetCurrentInstruction(kVrintp, kFpNeon); - os() << ToCString(kVrintp) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintp) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintp(DataType dt1, - DataType dt2, - SRegister rd, - SRegister rm) { +void Disassembler::vrintp(DataType dt, SRegister rd, SRegister rm) { os().SetCurrentInstruction(kVrintp, kFpNeon); - os() << ToCString(kVrintp) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintp) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintr( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Disassembler::vrintr(Condition cond, + DataType dt, + SRegister rd, + SRegister rm) { os().SetCurrentInstruction(kVrintr, kFpNeon); - os() << ToCString(kVrintr) << ConditionPrinter(it_block_, cond) << dt1 << dt2 - << " " << rd << ", " << rm; + os() << ToCString(kVrintr) << ConditionPrinter(it_block_, cond) << dt << " " + << rd << ", " << rm; } -void Disassembler::vrintr( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Disassembler::vrintr(Condition cond, + DataType dt, + DRegister rd, + DRegister rm) { os().SetCurrentInstruction(kVrintr, kFpNeon); - os() << ToCString(kVrintr) << ConditionPrinter(it_block_, cond) << dt1 << dt2 - << " " << rd << ", " << rm; + os() << ToCString(kVrintr) << ConditionPrinter(it_block_, cond) << dt << " " + << rd << ", " << rm; } -void Disassembler::vrintx( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Disassembler::vrintx(Condition cond, + DataType dt, + DRegister rd, + DRegister rm) { os().SetCurrentInstruction(kVrintx, kFpNeon); - os() << ToCString(kVrintx) << ConditionPrinter(it_block_, cond) << dt1 << dt2 - << " " << rd << ", " << rm; + os() << ToCString(kVrintx) << ConditionPrinter(it_block_, cond) << dt << " " + << rd << ", " << rm; } -void Disassembler::vrintx(DataType dt1, - DataType dt2, - QRegister rd, - QRegister rm) { +void Disassembler::vrintx(DataType dt, QRegister rd, QRegister rm) { os().SetCurrentInstruction(kVrintx, kFpNeon); - os() << ToCString(kVrintx) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintx) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintx( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Disassembler::vrintx(Condition cond, + DataType dt, + SRegister rd, + SRegister rm) { os().SetCurrentInstruction(kVrintx, kFpNeon); - os() << ToCString(kVrintx) << ConditionPrinter(it_block_, cond) << dt1 << dt2 - << " " << rd << ", " << rm; + os() << ToCString(kVrintx) << ConditionPrinter(it_block_, cond) << dt << " " + << rd << ", " << rm; } -void Disassembler::vrintz( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { +void Disassembler::vrintz(Condition cond, + DataType dt, + DRegister rd, + DRegister rm) { os().SetCurrentInstruction(kVrintz, kFpNeon); - os() << ToCString(kVrintz) << ConditionPrinter(it_block_, cond) << dt1 << dt2 - << " " << rd << ", " << rm; + os() << ToCString(kVrintz) << ConditionPrinter(it_block_, cond) << dt << " " + << rd << ", " << rm; } -void Disassembler::vrintz(DataType dt1, - DataType dt2, - QRegister rd, - QRegister rm) { +void Disassembler::vrintz(DataType dt, QRegister rd, QRegister rm) { os().SetCurrentInstruction(kVrintz, kFpNeon); - os() << ToCString(kVrintz) << dt1 << dt2 << " " << rd << ", " << rm; + os() << ToCString(kVrintz) << dt << " " << rd << ", " << rm; } -void Disassembler::vrintz( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { +void Disassembler::vrintz(Condition cond, + DataType dt, + SRegister rd, + SRegister rm) { os().SetCurrentInstruction(kVrintz, kFpNeon); - os() << ToCString(kVrintz) << ConditionPrinter(it_block_, cond) << dt1 << dt2 - << " " << rd << ", " << rm; + os() << ToCString(kVrintz) << ConditionPrinter(it_block_, cond) << dt << " " + << rd << ", " << rm; } void Disassembler::vrshl( @@ -23815,9 +23793,8 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xeeb60a40 unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTR{}{}.F32.F32 , ; T1 + // VRINTR{}{}.F32 , ; T1 vrintr(CurrentCond(), - F32, F32, SRegister(rd), SRegister(rm)); @@ -23827,9 +23804,8 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xeeb60ac0 unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTZ{}{}.F32.F32 , ; T1 + // VRINTZ{}{}.F32 , ; T1 vrintz(CurrentCond(), - F32, F32, SRegister(rd), SRegister(rm)); @@ -23839,9 +23815,8 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xeeb70a40 unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTX{}{}.F32.F32 , ; T1 + // VRINTX{}{}.F32 , ; T1 vrintx(CurrentCond(), - F32, F32, SRegister(rd), SRegister(rm)); @@ -24164,9 +24139,8 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xeeb60b40 unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTR{}{}.F64.F64
, ; T1 + // VRINTR{}{}.F64
, ; T1 vrintr(CurrentCond(), - F64, F64, DRegister(rd), DRegister(rm)); @@ -24176,9 +24150,8 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xeeb60bc0 unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTZ{}{}.F64.F64
, ; T1 + // VRINTZ{}{}.F64
, ; T1 vrintz(CurrentCond(), - F64, F64, DRegister(rd), DRegister(rm)); @@ -24188,9 +24161,8 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xeeb70b40 unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTX{}{}.F64.F64
, ; T1 + // VRINTX{}{}.F64
, ; T1 vrintx(CurrentCond(), - F64, F64, DRegister(rd), DRegister(rm)); @@ -24489,8 +24461,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTA{}.F32.F32 , ; T1 - vrinta(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTA{}.F32 , ; T1 + vrinta(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedT32(instr); } @@ -24501,8 +24473,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTN{}.F32.F32 , ; T1 - vrintn(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTN{}.F32 , ; T1 + vrintn(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedT32(instr); } @@ -24513,8 +24485,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTP{}.F32.F32 , ; T1 - vrintp(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTP{}.F32 , ; T1 + vrintp(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedT32(instr); } @@ -24525,8 +24497,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTM{}.F32.F32 , ; T1 - vrintm(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTM{}.F32 , ; T1 + vrintm(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedT32(instr); } @@ -24598,8 +24570,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTA{}.F64.F64
, ; T1 - vrinta(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTA{}.F64
, ; T1 + vrinta(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedT32(instr); } @@ -24610,8 +24582,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTN{}.F64.F64
, ; T1 - vrintn(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTN{}.F64
, ; T1 + vrintn(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedT32(instr); } @@ -24622,8 +24594,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTP{}.F64.F64
, ; T1 - vrintp(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTP{}.F64
, ; T1 + vrintp(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedT32(instr); } @@ -24634,8 +24606,8 @@ void Disassembler::DecodeT32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTM{}.F64.F64
, ; T1 - vrintm(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTM{}.F64
, ; T1 + vrintm(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedT32(instr); } @@ -27363,180 +27335,180 @@ void Disassembler::DecodeT32(uint32_t instr) { } case 0x00000400: { // 0xffb20400 - if ((instr & 0x000c0000) == - 0x00080000) { - unsigned rd = - ExtractDRegister(instr, 22, 12); - unsigned rm = - ExtractDRegister(instr, 5, 0); - // VRINTN{}.F32.F32
, ; T1 NOLINT(whitespace/line_length) - vrintn(F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedT32(instr); + return; } + unsigned rd = + ExtractDRegister(instr, 22, 12); + unsigned rm = + ExtractDRegister(instr, 5, 0); + // VRINTN{}.
, ; T1 + vrintn(dt, + DRegister(rd), + DRegister(rm)); break; } case 0x00000440: { // 0xffb20440 - if ((instr & 0x000c0000) == - 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rd = - ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rm = - ExtractQRegister(instr, 5, 0); - // VRINTN{}.F32.F32 , ; T1 NOLINT(whitespace/line_length) - vrintn(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedT32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { + UnallocatedT32(instr); + return; + } + unsigned rd = + ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { + UnallocatedT32(instr); + return; } + unsigned rm = + ExtractQRegister(instr, 5, 0); + // VRINTN{}.
, ; T1 + vrintn(dt, + QRegister(rd), + QRegister(rm)); break; } case 0x00000480: { // 0xffb20480 - if ((instr & 0x000c0000) == - 0x00080000) { - unsigned rd = - ExtractDRegister(instr, 22, 12); - unsigned rm = - ExtractDRegister(instr, 5, 0); - // VRINTX{}.F32.F32
, ; T1 NOLINT(whitespace/line_length) - vrintx(Condition::None(), - F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedT32(instr); + return; } + unsigned rd = + ExtractDRegister(instr, 22, 12); + unsigned rm = + ExtractDRegister(instr, 5, 0); + // VRINTX{}.
, ; T1 + vrintx(Condition::None(), + dt, + DRegister(rd), + DRegister(rm)); break; } case 0x000004c0: { // 0xffb204c0 - if ((instr & 0x000c0000) == - 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rd = - ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rm = - ExtractQRegister(instr, 5, 0); - // VRINTX{}.F32.F32 , ; T1 NOLINT(whitespace/line_length) - vrintx(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { + UnallocatedT32(instr); + return; + } + unsigned rd = + ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { UnallocatedT32(instr); + return; } + unsigned rm = + ExtractQRegister(instr, 5, 0); + // VRINTX{}.
, ; T1 + vrintx(dt, + QRegister(rd), + QRegister(rm)); break; } case 0x00000500: { // 0xffb20500 - if ((instr & 0x000c0000) == - 0x00080000) { - unsigned rd = - ExtractDRegister(instr, 22, 12); - unsigned rm = - ExtractDRegister(instr, 5, 0); - // VRINTA{}.F32.F32
, ; T1 NOLINT(whitespace/line_length) - vrinta(F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedT32(instr); + return; } + unsigned rd = + ExtractDRegister(instr, 22, 12); + unsigned rm = + ExtractDRegister(instr, 5, 0); + // VRINTA{}.
, ; T1 + vrinta(dt, + DRegister(rd), + DRegister(rm)); break; } case 0x00000540: { // 0xffb20540 - if ((instr & 0x000c0000) == - 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rd = - ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rm = - ExtractQRegister(instr, 5, 0); - // VRINTA{}.F32.F32 , ; T1 NOLINT(whitespace/line_length) - vrinta(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { + UnallocatedT32(instr); + return; + } + unsigned rd = + ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { UnallocatedT32(instr); + return; } + unsigned rm = + ExtractQRegister(instr, 5, 0); + // VRINTA{}.
, ; T1 + vrinta(dt, + QRegister(rd), + QRegister(rm)); break; } case 0x00000580: { // 0xffb20580 - if ((instr & 0x000c0000) == - 0x00080000) { - unsigned rd = - ExtractDRegister(instr, 22, 12); - unsigned rm = - ExtractDRegister(instr, 5, 0); - // VRINTZ{}.F32.F32
, ; T1 NOLINT(whitespace/line_length) - vrintz(Condition::None(), - F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedT32(instr); + return; } + unsigned rd = + ExtractDRegister(instr, 22, 12); + unsigned rm = + ExtractDRegister(instr, 5, 0); + // VRINTZ{}.
, ; T1 + vrintz(Condition::None(), + dt, + DRegister(rd), + DRegister(rm)); break; } case 0x000005c0: { // 0xffb205c0 - if ((instr & 0x000c0000) == - 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rd = - ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedT32(instr); - return; - } - unsigned rm = - ExtractQRegister(instr, 5, 0); - // VRINTZ{}.F32.F32 , ; T1 NOLINT(whitespace/line_length) - vrintz(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { + UnallocatedT32(instr); + return; + } + unsigned rd = + ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { UnallocatedT32(instr); + return; } + unsigned rm = + ExtractQRegister(instr, 5, 0); + // VRINTZ{}.
, ; T1 + vrintz(dt, + QRegister(rd), + QRegister(rm)); break; } } @@ -27631,7 +27603,7 @@ void Disassembler::DecodeT32(uint32_t instr) { // 0xffb20300 if ((instr & 0x00000040) == 0x00000000) { - DataType dt = Dt_size_16_Decode( + DataType dt = Dt_size_17_Decode( (instr >> 18) & 0x3); if (dt.Is(kDataTypeValueInvalid)) { UnallocatedT32(instr); @@ -27703,24 +27675,37 @@ void Disassembler::DecodeT32(uint32_t instr) { } case 0x00000480: { // 0xffb20680 - switch (instr & 0x000c0040) { - case 0x00080000: { - // 0xffba0680 + switch (instr & 0x00000040) { + case 0x00000000: { + // 0xffb20680 + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is( + kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTM{}.F32.F32
, ; T1 NOLINT(whitespace/line_length) - vrintm(F32, - F32, + // VRINTM{}.
, ; T1 NOLINT(whitespace/line_length) + vrintm(dt, DRegister(rd), DRegister(rm)); break; } - case 0x00080040: { - // 0xffba06c0 + case 0x00000040: { + // 0xffb206c0 + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is( + kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } if (((instr >> 12) & 1) != 0) { UnallocatedT32(instr); return; @@ -27735,16 +27720,12 @@ void Disassembler::DecodeT32(uint32_t instr) { } unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTM{}.F32.F32 , ; T1 NOLINT(whitespace/line_length) - vrintm(F32, - F32, + // VRINTM{}.
, ; T1 NOLINT(whitespace/line_length) + vrintm(dt, QRegister(rd), QRegister(rm)); break; } - default: - UnallocatedT32(instr); - break; } break; } @@ -27773,24 +27754,37 @@ void Disassembler::DecodeT32(uint32_t instr) { } case 0x00000580: { // 0xffb20780 - switch (instr & 0x000c0040) { - case 0x00080000: { - // 0xffba0780 + switch (instr & 0x00000040) { + case 0x00000000: { + // 0xffb20780 + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is( + kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTP{}.F32.F32
, ; T1 NOLINT(whitespace/line_length) - vrintp(F32, - F32, + // VRINTP{}.
, ; T1 NOLINT(whitespace/line_length) + vrintp(dt, DRegister(rd), DRegister(rm)); break; } - case 0x00080040: { - // 0xffba07c0 + case 0x00000040: { + // 0xffb207c0 + DataType dt = Dt_size_16_Decode( + (instr >> 18) & 0x3); + if (dt.Is( + kDataTypeValueInvalid)) { + UnallocatedT32(instr); + return; + } if (((instr >> 12) & 1) != 0) { UnallocatedT32(instr); return; @@ -27805,16 +27799,12 @@ void Disassembler::DecodeT32(uint32_t instr) { } unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTP{}.F32.F32 , ; T1 NOLINT(whitespace/line_length) - vrintp(F32, - F32, + // VRINTP{}.
, ; T1 NOLINT(whitespace/line_length) + vrintp(dt, QRegister(rd), QRegister(rm)); break; } - default: - UnallocatedT32(instr); - break; } break; } @@ -41688,156 +41678,146 @@ void Disassembler::DecodeA32(uint32_t instr) { } case 0x00000400: { // 0xf3b20400 - if ((instr & 0x000c0000) == 0x00080000) { - unsigned rd = ExtractDRegister(instr, 22, 12); - unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTN{}.F32.F32
, ; A1 - vrintn(F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedA32(instr); + return; } + unsigned rd = ExtractDRegister(instr, 22, 12); + unsigned rm = ExtractDRegister(instr, 5, 0); + // VRINTN{}.
, ; A1 + vrintn(dt, DRegister(rd), DRegister(rm)); break; } case 0x00000440: { // 0xf3b20440 - if ((instr & 0x000c0000) == 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rd = ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTN{}.F32.F32 , ; A1 - vrintn(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { UnallocatedA32(instr); + return; } + unsigned rd = ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { + UnallocatedA32(instr); + return; + } + unsigned rm = ExtractQRegister(instr, 5, 0); + // VRINTN{}.
, ; A1 + vrintn(dt, QRegister(rd), QRegister(rm)); break; } case 0x00000480: { // 0xf3b20480 - if ((instr & 0x000c0000) == 0x00080000) { - unsigned rd = ExtractDRegister(instr, 22, 12); - unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTX{}.F32.F32
, ; A1 - vrintx(al, - F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedA32(instr); + return; } + unsigned rd = ExtractDRegister(instr, 22, 12); + unsigned rm = ExtractDRegister(instr, 5, 0); + // VRINTX{}.
, ; A1 + vrintx(al, dt, DRegister(rd), DRegister(rm)); break; } case 0x000004c0: { // 0xf3b204c0 - if ((instr & 0x000c0000) == 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rd = ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTX{}.F32.F32 , ; A1 - vrintx(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { UnallocatedA32(instr); + return; + } + unsigned rd = ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { + UnallocatedA32(instr); + return; } + unsigned rm = ExtractQRegister(instr, 5, 0); + // VRINTX{}.
, ; A1 + vrintx(dt, QRegister(rd), QRegister(rm)); break; } case 0x00000500: { // 0xf3b20500 - if ((instr & 0x000c0000) == 0x00080000) { - unsigned rd = ExtractDRegister(instr, 22, 12); - unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTA{}.F32.F32
, ; A1 - vrinta(F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedA32(instr); + return; } + unsigned rd = ExtractDRegister(instr, 22, 12); + unsigned rm = ExtractDRegister(instr, 5, 0); + // VRINTA{}.
, ; A1 + vrinta(dt, DRegister(rd), DRegister(rm)); break; } case 0x00000540: { // 0xf3b20540 - if ((instr & 0x000c0000) == 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rd = ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTA{}.F32.F32 , ; A1 - vrinta(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { + UnallocatedA32(instr); + return; + } + unsigned rd = ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { UnallocatedA32(instr); + return; } + unsigned rm = ExtractQRegister(instr, 5, 0); + // VRINTA{}.
, ; A1 + vrinta(dt, QRegister(rd), QRegister(rm)); break; } case 0x00000580: { // 0xf3b20580 - if ((instr & 0x000c0000) == 0x00080000) { - unsigned rd = ExtractDRegister(instr, 22, 12); - unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTZ{}.F32.F32
, ; A1 - vrintz(al, - F32, - F32, - DRegister(rd), - DRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedA32(instr); + return; } + unsigned rd = ExtractDRegister(instr, 22, 12); + unsigned rm = ExtractDRegister(instr, 5, 0); + // VRINTZ{}.
, ; A1 + vrintz(al, dt, DRegister(rd), DRegister(rm)); break; } case 0x000005c0: { // 0xf3b205c0 - if ((instr & 0x000c0000) == 0x00080000) { - if (((instr >> 12) & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rd = ExtractQRegister(instr, 22, 12); - if ((instr & 1) != 0) { - UnallocatedA32(instr); - return; - } - unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTZ{}.F32.F32 , ; A1 - vrintz(F32, - F32, - QRegister(rd), - QRegister(rm)); - } else { + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { UnallocatedA32(instr); + return; + } + if (((instr >> 12) & 1) != 0) { + UnallocatedA32(instr); + return; + } + unsigned rd = ExtractQRegister(instr, 22, 12); + if ((instr & 1) != 0) { + UnallocatedA32(instr); + return; } + unsigned rm = ExtractQRegister(instr, 5, 0); + // VRINTZ{}.
, ; A1 + vrintz(dt, QRegister(rd), QRegister(rm)); break; } } @@ -41916,7 +41896,7 @@ void Disassembler::DecodeA32(uint32_t instr) { // 0xf3b20300 if ((instr & 0x00000040) == 0x00000000) { DataType dt = - Dt_size_16_Decode((instr >> 18) & 0x3); + Dt_size_17_Decode((instr >> 18) & 0x3); if (dt.Is(kDataTypeValueInvalid)) { UnallocatedA32(instr); return; @@ -41980,21 +41960,30 @@ void Disassembler::DecodeA32(uint32_t instr) { } case 0x00000480: { // 0xf3b20680 - switch (instr & 0x000c0040) { - case 0x00080000: { - // 0xf3ba0680 + switch (instr & 0x00000040) { + case 0x00000000: { + // 0xf3b20680 + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTM{}.F32.F32
, ; A1 - vrintm(F32, - F32, - DRegister(rd), - DRegister(rm)); + // VRINTM{}.
, ; A1 + vrintm(dt, DRegister(rd), DRegister(rm)); break; } - case 0x00080040: { - // 0xf3ba06c0 + case 0x00000040: { + // 0xf3b206c0 + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } if (((instr >> 12) & 1) != 0) { UnallocatedA32(instr); return; @@ -42006,16 +41995,10 @@ void Disassembler::DecodeA32(uint32_t instr) { return; } unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTM{}.F32.F32 , ; A1 - vrintm(F32, - F32, - QRegister(rd), - QRegister(rm)); + // VRINTM{}.
, ; A1 + vrintm(dt, QRegister(rd), QRegister(rm)); break; } - default: - UnallocatedA32(instr); - break; } break; } @@ -42041,21 +42024,30 @@ void Disassembler::DecodeA32(uint32_t instr) { } case 0x00000580: { // 0xf3b20780 - switch (instr & 0x000c0040) { - case 0x00080000: { - // 0xf3ba0780 + switch (instr & 0x00000040) { + case 0x00000000: { + // 0xf3b20780 + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTP{}.F32.F32
, ; A1 - vrintp(F32, - F32, - DRegister(rd), - DRegister(rm)); + // VRINTP{}.
, ; A1 + vrintp(dt, DRegister(rd), DRegister(rm)); break; } - case 0x00080040: { - // 0xf3ba07c0 + case 0x00000040: { + // 0xf3b207c0 + DataType dt = + Dt_size_16_Decode((instr >> 18) & 0x3); + if (dt.Is(kDataTypeValueInvalid)) { + UnallocatedA32(instr); + return; + } if (((instr >> 12) & 1) != 0) { UnallocatedA32(instr); return; @@ -42067,16 +42059,10 @@ void Disassembler::DecodeA32(uint32_t instr) { return; } unsigned rm = ExtractQRegister(instr, 5, 0); - // VRINTP{}.F32.F32 , ; A1 - vrintp(F32, - F32, - QRegister(rd), - QRegister(rm)); + // VRINTP{}.
, ; A1 + vrintp(dt, QRegister(rd), QRegister(rm)); break; } - default: - UnallocatedA32(instr); - break; } break; } @@ -55347,8 +55333,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTA{}.F32.F32 , ; A1 - vrinta(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTA{}.F32 , ; A1 + vrinta(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedA32(instr); } @@ -55359,8 +55345,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTN{}.F32.F32 , ; A1 - vrintn(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTN{}.F32 , ; A1 + vrintn(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedA32(instr); } @@ -55371,8 +55357,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTP{}.F32.F32 , ; A1 - vrintp(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTP{}.F32 , ; A1 + vrintp(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedA32(instr); } @@ -55383,8 +55369,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTM{}.F32.F32 , ; A1 - vrintm(F32, F32, SRegister(rd), SRegister(rm)); + // VRINTM{}.F32 , ; A1 + vrintm(F32, SRegister(rd), SRegister(rm)); } else { UnallocatedA32(instr); } @@ -55456,8 +55442,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTA{}.F64.F64
, ; A1 - vrinta(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTA{}.F64
, ; A1 + vrinta(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedA32(instr); } @@ -55468,8 +55454,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTN{}.F64.F64
, ; A1 - vrintn(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTN{}.F64
, ; A1 + vrintn(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedA32(instr); } @@ -55480,8 +55466,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTP{}.F64.F64
, ; A1 - vrintp(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTP{}.F64
, ; A1 + vrintp(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedA32(instr); } @@ -55492,8 +55478,8 @@ void Disassembler::DecodeA32(uint32_t instr) { if ((instr & 0x00000080) == 0x00000000) { unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTM{}.F64.F64
, ; A1 - vrintm(F64, F64, DRegister(rd), DRegister(rm)); + // VRINTM{}.F64
, ; A1 + vrintm(F64, DRegister(rd), DRegister(rm)); } else { UnallocatedA32(instr); } @@ -66427,9 +66413,8 @@ void Disassembler::DecodeA32(uint32_t instr) { Condition condition((instr >> 28) & 0xf); unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTR{}{}.F32.F32 , ; A1 + // VRINTR{}{}.F32 , ; A1 vrintr(condition, - F32, F32, SRegister(rd), SRegister(rm)); @@ -66444,9 +66429,8 @@ void Disassembler::DecodeA32(uint32_t instr) { Condition condition((instr >> 28) & 0xf); unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTZ{}{}.F32.F32 , ; A1 + // VRINTZ{}{}.F32 , ; A1 vrintz(condition, - F32, F32, SRegister(rd), SRegister(rm)); @@ -66461,9 +66445,8 @@ void Disassembler::DecodeA32(uint32_t instr) { Condition condition((instr >> 28) & 0xf); unsigned rd = ExtractSRegister(instr, 22, 12); unsigned rm = ExtractSRegister(instr, 5, 0); - // VRINTX{}{}.F32.F32 , ; A1 + // VRINTX{}{}.F32 , ; A1 vrintx(condition, - F32, F32, SRegister(rd), SRegister(rm)); @@ -66878,9 +66861,8 @@ void Disassembler::DecodeA32(uint32_t instr) { Condition condition((instr >> 28) & 0xf); unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTR{}{}.F64.F64
, ; A1 + // VRINTR{}{}.F64
, ; A1 vrintr(condition, - F64, F64, DRegister(rd), DRegister(rm)); @@ -66895,9 +66877,8 @@ void Disassembler::DecodeA32(uint32_t instr) { Condition condition((instr >> 28) & 0xf); unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTZ{}{}.F64.F64
, ; A1 + // VRINTZ{}{}.F64
, ; A1 vrintz(condition, - F64, F64, DRegister(rd), DRegister(rm)); @@ -66912,9 +66893,8 @@ void Disassembler::DecodeA32(uint32_t instr) { Condition condition((instr >> 28) & 0xf); unsigned rd = ExtractDRegister(instr, 22, 12); unsigned rm = ExtractDRegister(instr, 5, 0); - // VRINTX{}{}.F64.F64
, ; A1 + // VRINTX{}{}.F64
, ; A1 vrintx(condition, - F64, F64, DRegister(rd), DRegister(rm)); diff --git a/src/aarch32/disasm-aarch32.h b/src/aarch32/disasm-aarch32.h index b72b1567..4c94c052 100644 --- a/src/aarch32/disasm-aarch32.h +++ b/src/aarch32/disasm-aarch32.h @@ -2317,51 +2317,45 @@ class Disassembler { void vrhadd( Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm); - void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrinta(DataType dt, DRegister rd, DRegister rm); - void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrinta(DataType dt, QRegister rd, QRegister rm); - void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrinta(DataType dt, SRegister rd, SRegister rm); - void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintm(DataType dt, DRegister rd, DRegister rm); - void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintm(DataType dt, QRegister rd, QRegister rm); - void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintm(DataType dt, SRegister rd, SRegister rm); - void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintn(DataType dt, DRegister rd, DRegister rm); - void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintn(DataType dt, QRegister rd, QRegister rm); - void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintn(DataType dt, SRegister rd, SRegister rm); - void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintp(DataType dt, DRegister rd, DRegister rm); - void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintp(DataType dt, QRegister rd, QRegister rm); - void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintp(DataType dt, SRegister rd, SRegister rm); - void vrintr( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm); - void vrintr( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm); - void vrintx( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm); - void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintx(DataType dt, QRegister rd, QRegister rm); - void vrintx( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm); - void vrintz( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm); + void vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm); - void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm); + void vrintz(DataType dt, QRegister rd, QRegister rm); - void vrintz( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm); + void vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm); void vrshl( Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn); @@ -2682,6 +2676,7 @@ DataTypeValue Dt_size_13_Decode(uint32_t value); DataTypeValue Dt_size_14_Decode(uint32_t value); DataTypeValue Dt_size_15_Decode(uint32_t value); DataTypeValue Dt_size_16_Decode(uint32_t value); +DataTypeValue Dt_size_17_Decode(uint32_t value); // End of generated code. class PrintDisassembler : public Disassembler { diff --git a/src/aarch32/macro-assembler-aarch32.h b/src/aarch32/macro-assembler-aarch32.h index 1de1a2f4..115d4d84 100644 --- a/src/aarch32/macro-assembler-aarch32.h +++ b/src/aarch32/macro-assembler-aarch32.h @@ -9187,214 +9187,208 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface { Vrhadd(al, dt, rd, rn, rm); } - void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrinta(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrinta(dt1, dt2, rd, rm); + vrinta(dt, rd, rm); } - void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { + void Vrinta(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrinta(dt1, dt2, rd, rm); + vrinta(dt, rd, rm); } - void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrinta(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrinta(dt1, dt2, rd, rm); + vrinta(dt, rd, rm); } - void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrintm(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintm(dt1, dt2, rd, rm); + vrintm(dt, rd, rm); } - void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { + void Vrintm(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintm(dt1, dt2, rd, rm); + vrintm(dt, rd, rm); } - void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrintm(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintm(dt1, dt2, rd, rm); + vrintm(dt, rd, rm); } - void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrintn(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintn(dt1, dt2, rd, rm); + vrintn(dt, rd, rm); } - void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { + void Vrintn(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintn(dt1, dt2, rd, rm); + vrintn(dt, rd, rm); } - void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrintn(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintn(dt1, dt2, rd, rm); + vrintn(dt, rd, rm); } - void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrintp(DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintp(dt1, dt2, rd, rm); + vrintp(dt, rd, rm); } - void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { + void Vrintp(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintp(dt1, dt2, rd, rm); + vrintp(dt, rd, rm); } - void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrintp(DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintp(dt1, dt2, rd, rm); + vrintp(dt, rd, rm); } - void Vrintr( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); ITScope it_scope(this, &cond, guard); - vrintr(cond, dt1, dt2, rd, rm); + vrintr(cond, dt, rd, rm); } - void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { - Vrintr(al, dt1, dt2, rd, rm); + void Vrintr(DataType dt, SRegister rd, SRegister rm) { + Vrintr(al, dt, rd, rm); } - void Vrintr( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); ITScope it_scope(this, &cond, guard); - vrintr(cond, dt1, dt2, rd, rm); + vrintr(cond, dt, rd, rm); } - void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { - Vrintr(al, dt1, dt2, rd, rm); + void Vrintr(DataType dt, DRegister rd, DRegister rm) { + Vrintr(al, dt, rd, rm); } - void Vrintx( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); ITScope it_scope(this, &cond, guard); - vrintx(cond, dt1, dt2, rd, rm); + vrintx(cond, dt, rd, rm); } - void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { - Vrintx(al, dt1, dt2, rd, rm); + void Vrintx(DataType dt, DRegister rd, DRegister rm) { + Vrintx(al, dt, rd, rm); } - void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { + void Vrintx(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintx(dt1, dt2, rd, rm); + vrintx(dt, rd, rm); } - void Vrintx( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); ITScope it_scope(this, &cond, guard); - vrintx(cond, dt1, dt2, rd, rm); + vrintx(cond, dt, rd, rm); } - void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { - Vrintx(al, dt1, dt2, rd, rm); + void Vrintx(DataType dt, SRegister rd, SRegister rm) { + Vrintx(al, dt, rd, rm); } - void Vrintz( - Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) { + void Vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); ITScope it_scope(this, &cond, guard); - vrintz(cond, dt1, dt2, rd, rm); + vrintz(cond, dt, rd, rm); } - void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { - Vrintz(al, dt1, dt2, rd, rm); + void Vrintz(DataType dt, DRegister rd, DRegister rm) { + Vrintz(al, dt, rd, rm); } - void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { + void Vrintz(DataType dt, QRegister rd, QRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); - vrintz(dt1, dt2, rd, rm); + vrintz(dt, rd, rm); } - void Vrintz( - Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) { + void Vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm) { VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); VIXL_ASSERT(!AliasesAvailableScratchRegister(rm)); VIXL_ASSERT(allow_macro_instructions_); VIXL_ASSERT(OutsideITBlock()); MacroEmissionCheckScope guard(this); ITScope it_scope(this, &cond, guard); - vrintz(cond, dt1, dt2, rd, rm); + vrintz(cond, dt, rd, rm); } - void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { - Vrintz(al, dt1, dt2, rd, rm); + void Vrintz(DataType dt, SRegister rd, SRegister rm) { + Vrintz(al, dt, rd, rm); } void Vrshl( @@ -10699,6 +10693,72 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface { void Vnmul(VRegister rd, VRegister rn, VRegister rm) { Vnmul(al, rd, rn, rm); } + void Vrinta(VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrinta(F32, rd.S(), rm.S()); + } else { + Vrinta(F64, rd.D(), rm.D()); + } + } + void Vrintm(VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrintm(F32, rd.S(), rm.S()); + } else { + Vrintm(F64, rd.D(), rm.D()); + } + } + void Vrintn(VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrintn(F32, rd.S(), rm.S()); + } else { + Vrintn(F64, rd.D(), rm.D()); + } + } + void Vrintp(VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrintp(F32, rd.S(), rm.S()); + } else { + Vrintp(F64, rd.D(), rm.D()); + } + } + void Vrintr(Condition cond, VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrintr(cond, F32, rd.S(), rm.S()); + } else { + Vrintr(cond, F64, rd.D(), rm.D()); + } + } + void Vrintr(VRegister rd, VRegister rm) { Vrintr(al, rd, rm); } + void Vrintx(Condition cond, VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrintx(cond, F32, rd.S(), rm.S()); + } else { + Vrintx(cond, F64, rd.D(), rm.D()); + } + } + void Vrintx(VRegister rd, VRegister rm) { Vrintx(al, rd, rm); } + void Vrintz(Condition cond, VRegister rd, VRegister rm) { + VIXL_ASSERT(rd.IsS() || rd.IsD()); + VIXL_ASSERT(rd.GetType() == rm.GetType()); + if (rd.IsS()) { + Vrintz(cond, F32, rd.S(), rm.S()); + } else { + Vrintz(cond, F64, rd.D(), rm.D()); + } + } + void Vrintz(VRegister rd, VRegister rm) { Vrintz(al, rd, rm); } void Vseleq(VRegister rd, VRegister rn, VRegister rm) { VIXL_ASSERT(rd.IsS() || rd.IsD()); VIXL_ASSERT(rd.GetType() == rn.GetType()); @@ -10771,6 +10831,224 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface { "ARM strongly recommends to not use this instruction.\n"); return false; } + // Old syntax of vrint instructions. + VIXL_DEPRECATED( + "void Vrinta(DataType dt, DRegister rd, DRegister rm)", + void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrinta(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrinta(DataType dt, QRegister rd, QRegister rm)", + void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrinta(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrinta(DataType dt, SRegister rd, SRegister rm)", + void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrinta(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintm(DataType dt, DRegister rd, DRegister rm)", + void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintm(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintm(DataType dt, QRegister rd, QRegister rm)", + void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintm(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintm(DataType dt, SRegister rd, SRegister rm)", + void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintm(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintn(DataType dt, DRegister rd, DRegister rm)", + void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintn(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintn(DataType dt, QRegister rd, QRegister rm)", + void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintn(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintn(DataType dt, SRegister rd, SRegister rm)", + void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintn(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintp(DataType dt, DRegister rd, DRegister rm)", + void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintp(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintp(DataType dt, QRegister rd, QRegister rm)", + void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintp(dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintp(DataType dt, SRegister rd, SRegister rm)", + void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintp(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm)", + void Vrintr(Condition cond, + DataType dt1, + DataType dt2, + SRegister rd, + SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintr(cond, dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintr(DataType dt, SRegister rd, SRegister rm)", + void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintr(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm)", + void Vrintr(Condition cond, + DataType dt1, + DataType dt2, + DRegister rd, + DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintr(cond, dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintr(DataType dt, DRegister rd, DRegister rm)", + void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintr(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm)", + void Vrintx(Condition cond, + DataType dt1, + DataType dt2, + DRegister rd, + DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintx(cond, dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintx(DataType dt, DRegister rd, DRegister rm)", + void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintx(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintx(DataType dt, QRegister rd, QRegister rm)", + void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintx(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm)", + void Vrintx(Condition cond, + DataType dt1, + DataType dt2, + SRegister rd, + SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintx(cond, dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintx(DataType dt, SRegister rd, SRegister rm)", + void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintx(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm)", + void Vrintz(Condition cond, + DataType dt1, + DataType dt2, + DRegister rd, + DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintz(cond, dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintz(DataType dt, DRegister rd, DRegister rm)", + void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintz(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintz(DataType dt, QRegister rd, QRegister rm)", + void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintz(dt1, rd, rm); + } + + VIXL_DEPRECATED( + "void Vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm)", + void Vrintz(Condition cond, + DataType dt1, + DataType dt2, + SRegister rd, + SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintz(cond, dt1, rd, rm); + } + VIXL_DEPRECATED( + "void Vrintz(DataType dt, SRegister rd, SRegister rm)", + void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) { + USE(dt2); + VIXL_ASSERT(dt1.Is(dt2)); + return Vrintz(dt1, rd, rm); + } private: bool NeedBranch(Condition* cond) { return !cond->Is(al) && IsUsingT32(); } -- cgit v1.2.3