From d438be28a00dbd6508290a572cf70a18b4428406 Mon Sep 17 00:00:00 2001 From: Martyn Capewell Date: Thu, 9 Mar 2017 18:28:28 +0000 Subject: Import traces from Linaro's VIXL repository Change-Id: Ib020cdf285f4e9fd8d81fdf31af3788018b1b2d4 --- sim-fcvtas-s-trace-aarch64.h | 145 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 sim-fcvtas-s-trace-aarch64.h (limited to 'sim-fcvtas-s-trace-aarch64.h') diff --git a/sim-fcvtas-s-trace-aarch64.h b/sim-fcvtas-s-trace-aarch64.h new file mode 100644 index 0000000..f2c1ecc --- /dev/null +++ b/sim-fcvtas-s-trace-aarch64.h @@ -0,0 +1,145 @@ +// Copyright 2015, VIXL authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// * Neither the name of ARM Limited nor the names of its contributors may be +// used to endorse or promote products derived from this software without +// specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND +// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +// --------------------------------------------------------------------- +// This file is auto generated using tools/generate_simulator_traces.py. +// +// PLEASE DO NOT EDIT. +// --------------------------------------------------------------------- + +#ifndef VIXL_SIM_FCVTAS_S_TRACE_AARCH64_H_ +#define VIXL_SIM_FCVTAS_S_TRACE_AARCH64_H_ + +const uint32_t kExpected_NEON_fcvtas_S[] = { + 0x80000080, + 0x7fffff80, + 0x7fffffff, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000001, + 0x00000001, + 0x00000001, + 0x00000001, + 0x00000001, + 0x00000002, + 0x0000000a, + 0x00000000, + 0x7fffffff, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xfffffffe, + 0xfffffff6, + 0x00000000, + 0x80000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00800000, + 0x00800001, + 0x00800002, + 0x00800003, + 0x00f65432, + 0x00fffffc, + 0x00fffffd, + 0x00fffffe, + 0x00ffffff, + 0x00400000, + 0x00400001, + 0x00400001, + 0x00400002, + 0x007b2a19, + 0x007ffffe, + 0x007fffff, + 0x007fffff, + 0x00800000, + 0x00200000, + 0x00200000, + 0x00200001, + 0x00200001, + 0x003d950d, + 0x003fffff, + 0x003fffff, + 0x00400000, + 0x00400000, + 0xff800000, + 0xff7fffff, + 0xff7ffffe, + 0xff7ffffd, + 0xff09abce, + 0xff000004, + 0xff000003, + 0xff000002, + 0xff000001, + 0xffc00000, + 0xffbfffff, + 0xffbfffff, + 0xffbffffe, + 0xff84d5e7, + 0xff800002, + 0xff800001, + 0xff800001, + 0xff800000, + 0xffe00000, + 0xffe00000, + 0xffdfffff, + 0xffdfffff, + 0xffc26af3, + 0xffc00001, + 0xffc00001, + 0xffc00000, + 0xffc00000, + 0x80000000, + 0x80000000, + 0x80000000, + 0x7fffffff, + 0x7fffffff, + 0x7fffffff, + 0x7fffffff, + 0x80000000, + 0x80000000, +}; +const unsigned kExpectedCount_NEON_fcvtas_S = 104; + +#endif // VIXL_SIM_FCVTAS_S_TRACE_AARCH64_H_ -- cgit v1.2.3